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git01.mediatek.com / filogic / uboot / a52d20723b7f36fae0e0061c335328b6694b08c5 / . / dts / upstream / src / arm64 / ti / k3-am65-iot2050-common.dtsi
blob: 61a634afaa4fecab8ec2a8ce63a3de480925c2bc [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) Siemens AG, 2018-2021
4 *
5 * Authors:
6 * Le Jin <le.jin@siemens.com>
7 * Jan Kiszka <jan.kiszka@siemens.com>
8 *
9 * Common bits of the IOT2050 Basic and Advanced variants, PG1 and PG2
10 */
11
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]12#include <dt-bindings/phy/phy.h>
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]13#include <dt-bindings/net/ti-dp83867.h>
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]14
15/ {
16 aliases {
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]17 serial0 = &wkup_uart0;
18 serial1 = &mcu_uart0;
19 serial2 = &main_uart0;
20 serial3 = &main_uart1;
21 i2c0 = &wkup_i2c0;
22 i2c1 = &mcu_i2c0;
23 i2c2 = &main_i2c0;
24 i2c3 = &main_i2c1;
25 i2c4 = &main_i2c2;
26 i2c5 = &main_i2c3;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]27 spi0 = &mcu_spi0;
28 mmc0 = &sdhci1;
29 mmc1 = &sdhci0;
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]30 ethernet1 = &icssg0_emac0;
31 ethernet2 = &icssg0_emac1;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]32 };
33
34 chosen {
35 stdout-path = "serial3:115200n8";
36 };
37
38 reserved-memory {
39 #address-cells = <2>;
40 #size-cells = <2>;
41 ranges;
42
43 secure_ddr: secure-ddr@9e800000 {
44 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
45 alignment = <0x1000>;
46 no-map;
47 };
48
49 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
50 compatible = "shared-dma-pool";
51 reg = <0 0xa0000000 0 0x100000>;
52 no-map;
53 };
54
55 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
56 compatible = "shared-dma-pool";
57 reg = <0 0xa0100000 0 0xf00000>;
58 no-map;
59 };
60
61 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
62 compatible = "shared-dma-pool";
63 reg = <0 0xa1000000 0 0x100000>;
64 no-map;
65 };
66
67 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
68 compatible = "shared-dma-pool";
69 reg = <0 0xa1100000 0 0xf00000>;
70 no-map;
71 };
72
73 rtos_ipc_memory_region: ipc-memories@a2000000 {
74 reg = <0x00 0xa2000000 0x00 0x00200000>;
75 alignment = <0x1000>;
76 no-map;
77 };
78 };
79
80 leds {
81 compatible = "gpio-leds";
82 pinctrl-names = "default";
83 pinctrl-0 = <&leds_pins_default>;
84
85 status-led-red {
86 gpios = <&wkup_gpio0 32 GPIO_ACTIVE_HIGH>;
87 panic-indicator;
88 };
89
90 status-led-green {
91 gpios = <&wkup_gpio0 24 GPIO_ACTIVE_HIGH>;
92 };
93
94 user-led1-red {
95 gpios = <&pcal9535_3 14 GPIO_ACTIVE_HIGH>;
96 };
97
98 user-led1-green {
99 gpios = <&pcal9535_2 15 GPIO_ACTIVE_HIGH>;
100 };
101
102 user-led2-red {
103 gpios = <&wkup_gpio0 17 GPIO_ACTIVE_HIGH>;
104 };
105
106 user-led2-green {
107 gpios = <&wkup_gpio0 22 GPIO_ACTIVE_HIGH>;
108 };
109 };
110
111 dp_refclk: clock {
112 compatible = "fixed-clock";
113 #clock-cells = <0>;
114 clock-frequency = <19200000>;
115 };
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]116
117 /* Dual Ethernet application node on PRU-ICSSG0 */
118 icssg0_eth: icssg0-eth {
119 compatible = "ti,am654-icssg-prueth";
120 pinctrl-names = "default";
121 pinctrl-0 = <&icssg0_rgmii_pins_default>;
122 sram = <&msmc_ram>;
123
124 ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>,
125 <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
126 firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
127 "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
128 "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
129 "ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
130 "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
131 "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
132
133 ti,pruss-gp-mux-sel = <2>, /* MII mode */
134 <2>,
135 <2>,
136 <2>, /* MII mode */
137 <2>,
138 <2>;
139
140 ti,mii-g-rt = <&icssg0_mii_g_rt>;
141 ti,mii-rt = <&icssg0_mii_rt>;
142 ti,iep = <&icssg0_iep0>, <&icssg0_iep1>;
143
144 interrupt-parent = <&icssg0_intc>;
145 interrupts = <24 0 2>, <25 1 3>;
146 interrupt-names = "tx_ts0", "tx_ts1";
147
148 dmas = <&main_udmap 0xc100>, /* egress slice 0 */
149 <&main_udmap 0xc101>, /* egress slice 0 */
150 <&main_udmap 0xc102>, /* egress slice 0 */
151 <&main_udmap 0xc103>, /* egress slice 0 */
152 <&main_udmap 0xc104>, /* egress slice 1 */
153 <&main_udmap 0xc105>, /* egress slice 1 */
154 <&main_udmap 0xc106>, /* egress slice 1 */
155 <&main_udmap 0xc107>, /* egress slice 1 */
156 <&main_udmap 0x4100>, /* ingress slice 0 */
157 <&main_udmap 0x4101>; /* ingress slice 1 */
158 dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
159 "tx1-0", "tx1-1", "tx1-2", "tx1-3",
160 "rx0", "rx1";
161
162 ethernet-ports {
163 #address-cells = <1>;
164 #size-cells = <0>;
165 icssg0_emac0: port@0 {
166 reg = <0>;
167 phy-handle = <&icssg0_eth0_phy>;
168 phy-mode = "rgmii-id";
169 ti,syscon-rgmii-delay = <&scm_conf 0x4100>;
170 ti,half-duplex-capable;
171 /* Filled in by bootloader */
172 local-mac-address = [00 00 00 00 00 00];
173 };
174
175 icssg0_emac1: port@1 {
176 reg = <1>;
177 phy-handle = <&icssg0_eth1_phy>;
178 phy-mode = "rgmii-id";
179 ti,syscon-rgmii-delay = <&scm_conf 0x4104>;
180 ti,half-duplex-capable;
181 /* Filled in by bootloader */
182 local-mac-address = [00 00 00 00 00 00];
183 };
184 };
185 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]186};
187
188&wkup_pmx0 {
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]189 pinctrl-names =
190 "default",
191 "d0-uart0-rxd", "d0-gpio", "d0-gpio-pullup", "d0-gpio-pulldown",
192 "d1-uart0-txd", "d1-gpio", "d1-gpio-pullup", "d1-gpio-pulldown",
193 "d2-uart0-ctsn", "d2-gpio", "d2-gpio-pullup", "d2-gpio-pulldown",
194 "d3-uart0-rtsn", "d3-gpio", "d3-gpio-pullup", "d3-gpio-pulldown",
195 "d10-spi0-cs0", "d10-gpio", "d10-gpio-pullup", "d10-gpio-pulldown",
196 "d11-spi0-d0", "d11-gpio", "d11-gpio-pullup", "d11-gpio-pulldown",
197 "d12-spi0-d1", "d12-gpio", "d12-gpio-pullup", "d12-gpio-pulldown",
198 "d13-spi0-clk", "d13-gpio", "d13-gpio-pullup", "d13-gpio-pulldown",
199 "a0-gpio", "a0-gpio-pullup", "a0-gpio-pulldown",
200 "a1-gpio", "a1-gpio-pullup", "a1-gpio-pulldown",
201 "a2-gpio", "a2-gpio-pullup", "a2-gpio-pulldown",
202 "a3-gpio", "a3-gpio-pullup", "a3-gpio-pulldown",
203 "a4-gpio", "a4-gpio-pullup", "a4-gpio-pulldown",
204 "a5-gpio", "a5-gpio-pullup", "a5-gpio-pulldown";
205
206 pinctrl-0 = <&d0_uart0_rxd>;
207 pinctrl-1 = <&d0_uart0_rxd>;
208 pinctrl-2 = <&d0_gpio>;
209 pinctrl-3 = <&d0_gpio_pullup>;
210 pinctrl-4 = <&d0_gpio_pulldown>;
211 pinctrl-5 = <&d1_uart0_txd>;
212 pinctrl-6 = <&d1_gpio>;
213 pinctrl-7 = <&d1_gpio_pullup>;
214 pinctrl-8 = <&d1_gpio_pulldown>;
215 pinctrl-9 = <&d2_uart0_ctsn>;
216 pinctrl-10 = <&d2_gpio>;
217 pinctrl-11 = <&d2_gpio_pullup>;
218 pinctrl-12 = <&d2_gpio_pulldown>;
219 pinctrl-13 = <&d3_uart0_rtsn>;
220 pinctrl-14 = <&d3_gpio>;
221 pinctrl-15 = <&d3_gpio_pullup>;
222 pinctrl-16 = <&d3_gpio_pulldown>;
223 pinctrl-17 = <&d10_spi0_cs0>;
224 pinctrl-18 = <&d10_gpio>;
225 pinctrl-19 = <&d10_gpio_pullup>;
226 pinctrl-20 = <&d10_gpio_pulldown>;
227 pinctrl-21 = <&d11_spi0_d0>;
228 pinctrl-22 = <&d11_gpio>;
229 pinctrl-23 = <&d11_gpio_pullup>;
230 pinctrl-24 = <&d11_gpio_pulldown>;
231 pinctrl-25 = <&d12_spi0_d1>;
232 pinctrl-26 = <&d12_gpio>;
233 pinctrl-27 = <&d12_gpio_pullup>;
234 pinctrl-28 = <&d12_gpio_pulldown>;
235 pinctrl-29 = <&d13_spi0_clk>;
236 pinctrl-30 = <&d13_gpio>;
237 pinctrl-31 = <&d13_gpio_pullup>;
238 pinctrl-32 = <&d13_gpio_pulldown>;
239 pinctrl-33 = <&a0_gpio>;
240 pinctrl-34 = <&a0_gpio_pullup>;
241 pinctrl-35 = <&a0_gpio_pulldown>;
242 pinctrl-36 = <&a1_gpio>;
243 pinctrl-37 = <&a1_gpio_pullup>;
244 pinctrl-38 = <&a1_gpio_pulldown>;
245 pinctrl-39 = <&a2_gpio>;
246 pinctrl-40 = <&a2_gpio_pullup>;
247 pinctrl-41 = <&a2_gpio_pulldown>;
248 pinctrl-42 = <&a3_gpio>;
249 pinctrl-43 = <&a3_gpio_pullup>;
250 pinctrl-44 = <&a3_gpio_pulldown>;
251 pinctrl-45 = <&a4_gpio>;
252 pinctrl-46 = <&a4_gpio_pullup>;
253 pinctrl-47 = <&a4_gpio_pulldown>;
254 pinctrl-48 = <&a5_gpio>;
255 pinctrl-49 = <&a5_gpio_pullup>;
256 pinctrl-50 = <&a5_gpio_pulldown>;
257
258 d0_uart0_rxd: d0-uart0-rxd-pins {
259 pinctrl-single,pins = <
260 /* (P4) MCU_UART0_RXD */
261 AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4)
262 >;
263 };
264
265 d0_gpio: d0-gpio-pins {
266 pinctrl-single,pins = <
267 /* (P4) WKUP_GPIO0_29 */
268 AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 7)
269 >;
270 };
271
272 d0_gpio_pullup: d0-gpio-pullup-pins {
273 pinctrl-single,pins = <
274 /* (P4) WKUP_GPIO0_29 */
275 AM65X_WKUP_IOPAD(0x0044, PIN_INPUT_PULLUP, 7)
276 >;
277 };
278
279 d0_gpio_pulldown: d0-gpio-pulldown-pins {
280 pinctrl-single,pins = <
281 /* (P4) WKUP_GPIO0_29 */
282 AM65X_WKUP_IOPAD(0x0044, PIN_INPUT_PULLDOWN, 7)
283 >;
284 };
285
286 d1_uart0_txd: d1-uart0-txd-pins {
287 pinctrl-single,pins = <
288 /* (P5) MCU_UART0_TXD */
289 AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4)
290 >;
291 };
292
293 d1_gpio: d1-gpio-pins {
294 pinctrl-single,pins = <
295 /* (P5) WKUP_GPIO0_30 */
296 AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7)
297 >;
298 };
299
300 d1_gpio_pullup: d1-gpio-pullup-pins {
301 pinctrl-single,pins = <
302 /* (P5) WKUP_GPIO0_30 */
303 AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7)
304 >;
305 };
306
307 d1_gpio_pulldown: d1-gpio-pulldown-pins {
308 pinctrl-single,pins = <
309 /* (P5) WKUP_GPIO0_30 */
310 AM65X_WKUP_IOPAD(0x0048, PIN_INPUT_PULLDOWN, 7)
311 >;
312 };
313
314 d2_uart0_ctsn: d2-uart0-ctsn-pins {
315 pinctrl-single,pins = <
316 /* (P1) MCU_UART0_CTSn */
317 AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4)
318 >;
319 };
320
321 d2_gpio: d2-gpio-pins {
322 pinctrl-single,pins = <
323 /* (P5) WKUP_GPIO0_31 */
324 AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7)
325 >;
326 };
327
328 d2_gpio_pullup: d2-gpio-pullup-pins {
329 pinctrl-single,pins = <
330 /* (P5) WKUP_GPIO0_31 */
331 AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7)
332 >;
333 };
334
335 d2_gpio_pulldown: d2-gpio-pulldown-pins {
336 pinctrl-single,pins = <
337 /* (P5) WKUP_GPIO0_31 */
338 AM65X_WKUP_IOPAD(0x004C, PIN_INPUT_PULLDOWN, 7)
339 >;
340 };
341
342 d3_uart0_rtsn: d3-uart0-rtsn-pins {
343 pinctrl-single,pins = <
344 /* (N3) MCU_UART0_RTSn */
345 AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4)
346 >;
347 };
348
349 d3_gpio: d3-gpio-pins {
350 pinctrl-single,pins = <
351 /* (N3) WKUP_GPIO0_33 */
352 AM65X_WKUP_IOPAD(0x0054, PIN_INPUT, 7)
353 >;
354 };
355
356 d3_gpio_pullup: d3-gpio-pullup-pins {
357 pinctrl-single,pins = <
358 /* (N3) WKUP_GPIO0_33 */
359 AM65X_WKUP_IOPAD(0x0054, PIN_INPUT, 7)
360 >;
361 };
362
363 d3_gpio_pulldown: d3-gpio-pulldown-pins {
364 pinctrl-single,pins = <
365 /* (N3) WKUP_GPIO0_33 */
366 AM65X_WKUP_IOPAD(0x0054, PIN_INPUT_PULLDOWN, 7)
367 >;
368 };
369
370 d10_spi0_cs0: d10-spi0-cs0-pins {
371 pinctrl-single,pins = <
372 /* (Y4) MCU_SPI0_CS0 */
373 AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0)
374 >;
375 };
376
377 d10_gpio: d10-gpio-pins {
378 pinctrl-single,pins = <
379 /* (Y4) WKUP_GPIO0_51 */
380 AM65X_WKUP_IOPAD(0x009c, PIN_INPUT, 7)
381 >;
382 };
383
384 d10_gpio_pullup: d10-gpio-pullup-pins {
385 pinctrl-single,pins = <
386 /* (Y4) WKUP_GPIO0_51 */
387 AM65X_WKUP_IOPAD(0x009c, PIN_INPUT, 7)
388 >;
389 };
390
391 d10_gpio_pulldown: d10-gpio-pulldown-pins {
392 pinctrl-single,pins = <
393 /* (Y4) WKUP_GPIO0_51 */
394 AM65X_WKUP_IOPAD(0x009c, PIN_INPUT_PULLDOWN, 7)
395 >;
396 };
397
398 d11_spi0_d0: d11-spi0-d0-pins {
399 pinctrl-single,pins = <
400 /* (Y3) MCU_SPI0_D0 */
401 AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 0)
402 >;
403 };
404
405 d11_gpio: d11-gpio-pins {
406 pinctrl-single,pins = <
407 /* (Y3) WKUP_GPIO0_49 */
408 AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 7)
409 >;
410 };
411
412 d11_gpio_pullup: d11-gpio-pullup-pins {
413 pinctrl-single,pins = <
414 /* (Y3) WKUP_GPIO0_49 */
415 AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 7)
416 >;
417 };
418
419 d11_gpio_pulldown: d11-gpio-pulldown-pins {
420 pinctrl-single,pins = <
421 /* (Y3) WKUP_GPIO0_49 */
422 AM65X_WKUP_IOPAD(0x0094, PIN_INPUT_PULLDOWN, 7)
423 >;
424 };
425
426 d12_spi0_d1: d12-spi0-d1-pins {
427 pinctrl-single,pins = <
428 /* (Y2) MCU_SPI0_D1 */
429 AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 0)
430 >;
431 };
432
433 d12_gpio: d12-gpio-pins {
434 pinctrl-single,pins = <
435 /* (Y2) WKUP_GPIO0_50 */
436 AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 7)
437 >;
438 };
439
440 d12_gpio_pullup: d12-gpio-pullup-pins {
441 pinctrl-single,pins = <
442 /* (Y2) WKUP_GPIO0_50 */
443 AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 7)
444 >;
445 };
446
447 d12_gpio_pulldown: d12-gpio-pulldown-pins {
448 pinctrl-single,pins = <
449 /* (Y2) WKUP_GPIO0_50 */
450 AM65X_WKUP_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7)
451 >;
452 };
453
454 d13_spi0_clk: d13-spi0-clk-pins {
455 pinctrl-single,pins = <
456 /* (Y1) MCU_SPI0_CLK */
457 AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0)
458 >;
459 };
460
461 d13_gpio: d13-gpio-pins {
462 pinctrl-single,pins = <
463 /* (Y1) WKUP_GPIO0_48 */
464 AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 7)
465 >;
466 };
467
468 d13_gpio_pullup: d13-gpio-pullup-pins {
469 pinctrl-single,pins = <
470 /* (Y1) WKUP_GPIO0_48 */
471 AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 7)
472 >;
473 };
474
475 d13_gpio_pulldown: d13-gpio-pulldown-pins {
476 pinctrl-single,pins = <
477 /* (Y1) WKUP_GPIO0_48 */
478 AM65X_WKUP_IOPAD(0x0090, PIN_INPUT_PULLDOWN, 7)
479 >;
480 };
481
482 a0_gpio: a0-gpio-pins {
483 pinctrl-single,pins = <
484 /* (L6) WKUP_GPIO0_45 */
485 AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 7)
486 >;
487 };
488
489 a0_gpio_pullup: a0-gpio-pullup-pins {
490 pinctrl-single,pins = <
491 /* (L6) WKUP_GPIO0_45 */
492 AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 7)
493 >;
494 };
495
496 a0_gpio_pulldown: a0-gpio-pulldown-pins {
497 pinctrl-single,pins = <
498 /* (L6) WKUP_GPIO0_45 */
499 AM65X_WKUP_IOPAD(0x0084, PIN_INPUT_PULLDOWN, 7)
500 >;
501 };
502
503 a1_gpio: a1-gpio-pins {
504 pinctrl-single,pins = <
505 /* (M6) WKUP_GPIO0_44 */
506 AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 7)
507 >;
508 };
509
510 a1_gpio_pullup: a1-gpio-pullup-pins {
511 pinctrl-single,pins = <
512 /* (M6) WKUP_GPIO0_44 */
513 AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 7)
514 >;
515 };
516
517 a1_gpio_pulldown: a1-gpio-pulldown-pins {
518 pinctrl-single,pins = <
519 /* (M6) WKUP_GPIO0_44 */
520 AM65X_WKUP_IOPAD(0x0080, PIN_INPUT_PULLDOWN, 7)
521 >;
522 };
523
524 a2_gpio: a2-gpio-pins {
525 pinctrl-single,pins = <
526 /* (L5) WKUP_GPIO0_43 */
527 AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7)
528 >;
529 };
530
531 a2_gpio_pullup: a2-gpio-pullup-pins {
532 pinctrl-single,pins = <
533 /* (L5) WKUP_GPIO0_43 */
534 AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7)
535 >;
536 };
537
538 a2_gpio_pulldown: a2-gpio-pulldown-pins {
539 pinctrl-single,pins = <
540 /* (L5) WKUP_GPIO0_43 */
541 AM65X_WKUP_IOPAD(0x007C, PIN_INPUT_PULLDOWN, 7)
542 >;
543 };
544
545 a3_gpio: a3-gpio-pins {
546 pinctrl-single,pins = <
547 /* (M5) WKUP_GPIO0_39 */
548 AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7)
549 >;
550 };
551
552 a3_gpio_pullup: a3-gpio-pullup-pins {
553 pinctrl-single,pins = <
554 /* (M5) WKUP_GPIO0_39 */
555 AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7)
556 >;
557 };
558
559 a3_gpio_pulldown: a3-gpio-pulldown-pins {
560 pinctrl-single,pins = <
561 /* (M5) WKUP_GPIO0_39 */
562 AM65X_WKUP_IOPAD(0x006C, PIN_INPUT_PULLDOWN, 7)
563 >;
564 };
565
566 a4_gpio: a4-gpio-pins {
567 pinctrl-single,pins = <
568 /* (L2) WKUP_GPIO0_42 */
569 AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 7)
570 >;
571 };
572
573 a4_gpio_pullup: a4-gpio-pullup-pins {
574 pinctrl-single,pins = <
575 /* (L2) WKUP_GPIO0_42 */
576 AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 7)
577 >;
578 };
579
580 a4_gpio_pulldown: a4-gpio-pulldown-pins {
581 pinctrl-single,pins = <
582 /* (L2) WKUP_GPIO0_42 */
583 AM65X_WKUP_IOPAD(0x0078, PIN_INPUT_PULLDOWN, 7)
584 >;
585 };
586
587 a5_gpio: a5-gpio-pins {
588 pinctrl-single,pins = <
589 /* (N5) WKUP_GPIO0_35 */
590 AM65X_WKUP_IOPAD(0x005C, PIN_INPUT, 7)
591 >;
592 };
593
594 a5_gpio_pullup: a5-gpio-pullup-pins {
595 pinctrl-single,pins = <
596 /* (N5) WKUP_GPIO0_35 */
597 AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLUP, 7)
598 >;
599 };
600
601 a5_gpio_pulldown: a5-gpio-pulldown-pins {
602 pinctrl-single,pins = <
603 /* (N5) WKUP_GPIO0_35 */
604 AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLDOWN, 7)
605 >;
606 };
607
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]608 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
609 pinctrl-single,pins = <
610 /* (AC7) WKUP_I2C0_SCL */
611 AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0)
612 /* (AD6) WKUP_I2C0_SDA */
613 AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0)
614 >;
615 };
616
617 mcu_i2c0_pins_default: mcu-i2c0-default-pins {
618 pinctrl-single,pins = <
619 /* (AD8) MCU_I2C0_SCL */
620 AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0)
621 /* (AD7) MCU_I2C0_SDA */
622 AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0)
623 >;
624 };
625
626 arduino_i2c_aio_switch_pins_default: arduino-i2c-aio-switch-default-pins {
627 pinctrl-single,pins = <
628 /* (R2) WKUP_GPIO0_21 */
629 AM65X_WKUP_IOPAD(0x0024, PIN_OUTPUT, 7)
630 >;
631 };
632
633 push_button_pins_default: push-button-default-pins {
634 pinctrl-single,pins = <
635 /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
636 AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7)
637 >;
638 };
639
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]640
641 arduino_io_oe_pins_default: arduino-io-oe-default-pins {
642 pinctrl-single,pins = <
643 /* (N4) WKUP_GPIO0_34 */
644 AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 7)
645 /* (M2) WKUP_GPIO0_36 */
646 AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 7)
647 /* (M3) WKUP_GPIO0_37 */
648 AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 7)
649 /* (M4) WKUP_GPIO0_38 */
650 AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 7)
651 /* (M1) WKUP_GPIO0_41 */
652 AM65X_WKUP_IOPAD(0x0074, PIN_OUTPUT, 7)
653 >;
654 };
655
656 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
657 pinctrl-single,pins = <
658 /* (V1) MCU_OSPI0_CLK */
659 AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0)
660 /* (U2) MCU_OSPI0_DQS */
661 AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)
662 /* (U4) MCU_OSPI0_D0 */
663 AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)
664 /* (U5) MCU_OSPI0_D1 */
665 AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)
666 /* (R4) MCU_OSPI0_CSn0 */
667 AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0)
668 >;
669 };
670
671 db9_com_mode_pins_default: db9-com-mode-default-pins {
672 pinctrl-single,pins = <
673 /* (AD3) WKUP_GPIO0_5, used as uart0 mode 0 */
674 AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7)
675 /* (AC3) WKUP_GPIO0_4, used as uart0 mode 1 */
676 AM65X_WKUP_IOPAD(0x00c0, PIN_OUTPUT, 7)
677 /* (AC1) WKUP_GPIO0_7, used as uart0 term */
678 AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 7)
679 /* (AC2) WKUP_GPIO0_6, used as uart0 en */
680 AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7)
681 >;
682 };
683
684 leds_pins_default: leds-default-pins {
685 pinctrl-single,pins = <
686 /* (T2) WKUP_GPIO0_17, used as user led1 red */
687 AM65X_WKUP_IOPAD(0x0014, PIN_OUTPUT, 7)
688 /* (R3) WKUP_GPIO0_22, used as user led1 green */
689 AM65X_WKUP_IOPAD(0x0028, PIN_OUTPUT, 7)
690 /* (R5) WKUP_GPIO0_24, used as status led red */
691 AM65X_WKUP_IOPAD(0x0030, PIN_OUTPUT, 7)
692 /* (N2) WKUP_GPIO0_32, used as status led green */
693 AM65X_WKUP_IOPAD(0x0050, PIN_OUTPUT, 7)
694 >;
695 };
696
697 mcu_spi0_pins_default: mcu-spi0-default-pins {
698 pinctrl-single,pins = <
699 /* (Y1) MCU_SPI0_CLK */
700 AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0)
701 /* (Y3) MCU_SPI0_D0 */
702 AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 0)
703 /* (Y2) MCU_SPI0_D1 */
704 AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 0)
705 /* (Y4) MCU_SPI0_CS0 */
706 AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0)
707 >;
708 };
709
710 minipcie_pins_default: minipcie-default-pins {
711 pinctrl-single,pins = <
712 /* (P2) MCU_OSPI1_DQS.WKUP_GPIO0_27 */
713 AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7)
714 >;
715 };
716};
717
718&main_pmx0 {
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]719 pinctrl-names =
720 "default",
721 "d4-ehrpwm0-a", "d4-gpio", "d4-gpio-pullup", "d4-gpio-pulldown",
722 "d5-ehrpwm1-a", "d5-gpio", "d5-gpio-pullup", "d5-gpio-pulldown",
723 "d6-ehrpwm2-a", "d6-gpio", "d6-gpio-pullup", "d6-gpio-pulldown",
724 "d7-ehrpwm3-a", "d7-gpio", "d7-gpio-pullup", "d7-gpio-pulldown",
725 "d8-ehrpwm4-a", "d8-gpio", "d8-gpio-pullup", "d8-gpio-pulldown",
726 "d9-ehrpwm5-a", "d9-gpio", "d9-gpio-pullup", "d9-gpio-pulldown";
727
728 pinctrl-0 = <&d4_ehrpwm0_a>;
729 pinctrl-1 = <&d4_ehrpwm0_a>;
730 pinctrl-2 = <&d4_gpio>;
731 pinctrl-3 = <&d4_gpio_pullup>;
732 pinctrl-4 = <&d4_gpio_pulldown>;
733
734 pinctrl-5 = <&d5_ehrpwm1_a>;
735 pinctrl-6 = <&d5_gpio>;
736 pinctrl-7 = <&d5_gpio_pullup>;
737 pinctrl-8 = <&d5_gpio_pulldown>;
738
739 pinctrl-9 = <&d6_ehrpwm2_a>;
740 pinctrl-10 = <&d6_gpio>;
741 pinctrl-11 = <&d6_gpio_pullup>;
742 pinctrl-12 = <&d6_gpio_pulldown>;
743
744 pinctrl-13 = <&d7_ehrpwm3_a>;
745 pinctrl-14 = <&d7_gpio>;
746 pinctrl-15 = <&d7_gpio_pullup>;
747 pinctrl-16 = <&d7_gpio_pulldown>;
748
749 pinctrl-17 = <&d8_ehrpwm4_a>;
750 pinctrl-18 = <&d8_gpio>;
751 pinctrl-19 = <&d8_gpio_pullup>;
752 pinctrl-20 = <&d8_gpio_pulldown>;
753
754 pinctrl-21 = <&d9_ehrpwm5_a>;
755 pinctrl-22 = <&d9_gpio>;
756 pinctrl-23 = <&d9_gpio_pullup>;
757 pinctrl-24 = <&d9_gpio_pulldown>;
758
759 d4_ehrpwm0_a: d4-ehrpwm0-a-pins {
760 pinctrl-single,pins = <
761 /* (AG18) EHRPWM0_A */
762 AM65X_IOPAD(0x0084, PIN_OUTPUT, 5)
763 >;
764 };
765
766 d4_gpio: d4-gpio-pins {
767 pinctrl-single,pins = <
768 /* (AG18) GPIO0_33 */
769 AM65X_IOPAD(0x0084, PIN_INPUT, 7)
770 >;
771 };
772
773 d4_gpio_pullup: d4-gpio-pullup-pins {
774 pinctrl-single,pins = <
775 /* (AG18) GPIO0_33 */
776 AM65X_IOPAD(0x0084, PIN_INPUT_PULLUP, 7)
777 >;
778 };
779
780 d4_gpio_pulldown: d4-gpio-pulldown-pins {
781 pinctrl-single,pins = <
782 /* (AG18) GPIO0_33 */
783 AM65X_IOPAD(0x0084, PIN_INPUT_PULLDOWN, 7)
784 >;
785 };
786
787 d5_ehrpwm1_a: d5-ehrpwm1-a-pins {
788 pinctrl-single,pins = <
789 /* (AF17) EHRPWM1_A */
790 AM65X_IOPAD(0x008C, PIN_OUTPUT, 5)
791 >;
792 };
793
794 d5_gpio: d5-gpio-pins {
795 pinctrl-single,pins = <
796 /* (AF17) GPIO0_35 */
797 AM65X_IOPAD(0x008C, PIN_INPUT, 7)
798 >;
799 };
800
801 d5_gpio_pullup: d5-gpio-pullup-pins {
802 pinctrl-single,pins = <
803 /* (AF17) GPIO0_35 */
804 AM65X_IOPAD(0x008C, PIN_INPUT_PULLUP, 7)
805 >;
806 };
807
808 d5_gpio_pulldown: d5-gpio-pulldown-pins {
809 pinctrl-single,pins = <
810 /* (AF17) GPIO0_35 */
811 AM65X_IOPAD(0x008C, PIN_INPUT_PULLDOWN, 7)
812 >;
813 };
814
815 d6_ehrpwm2_a: d6-ehrpwm2-a-pins {
816 pinctrl-single,pins = <
817 /* (AH16) EHRPWM2_A */
818 AM65X_IOPAD(0x0098, PIN_OUTPUT, 5)
819 >;
820 };
821
822 d6_gpio: d6-gpio-pins {
823 pinctrl-single,pins = <
824 /* (AH16) GPIO0_38 */
825 AM65X_IOPAD(0x0098, PIN_INPUT, 7)
826 >;
827 };
828
829 d6_gpio_pullup: d6-gpio-pullup-pins {
830 pinctrl-single,pins = <
831 /* (AH16) GPIO0_38 */
832 AM65X_IOPAD(0x0098, PIN_INPUT_PULLUP, 7)
833 >;
834 };
835
836 d6_gpio_pulldown: d6-gpio-pulldown-pins {
837 pinctrl-single,pins = <
838 /* (AH16) GPIO0_38 */
839 AM65X_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7)
840 >;
841 };
842
843 d7_ehrpwm3_a: d7-ehrpwm3-a-pins {
844 pinctrl-single,pins = <
845 /* (AH15) EHRPWM3_A */
846 AM65X_IOPAD(0x00AC, PIN_OUTPUT, 5)
847 >;
848 };
849
850 d7_gpio: d7-gpio-pins {
851 pinctrl-single,pins = <
852 /* (AH15) GPIO0_43 */
853 AM65X_IOPAD(0x00AC, PIN_INPUT, 7)
854 >;
855 };
856
857 d7_gpio_pullup: d7-gpio-pullup-pins {
858 pinctrl-single,pins = <
859 /* (AH15) GPIO0_43 */
860 AM65X_IOPAD(0x00AC, PIN_INPUT_PULLUP, 7)
861 >;
862 };
863
864 d7_gpio_pulldown: d7-gpio-pulldown-pins {
865 pinctrl-single,pins = <
866 /* (AH15) GPIO0_43 */
867 AM65X_IOPAD(0x00AC, PIN_INPUT_PULLDOWN, 7)
868 >;
869 };
870
871 d8_ehrpwm4_a: d8-ehrpwm4-a-pins {
872 pinctrl-single,pins = <
873 /* (AG15) EHRPWM4_A */
874 AM65X_IOPAD(0x00C0, PIN_OUTPUT, 5)
875 >;
876 };
877
878 d8_gpio: d8-gpio-pins {
879 pinctrl-single,pins = <
880 /* (AG15) GPIO0_48 */
881 AM65X_IOPAD(0x00C0, PIN_INPUT, 7)
882 >;
883 };
884
885 d8_gpio_pullup: d8-gpio-pullup-pins {
886 pinctrl-single,pins = <
887 /* (AG15) GPIO0_48 */
888 AM65X_IOPAD(0x00C0, PIN_INPUT_PULLUP, 7)
889 >;
890 };
891
892 d8_gpio_pulldown: d8-gpio-pulldown-pins {
893 pinctrl-single,pins = <
894 /* (AG15) GPIO0_48 */
895 AM65X_IOPAD(0x00C0, PIN_INPUT_PULLDOWN, 7)
896 >;
897 };
898
899 d9_ehrpwm5_a: d9-ehrpwm5-a-pins {
900 pinctrl-single,pins = <
901 /* (AD15) EHRPWM5_A */
902 AM65X_IOPAD(0x00CC, PIN_OUTPUT, 5)
903 >;
904 };
905
906 d9_gpio: d9-gpio-pins {
907 pinctrl-single,pins = <
908 /* (AD15) GPIO0_51 */
909 AM65X_IOPAD(0x00CC, PIN_INPUT, 7)
910 >;
911 };
912
913 d9_gpio_pullup: d9-gpio-pullup-pins {
914 pinctrl-single,pins = <
915 /* (AD15) GPIO0_51 */
916 AM65X_IOPAD(0x00CC, PIN_INPUT_PULLUP, 7)
917 >;
918 };
919
920 d9_gpio_pulldown: d9-gpio-pulldown-pins {
921 pinctrl-single,pins = <
922 /* (AD15) GPIO0_51 */
923 AM65X_IOPAD(0x00CC, PIN_INPUT_PULLDOWN, 7)
924 >;
925 };
926
927 main_pcie_enable_pins_default: main-pcie-enable-default-pins {
928 pinctrl-single,pins = <
929 AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */
930 >;
931 };
932
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]933 main_uart1_pins_default: main-uart1-default-pins {
934 pinctrl-single,pins = <
935 AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) UART1_RXD */
936 AM65X_IOPAD(0x014c, PIN_OUTPUT, 6) /* (AD23) UART1_TXD */
937 AM65X_IOPAD(0x0178, PIN_INPUT, 6) /* (AD22) UART1_CTSn */
938 AM65X_IOPAD(0x017c, PIN_OUTPUT, 6) /* (AC21) UART1_RTSn */
939 >;
940 };
941
942 main_i2c3_pins_default: main-i2c3-default-pins {
943 pinctrl-single,pins = <
944 AM65X_IOPAD(0x01c0, PIN_INPUT, 2) /* (AF13) I2C3_SCL */
945 AM65X_IOPAD(0x01d4, PIN_INPUT, 2) /* (AG12) I2C3_SDA */
946 >;
947 };
948
949 main_mmc1_pins_default: main-mmc1-default-pins {
950 pinctrl-single,pins = <
951 AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
952 AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
953 AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
954 AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
955 AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
956 AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
957 AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
958 AM65X_IOPAD(0x02e0, PIN_INPUT_PULLUP, 0) /* (C24) MMC1_SDWP */
959 >;
960 };
961
962 usb0_pins_default: usb0-default-pins {
963 pinctrl-single,pins = <
964 AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
965 >;
966 };
967
968 usb1_pins_default: usb1-default-pins {
969 pinctrl-single,pins = <
970 AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
971 >;
972 };
973
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]974 dss_vout1_pins_default: dss-vout1-default-pins {
975 pinctrl-single,pins = <
976 AM65X_IOPAD(0x0000, PIN_OUTPUT, 1) /* VOUT1_DATA0 */
977 AM65X_IOPAD(0x0004, PIN_OUTPUT, 1) /* VOUT1_DATA1 */
978 AM65X_IOPAD(0x0008, PIN_OUTPUT, 1) /* VOUT1_DATA2 */
979 AM65X_IOPAD(0x000c, PIN_OUTPUT, 1) /* VOUT1_DATA3 */
980 AM65X_IOPAD(0x0010, PIN_OUTPUT, 1) /* VOUT1_DATA4 */
981 AM65X_IOPAD(0x0014, PIN_OUTPUT, 1) /* VOUT1_DATA5 */
982 AM65X_IOPAD(0x0018, PIN_OUTPUT, 1) /* VOUT1_DATA6 */
983 AM65X_IOPAD(0x001c, PIN_OUTPUT, 1) /* VOUT1_DATA7 */
984 AM65X_IOPAD(0x0020, PIN_OUTPUT, 1) /* VOUT1_DATA8 */
985 AM65X_IOPAD(0x0024, PIN_OUTPUT, 1) /* VOUT1_DATA9 */
986 AM65X_IOPAD(0x0028, PIN_OUTPUT, 1) /* VOUT1_DATA10 */
987 AM65X_IOPAD(0x002c, PIN_OUTPUT, 1) /* VOUT1_DATA11 */
988 AM65X_IOPAD(0x0030, PIN_OUTPUT, 1) /* VOUT1_DATA12 */
989 AM65X_IOPAD(0x0034, PIN_OUTPUT, 1) /* VOUT1_DATA13 */
990 AM65X_IOPAD(0x0038, PIN_OUTPUT, 1) /* VOUT1_DATA14 */
991 AM65X_IOPAD(0x003c, PIN_OUTPUT, 1) /* VOUT1_DATA15 */
992 AM65X_IOPAD(0x0040, PIN_OUTPUT, 1) /* VOUT1_DATA16 */
993 AM65X_IOPAD(0x0044, PIN_OUTPUT, 1) /* VOUT1_DATA17 */
994 AM65X_IOPAD(0x0048, PIN_OUTPUT, 1) /* VOUT1_DATA18 */
995 AM65X_IOPAD(0x004c, PIN_OUTPUT, 1) /* VOUT1_DATA19 */
996 AM65X_IOPAD(0x0050, PIN_OUTPUT, 1) /* VOUT1_DATA20 */
997 AM65X_IOPAD(0x0054, PIN_OUTPUT, 1) /* VOUT1_DATA21 */
998 AM65X_IOPAD(0x0058, PIN_OUTPUT, 1) /* VOUT1_DATA22 */
999 AM65X_IOPAD(0x005c, PIN_OUTPUT, 1) /* VOUT1_DATA23 */
1000 AM65X_IOPAD(0x0060, PIN_OUTPUT, 1) /* VOUT1_VSYNC */
1001 AM65X_IOPAD(0x0064, PIN_OUTPUT, 1) /* VOUT1_HSYNC */
1002 AM65X_IOPAD(0x0068, PIN_OUTPUT, 1) /* VOUT1_PCLK */
1003 AM65X_IOPAD(0x006c, PIN_OUTPUT, 1) /* VOUT1_DE */
1004 >;
1005 };
1006
1007 dp_pins_default: dp-default-pins {
1008 pinctrl-single,pins = <
1009 AM65X_IOPAD(0x0078, PIN_OUTPUT, 7) /* (AF18) DP rst_n */
1010 >;
1011 };
1012
1013 main_i2c2_pins_default: main-i2c2-default-pins {
1014 pinctrl-single,pins = <
1015 AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) I2C2_SCL */
1016 AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) I2C2_SDA */
1017 >;
1018 };
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1019
1020 icssg0_mdio_pins_default: icssg0-mdio-default-pins {
1021 pinctrl-single,pins = <
1022 AM65X_IOPAD(0x0294, PIN_INPUT, 0) /* (AE26) PRG0_MDIO0_MDIO */
1023 AM65X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AE28) PRG0_MDIO0_MDC */
1024 >;
1025 };
1026
1027 icssg0_rgmii_pins_default: icssg0-rgmii-default-pins {
1028 pinctrl-single,pins = <
1029 AM65X_IOPAD(0x0244, PIN_INPUT, 2) /* (AB28) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */
1030 AM65X_IOPAD(0x0248, PIN_INPUT, 2) /* (AC28) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */
1031 AM65X_IOPAD(0x024c, PIN_INPUT, 2) /* (AC27) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */
1032 AM65X_IOPAD(0x0250, PIN_INPUT, 2) /* (AB26) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */
1033 AM65X_IOPAD(0x0274, PIN_OUTPUT, 2) /* (AC25) PRG0_PRU1_GPO12.PRG0_RGMII2_TD0 */
1034 AM65X_IOPAD(0x0278, PIN_OUTPUT, 2) /* (AD25) PRG0_PRU1_GPO13.PRG0_RGMII2_TD1 */
1035 AM65X_IOPAD(0x027c, PIN_OUTPUT, 2) /* (AD24) PRG0_PRU1_GPO14.PRG0_RGMII2_TD2 */
1036 AM65X_IOPAD(0x0280, PIN_OUTPUT, 2) /* (AE27) PRG0_PRU1_GPO15.PRG0_RGMII2_TD3 */
1037 AM65X_IOPAD(0x0284, PIN_INPUT, 2) /* (AC24) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */
1038 AM65X_IOPAD(0x0270, PIN_OUTPUT, 2) /* (AB24) PRG0_PRU1_GPO11.PRG0_RGMII2_TX_CTL */
1039 AM65X_IOPAD(0x025c, PIN_INPUT, 2) /* (AB27) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */
1040 AM65X_IOPAD(0x0254, PIN_INPUT, 2) /* (AA25) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */
1041
1042 AM65X_IOPAD(0x01f4, PIN_INPUT, 2) /* (V24) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */
1043 AM65X_IOPAD(0x01f8, PIN_INPUT, 2) /* (W25) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */
1044 AM65X_IOPAD(0x01fc, PIN_INPUT, 2) /* (W24) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */
1045 AM65X_IOPAD(0x0200, PIN_INPUT, 2) /* (AA27) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */
1046 AM65X_IOPAD(0x0224, PIN_OUTPUT, 2) /* (AD27) PRG0_PRU0_GPO12.PRG0_RGMII1_TD0 */
1047 AM65X_IOPAD(0x0228, PIN_OUTPUT, 2) /* (AC26) PRG0_PRU0_GPO13.PRG0_RGMII1_TD1 */
1048 AM65X_IOPAD(0x022c, PIN_OUTPUT, 2) /* (AD26) PRG0_PRU0_GPO14.PRG0_RGMII1_TD2 */
1049 AM65X_IOPAD(0x0230, PIN_OUTPUT, 2) /* (AA24) PRG0_PRU0_GPO15.PRG0_RGMII1_TD3 */
1050 AM65X_IOPAD(0x0234, PIN_INPUT, 2) /* (AD28) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */
1051 AM65X_IOPAD(0x0220, PIN_OUTPUT, 2) /* (AB25) PRG0_PRU0_GPO11.PRG0_RGMII1_TX_CTL */
1052 AM65X_IOPAD(0x020c, PIN_INPUT, 2) /* (Y25) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */
1053 AM65X_IOPAD(0x0204, PIN_INPUT, 2) /* (Y24) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */
1054 >;
1055 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1056};
1057
1058&main_pmx1 {
1059 main_i2c0_pins_default: main-i2c0-default-pins {
1060 pinctrl-single,pins = <
1061 AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
1062 AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
1063 >;
1064 };
1065
1066 main_i2c1_pins_default: main-i2c1-default-pins {
1067 pinctrl-single,pins = <
1068 AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
1069 AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
1070 >;
1071 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1072};
1073
1074&wkup_uart0 {
1075 /* Wakeup UART is used by System firmware */
1076 status = "reserved";
1077};
1078
1079&main_uart1 {
1080 status = "okay";
1081 pinctrl-names = "default";
1082 pinctrl-0 = <&main_uart1_pins_default>;
1083};
1084
1085&mcu_uart0 {
1086 status = "okay";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1087};
1088
1089&main_gpio0 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1090 gpio-line-names =
1091 "main_gpio0-base", "", "", "", "", "", "", "", "", "",
1092 "", "", "", "", "", "", "", "", "", "",
1093 "", "", "", "", "", "", "", "", "", "",
1094 "", "", "", "IO4", "", "IO5", "", "", "IO6", "",
1095 "", "", "", "IO7", "", "", "", "", "IO8", "",
1096 "", "IO9";
1097};
1098
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1099&main_gpio1 {
1100 pinctrl-names = "default";
1101 pinctrl-0 = <&main_pcie_enable_pins_default>;
1102};
1103
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1104&wkup_gpio0 {
1105 pinctrl-names = "default";
1106 pinctrl-0 =
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1107 <&arduino_i2c_aio_switch_pins_default>,
1108 <&arduino_io_oe_pins_default>,
1109 <&push_button_pins_default>,
1110 <&db9_com_mode_pins_default>;
1111 gpio-line-names =
1112 /* 0..9 */
1113 "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0",
1114 "UART0-enable", "UART0-terminate", "", "WIFI-disable",
1115 /* 10..19 */
1116 "", "", "", "", "", "", "", "", "", "",
1117 /* 20..29 */
1118 "", "A4A5-I2C-mux", "", "", "", "USER-button", "", "", "","IO0",
1119 /* 30..39 */
1120 "IO1", "IO2", "", "IO3", "IO17-direction", "A5",
1121 "IO16-direction", "IO15-direction", "IO14-direction", "A3",
1122 /* 40..49 */
1123 "", "IO18-direction", "A4", "A2", "A1", "A0", "", "", "IO13",
1124 "IO11",
1125 /* 50..51 */
1126 "IO12", "IO10";
1127};
1128
1129&wkup_i2c0 {
1130 status = "okay";
1131 pinctrl-names = "default";
1132 pinctrl-0 = <&wkup_i2c0_pins_default>;
1133 clock-frequency = <400000>;
1134};
1135
1136&mcu_i2c0 {
1137 status = "okay";
1138 pinctrl-names = "default";
1139 pinctrl-0 = <&mcu_i2c0_pins_default>;
1140 clock-frequency = <400000>;
1141
1142 psu: regulator@60 {
1143 compatible = "ti,tps62363";
1144 reg = <0x60>;
1145 regulator-name = "tps62363-vout";
1146 regulator-min-microvolt = <500000>;
1147 regulator-max-microvolt = <1500000>;
1148 regulator-boot-on;
1149 ti,vsel0-state-high;
1150 ti,vsel1-state-high;
1151 ti,enable-vout-discharge;
1152 };
1153
1154 /* D4200 */
1155 pcal9535_1: gpio@20 {
1156 compatible = "nxp,pcal9535";
1157 reg = <0x20>;
1158 #gpio-cells = <2>;
1159 gpio-controller;
1160 gpio-line-names =
1161 "A0-pull", "A1-pull", "A2-pull", "A3-pull", "A4-pull",
1162 "A5-pull", "", "",
1163 "IO14-enable", "IO15-enable", "IO16-enable",
1164 "IO17-enable", "IO18-enable", "IO19-enable";
1165 };
1166
1167 /* D4201 */
1168 pcal9535_2: gpio@21 {
1169 compatible = "nxp,pcal9535";
1170 reg = <0x21>;
1171 #gpio-cells = <2>;
1172 gpio-controller;
1173 gpio-line-names =
1174 "IO0-direction", "IO1-direction", "IO2-direction",
1175 "IO3-direction", "IO4-direction", "IO5-direction",
1176 "IO6-direction", "IO7-direction",
1177 "IO8-direction", "IO9-direction", "IO10-direction",
1178 "IO11-direction", "IO12-direction", "IO13-direction",
1179 "IO19-direction";
1180 };
1181
1182 /* D4202 */
1183 pcal9535_3: gpio@25 {
1184 compatible = "nxp,pcal9535";
1185 reg = <0x25>;
1186 #gpio-cells = <2>;
1187 gpio-controller;
1188 gpio-line-names =
1189 "IO0-pull", "IO1-pull", "IO2-pull", "IO3-pull",
1190 "IO4-pull", "IO5-pull", "IO6-pull", "IO7-pull",
1191 "IO8-pull", "IO9-pull", "IO10-pull", "IO11-pull",
1192 "IO12-pull", "IO13-pull";
1193 };
1194};
1195
1196&main_i2c0 {
1197 status = "okay";
1198 pinctrl-names = "default";
1199 pinctrl-0 = <&main_i2c0_pins_default>;
1200 clock-frequency = <400000>;
1201
1202 rtc: rtc@51 {
1203 compatible = "nxp,pcf8563";
1204 reg = <0x51>;
1205 };
1206
1207 eeprom: eeprom@54 {
1208 compatible = "atmel,24c08";
1209 reg = <0x54>;
1210 pagesize = <16>;
1211 };
1212};
1213
1214&main_i2c1 {
1215 status = "okay";
1216 pinctrl-names = "default";
1217 pinctrl-0 = <&main_i2c1_pins_default>;
1218 clock-frequency = <400000>;
1219};
1220
1221&main_i2c2 {
1222 status = "okay";
1223 pinctrl-names = "default";
1224 pinctrl-0 = <&main_i2c2_pins_default>;
1225 clock-frequency = <400000>;
1226};
1227
1228&main_i2c3 {
1229 status = "okay";
1230 pinctrl-names = "default";
1231 pinctrl-0 = <&main_i2c3_pins_default>;
1232 clock-frequency = <400000>;
1233
1234 #address-cells = <1>;
1235 #size-cells = <0>;
1236
1237 edp-bridge@f {
1238 compatible = "toshiba,tc358767";
1239 reg = <0x0f>;
1240 pinctrl-names = "default";
1241 pinctrl-0 = <&dp_pins_default>;
1242 reset-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>;
1243
1244 clock-names = "ref";
1245 clocks = <&dp_refclk>;
1246
1247 toshiba,hpd-pin = <0>;
1248
1249 ports {
1250 #address-cells = <1>;
1251 #size-cells = <0>;
1252
1253 port@1 {
1254 reg = <1>;
1255
1256 bridge_in: endpoint {
1257 remote-endpoint = <&dpi_out>;
1258 };
1259 };
1260 };
1261 };
1262};
1263
1264&mcu_cpsw {
1265 status = "disabled";
1266};
1267
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1268&sdhci1 {
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1269 status = "okay";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1270 pinctrl-names = "default";
1271 pinctrl-0 = <&main_mmc1_pins_default>;
1272 ti,driver-strength-ohm = <50>;
1273 disable-wp;
1274};
1275
1276&usb0 {
1277 pinctrl-names = "default";
1278 pinctrl-0 = <&usb0_pins_default>;
1279 dr_mode = "host";
1280};
1281
1282&usb1 {
1283 pinctrl-names = "default";
1284 pinctrl-0 = <&usb1_pins_default>;
1285 dr_mode = "host";
1286};
1287
1288&mcu_spi0 {
1289 status = "okay";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1290 #address-cells = <1>;
1291 #size-cells = <0>;
1292 ti,pindir-d0-out-d1-in;
1293};
1294
1295&tscadc1 {
1296 status = "okay";
1297 adc {
1298 ti,adc-channels = <0 1 2 3 4 5>;
1299 };
1300};
1301
1302&ospi0 {
1303 status = "okay";
1304 pinctrl-names = "default";
1305 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
1306
1307 flash@0 {
1308 compatible = "jedec,spi-nor";
1309 reg = <0x0>;
1310 spi-tx-bus-width = <1>;
1311 spi-rx-bus-width = <1>;
1312 spi-max-frequency = <50000000>;
1313 cdns,tshsl-ns = <60>;
1314 cdns,tsd2d-ns = <60>;
1315 cdns,tchsh-ns = <60>;
1316 cdns,tslch-ns = <60>;
1317 cdns,read-delay = <2>;
1318
1319 partitions {
1320 compatible = "fixed-partitions";
1321 #address-cells = <1>;
1322 #size-cells = <1>;
1323
1324 seboot@0 {
1325 label = "seboot";
1326 reg = <0x0 0x180000>; /* 1.5M */
1327 };
1328
1329 tispl@180000 {
1330 label = "tispl";
1331 reg = <0x180000 0x200000>; /* 2M */
1332 };
1333
1334 u-boot@380000 {
1335 label = "u-boot";
1336 reg = <0x380000 0x300000>; /* 3M */
1337 };
1338
1339 env@680000 {
1340 label = "env";
1341 reg = <0x680000 0x20000>; /* 128K */
1342 };
1343
1344 env-backup@6a0000 {
1345 label = "env.backup";
1346 reg = <0x6a0000 0x20000>; /* 128K */
1347 };
1348
1349 otpcmd@6c0000 {
1350 label = "otpcmd";
1351 reg = <0x6c0000 0x10000>; /* 64K */
1352 };
1353
1354 unused@6d0000 {
1355 label = "unused";
1356 reg = <0x6d0000 0x7b0000>; /* 7872K */
1357 };
1358
1359 seboot-backup@e80000 {
1360 label = "seboot.backup";
1361 reg = <0xe80000 0x180000>; /* 1.5M */
1362 };
1363 };
1364 };
1365};
1366
1367&dss {
1368 pinctrl-names = "default";
1369 pinctrl-0 = <&dss_vout1_pins_default>;
1370
1371 assigned-clocks = <&k3_clks 67 2>;
1372 assigned-clock-parents = <&k3_clks 67 5>;
1373};
1374
1375&dss_ports {
1376 #address-cells = <1>;
1377 #size-cells = <0>;
1378 port@1 {
1379 reg = <1>;
1380
1381 dpi_out: endpoint {
1382 remote-endpoint = <&bridge_in>;
1383 };
1384 };
1385};
1386
1387&pcie1_rc {
1388 status = "okay";
1389 pinctrl-names = "default";
1390 pinctrl-0 = <&minipcie_pins_default>;
1391
1392 num-lanes = <1>;
1393 phys = <&serdes1 PHY_TYPE_PCIE 0>;
1394 phy-names = "pcie-phy0";
1395 reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
1396};
1397
1398&mailbox0_cluster0 {
1399 status = "okay";
1400 interrupts = <436>;
1401
1402 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
1403 ti,mbox-tx = <1 0 0>;
1404 ti,mbox-rx = <0 0 0>;
1405 };
1406};
1407
1408&mailbox0_cluster1 {
1409 status = "okay";
1410 interrupts = <432>;
1411
1412 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
1413 ti,mbox-tx = <1 0 0>;
1414 ti,mbox-rx = <0 0 0>;
1415 };
1416};
1417
1418&mcu_r5fss0_core0 {
1419 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
1420 <&mcu_r5fss0_core0_memory_region>;
1421 mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
1422};
1423
1424&mcu_r5fss0_core1 {
1425 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
1426 <&mcu_r5fss0_core1_memory_region>;
1427 mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>;
1428};
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1429
1430&icssg0_mdio {
1431 status = "okay";
1432 pinctrl-names = "default";
1433 pinctrl-0 = <&icssg0_mdio_pins_default>;
1434
1435 icssg0_eth0_phy: ethernet-phy@0 {
1436 reg = <0>;
1437 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
1438 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
1439 };
1440
1441 icssg0_eth1_phy: ethernet-phy@1 {
1442 reg = <1>;
1443 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
1444 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
1445 };
1446};