dts/upstream/src/arm64/marvell/cn9131-db-comexpress.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2023 Marvell International Ltd.
 *
 * Device tree for the CN9131-DB Com Express CPU module board.
 */

#include "cn9131-db.dtsi"

/ {
	model = "Marvell Armada CN9131-DB COM EXPRESS type 7 CPU module board";
	compatible = "marvell,cn9131-cpu-module", "marvell,cn9131", "marvell,cn9130",
		     "marvell,armada-ap807-quad", "marvell,armada-ap807";

};

&ap0_reg_sd_vccq {
	regulator-max-microvolt = <1800000>;
	states = <1800000 0x1 1800000 0x0>;
	/delete-property/ gpios;
};

&cp0_reg_usb3_vbus0 {
	/delete-property/ gpio;
};

&cp0_reg_usb3_vbus1 {
	/delete-property/ gpio;
};

&cp1_reg_usb3_vbus0 {
	/delete-property/ gpio;
};

&cp0_reg_sd_vcc {
	status = "disabled";
};

&cp0_reg_sd_vccq {
	status = "disabled";
};

&cp0_sdhci0 {
	status = "disabled";
};

&cp0_eth0 {
	status = "disabled";
};

&cp0_eth1 {
	status = "okay";
	phy = <&phy0>;
	phy-mode = "rgmii-id";
};

&cp0_eth2 {
	status = "disabled";
};

&cp0_mdio {
	status = "okay";
	pinctrl-0 = <&cp0_ge_mdio_pins>;
	phy0: ethernet-phy@0 {
		status = "okay";
	};
};

&cp0_syscon0 {
	cp0_pinctrl: pinctrl {
		compatible = "marvell,cp115-standalone-pinctrl";

		cp0_ge_mdio_pins: ge-mdio-pins {
			marvell,pins = "mpp40", "mpp41";
			marvell,function = "ge";
		};
	};
};

&cp0_sdhci0 {
	status = "disabled";
};

&cp0_spi1 {
	status = "okay";
};

&cp0_usb3_0 {
	status = "okay";
	usb-phy = <&cp0_usb3_0_phy0>;
	phy-names = "usb";
	/delete-property/ phys;
};

&cp0_usb3_1 {
	status = "okay";
	usb-phy = <&cp0_usb3_0_phy1>;
	phy-names = "usb";
	/delete-property/ phys;
};

&cp1_usb3_1 {
	status = "okay";
	usb-phy = <&cp1_usb3_0_phy0>;
	/* Generic PHY, providing serdes lanes */
	phys = <&cp1_comphy3 1>;
	phy-names = "usb";
};