| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com> |
| 4 | */ |
| 5 | |
| 6 | #include "omap3-gta04a5.dts" |
| 7 | |
| 8 | / { |
| 9 | model = "Goldelico GTA04A5/Letux 2804 with OneNAND"; |
| 10 | }; |
| 11 | |
| 12 | &omap3_pmx_core { |
| 13 | gpmc_pins: gpmc-pins { |
| 14 | pinctrl-single,pins = < |
| 15 | |
| 16 | /* address lines */ |
| 17 | OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */ |
| 18 | OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */ |
| 19 | OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */ |
| 20 | |
| 21 | /* data lines, gpmc_d0..d7 not muxable according to TRM */ |
| 22 | OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */ |
| 23 | OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */ |
| 24 | OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */ |
| 25 | OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */ |
| 26 | OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */ |
| 27 | OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */ |
| 28 | OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */ |
| 29 | OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */ |
| 30 | |
| 31 | /* |
| 32 | * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable |
| 33 | * according to TRM. OneNAND seems to require PIN_INPUT on clock. |
| 34 | */ |
| 35 | OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */ |
| 36 | OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */ |
| 37 | >; |
| 38 | }; |
| 39 | }; |
| 40 | |
| 41 | &gpmc { |
| 42 | /* switch inherited setup to OneNAND */ |
| 43 | |
| 44 | ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */ |
| 45 | pinctrl-names = "default"; |
| 46 | pinctrl-0 = <&gpmc_pins>; |
| 47 | |
| 48 | /delete-node/ nand@0,0; |
| 49 | |
| 50 | onenand@0,0 { |
| 51 | |
| 52 | #address-cells = <1>; |
| 53 | #size-cells = <1>; |
| 54 | compatible = "ti,omap2-onenand"; |
| 55 | reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ |
| 56 | |
| 57 | gpmc,sync-read; |
| 58 | gpmc,sync-write; |
| 59 | gpmc,burst-length = <16>; |
| 60 | gpmc,burst-read; |
| 61 | gpmc,burst-wrap; |
| 62 | gpmc,burst-write; |
| 63 | gpmc,device-width = <2>; |
| 64 | gpmc,mux-add-data = <2>; |
| 65 | gpmc,cs-on-ns = <0>; |
| 66 | gpmc,cs-rd-off-ns = <87>; |
| 67 | gpmc,cs-wr-off-ns = <87>; |
| 68 | gpmc,adv-on-ns = <0>; |
| 69 | gpmc,adv-rd-off-ns = <10>; |
| 70 | gpmc,adv-wr-off-ns = <10>; |
| 71 | gpmc,oe-on-ns = <15>; |
| 72 | gpmc,oe-off-ns = <87>; |
| 73 | gpmc,we-on-ns = <0>; |
| 74 | gpmc,we-off-ns = <87>; |
| 75 | gpmc,rd-cycle-ns = <112>; |
| 76 | gpmc,wr-cycle-ns = <112>; |
| 77 | gpmc,access-ns = <81>; |
| 78 | gpmc,page-burst-access-ns = <15>; |
| 79 | gpmc,bus-turnaround-ns = <0>; |
| 80 | gpmc,cycle2cycle-delay-ns = <0>; |
| 81 | gpmc,wait-monitoring-ns = <0>; |
| 82 | gpmc,clk-activation-ns = <5>; |
| 83 | gpmc,wr-data-mux-bus-ns = <30>; |
| 84 | gpmc,wr-access-ns = <81>; |
| 85 | gpmc,sync-clk-ps = <15000>; |
| 86 | |
| 87 | x-loader@0 { |
| 88 | label = "X-Loader"; |
| 89 | reg = <0 0x80000>; |
| 90 | }; |
| 91 | |
| 92 | bootloaders@80000 { |
| 93 | label = "U-Boot"; |
| 94 | reg = <0x80000 0x1c0000>; |
| 95 | }; |
| 96 | |
| 97 | bootloaders_env@240000 { |
| 98 | label = "U-Boot Env"; |
| 99 | reg = <0x240000 0x40000>; |
| 100 | }; |
| 101 | |
| 102 | kernel@280000 { |
| 103 | label = "Kernel"; |
| 104 | reg = <0x280000 0x600000>; |
| 105 | }; |
| 106 | |
| 107 | filesystem@880000 { |
| 108 | label = "File System"; |
| 109 | reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */ |
| 110 | }; |
| 111 | |
| 112 | }; |
| 113 | }; |