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git01.mediatek.com / filogic / uboot / a52d20723b7f36fae0e0061c335328b6694b08c5 / . / dts / upstream / src / arm / ti / omap / omap3-echo.dts
blob: 96011c976f5b8fce977922082bef6eab6827397c [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2019 André Hentschel <nerv@dawncrow.de>
4 */
5/dts-v1/;
6
7#include "dm3725.dtsi"
8
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/leds/common.h>
11
12/ {
13 model = "Amazon Echo (first generation)";
14 compatible = "amazon,omap3-echo", "ti,omap3630", "ti,omap3";
15
16 cpus {
17 cpu@0 {
18 cpu0-supply = <&vdd1_reg>;
19 };
20 };
21
22 memory@80000000 {
23 device_type = "memory";
24 reg = <0x80000000 0xc600000>; /* 198 MB */
25 };
26
27 vcc5v: fixedregulator0 {
28 compatible = "regulator-fixed";
29 regulator-name = "vcc5v";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
32 regulator-boot-on;
33 regulator-always-on;
34 };
35
36 vcc3v3: fixedregulator1 {
37 compatible = "regulator-fixed";
38 regulator-name = "vcc3v3";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
41 regulator-boot-on;
42 regulator-always-on;
43 };
44
45 vcc1v8: fixedregulator2 {
46 compatible = "regulator-fixed";
47 regulator-name = "vcc1v8";
48 regulator-min-microvolt = <1800000>;
49 regulator-max-microvolt = <1800000>;
50 regulator-boot-on;
51 regulator-always-on;
52 };
53
54 sdio_pwrseq: sdio-pwrseq {
55 compatible = "mmc-pwrseq-simple";
56 reset-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
57 post-power-on-delay-ms = <40>;
58 };
59
60 gpio-keys {
61 compatible = "gpio-keys";
62
63 pinctrl-names = "default";
64 pinctrl-0 = <&button_pins>;
65
66 mute-button {
67 label = "mute";
68 linux,code = <KEY_MUTE>;
69 gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; /* GPIO_70 */
70 wakeup-source;
71 };
72
73 help-button {
74 label = "help";
75 linux,code = <KEY_HELP>;
76 gpios = <&gpio3 8 GPIO_ACTIVE_LOW>; /* GPIO_72 */
77 wakeup-source;
78 };
79 };
80
81 rotary: rotary-encoder {
82 compatible = "rotary-encoder";
83 gpios = <
84 &gpio3 5 GPIO_ACTIVE_HIGH /* GPIO_69 */
85 &gpio3 12 GPIO_ACTIVE_HIGH /* GPIO_76 */
86 >;
87 linux,axis = <REL_X>;
88 rotary-encoder,relative-axis;
89 };
90
91 speaker_amp: speaker-amplifier {
92 compatible = "simple-audio-amplifier";
93 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* gpio_129 */
94 sound-name-prefix = "Speaker Amp";
95 VCC-supply = <&vcc1v8>;
96 };
97
98 sound {
99 compatible = "simple-audio-card";
100 simple-audio-card,name = "Misto Speaker";
101 simple-audio-card,widgets =
102 "Speaker", "Speaker";
103 simple-audio-card,routing =
104 "Speaker Amp INL", "HPL",
105 "Speaker Amp INR", "HPR",
106 "Speaker", "Speaker Amp OUTL",
107 "Speaker", "Speaker Amp OUTR";
108 simple-audio-card,format = "i2s";
109 simple-audio-card,bitclock-master = <&sound_master>;
110 simple-audio-card,frame-master = <&sound_master>;
111 simple-audio-card,aux-devs = <&speaker_amp>;
112
113 simple-audio-card,cpu {
114 sound-dai = <&mcbsp2>;
115 };
116
117 sound_master: simple-audio-card,codec {
118 sound-dai = <&codec0>;
119 system-clock-frequency = <19200000>;
120 };
121 };
122};
123
124&i2c1 {
125 clock-frequency = <400000>;
126
127 tps: tps@2d {
128 reg = <0x2d>;
129 };
130};
131
132&mcbsp2 {
133 status = "okay";
134 #sound-dai-cells = <0>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&mcbsp2_pins>;
137};
138
139&i2c2 {
140 clock-frequency = <400000>;
141
142 lp5523A: lp5523A@32 {
143 #address-cells = <1>;
144 #size-cells = <0>;
145 compatible = "national,lp5523";
146 label = "q1";
147 reg = <0x32>;
148 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
149 enable-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; /* GPIO_109 */
150
151 multi-led@0 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 reg = <0x0>;
155 color = <LED_COLOR_ID_RGB>;
156
157 led@0 {
158 led-cur = /bits/ 8 <12>;
159 max-cur = /bits/ 8 <15>;
160 reg = <0x0>;
161 color = <LED_COLOR_ID_GREEN>;
162 };
163
164 led@1 {
165 led-cur = /bits/ 8 <12>;
166 max-cur = /bits/ 8 <15>;
167 reg = <0x1>;
168 color = <LED_COLOR_ID_BLUE>;
169 };
170
171 led@6 {
172 led-cur = /bits/ 8 <12>;
173 max-cur = /bits/ 8 <15>;
174 reg = <0x6>;
175 color = <LED_COLOR_ID_RED>;
176 };
177 };
178 multi-led@1 {
179 #address-cells = <1>;
180 #size-cells = <0>;
181 reg = <0x1>;
182 color = <LED_COLOR_ID_RGB>;
183
184 led@2 {
185 led-cur = /bits/ 8 <12>;
186 max-cur = /bits/ 8 <15>;
187 reg = <0x2>;
188 color = <LED_COLOR_ID_GREEN>;
189 };
190
191 led@3 {
192 led-cur = /bits/ 8 <12>;
193 max-cur = /bits/ 8 <15>;
194 reg = <0x3>;
195 color = <LED_COLOR_ID_BLUE>;
196 };
197
198 led@7 {
199 led-cur = /bits/ 8 <12>;
200 max-cur = /bits/ 8 <15>;
201 reg = <0x7>;
202 color = <LED_COLOR_ID_RED>;
203 };
204 };
205 multi-led@2 {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 reg = <0x2>;
209 color = <LED_COLOR_ID_RGB>;
210
211 led@4 {
212 led-cur = /bits/ 8 <12>;
213 max-cur = /bits/ 8 <15>;
214 reg = <0x4>;
215 color = <LED_COLOR_ID_GREEN>;
216 };
217
218 led@5 {
219 led-cur = /bits/ 8 <12>;
220 max-cur = /bits/ 8 <15>;
221 reg = <0x5>;
222 color = <LED_COLOR_ID_BLUE>;
223 };
224
225 led@8 {
226 led-cur = /bits/ 8 <12>;
227 max-cur = /bits/ 8 <15>;
228 reg = <0x8>;
229 color = <LED_COLOR_ID_RED>;
230 };
231 };
232 };
233
234 lp5523B: lp5523B@33 {
235 #address-cells = <1>;
236 #size-cells = <0>;
237 compatible = "national,lp5523";
238 label = "q3";
239 reg = <0x33>;
240 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
241
242 multi-led@0 {
243 #address-cells = <1>;
244 #size-cells = <0>;
245 reg = <0x0>;
246 color = <LED_COLOR_ID_RGB>;
247
248 led@0 {
249 led-cur = /bits/ 8 <12>;
250 max-cur = /bits/ 8 <15>;
251 reg = <0x0>;
252 color = <LED_COLOR_ID_GREEN>;
253 };
254
255 led@1 {
256 led-cur = /bits/ 8 <12>;
257 max-cur = /bits/ 8 <15>;
258 reg = <0x1>;
259 color = <LED_COLOR_ID_BLUE>;
260 };
261
262 led@6 {
263 led-cur = /bits/ 8 <12>;
264 max-cur = /bits/ 8 <15>;
265 reg = <0x6>;
266 color = <LED_COLOR_ID_RED>;
267 };
268 };
269 multi-led@1 {
270 #address-cells = <1>;
271 #size-cells = <0>;
272 reg = <0x1>;
273 color = <LED_COLOR_ID_RGB>;
274
275 led@2 {
276 led-cur = /bits/ 8 <12>;
277 max-cur = /bits/ 8 <15>;
278 reg = <0x2>;
279 color = <LED_COLOR_ID_GREEN>;
280 };
281
282 led@3 {
283 led-cur = /bits/ 8 <12>;
284 max-cur = /bits/ 8 <15>;
285 reg = <0x3>;
286 color = <LED_COLOR_ID_BLUE>;
287 };
288
289 led@7 {
290 led-cur = /bits/ 8 <12>;
291 max-cur = /bits/ 8 <15>;
292 reg = <0x7>;
293 color = <LED_COLOR_ID_RED>;
294 };
295 };
296 multi-led@2 {
297 #address-cells = <1>;
298 #size-cells = <0>;
299 reg = <0x2>;
300 color = <LED_COLOR_ID_RGB>;
301
302 led@4 {
303 led-cur = /bits/ 8 <12>;
304 max-cur = /bits/ 8 <15>;
305 reg = <0x4>;
306 color = <LED_COLOR_ID_GREEN>;
307 };
308
309 led@5 {
310 led-cur = /bits/ 8 <12>;
311 max-cur = /bits/ 8 <15>;
312 reg = <0x5>;
313 color = <LED_COLOR_ID_BLUE>;
314 };
315
316 led@8 {
317 led-cur = /bits/ 8 <12>;
318 max-cur = /bits/ 8 <15>;
319 reg = <0x8>;
320 color = <LED_COLOR_ID_RED>;
321 };
322 };
323 };
324
325 lp5523C: lp5523C@34 {
326 #address-cells = <1>;
327 #size-cells = <0>;
328 compatible = "national,lp5523";
329 label = "q4";
330 reg = <0x34>;
331 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
332
333 multi-led@0 {
334 #address-cells = <1>;
335 #size-cells = <0>;
336 reg = <0x0>;
337 color = <LED_COLOR_ID_RGB>;
338
339 led@0 {
340 led-cur = /bits/ 8 <12>;
341 max-cur = /bits/ 8 <15>;
342 reg = <0x0>;
343 color = <LED_COLOR_ID_GREEN>;
344 };
345
346 led@1 {
347 led-cur = /bits/ 8 <12>;
348 max-cur = /bits/ 8 <15>;
349 reg = <0x1>;
350 color = <LED_COLOR_ID_BLUE>;
351 };
352
353 led@6 {
354 led-cur = /bits/ 8 <12>;
355 max-cur = /bits/ 8 <15>;
356 reg = <0x6>;
357 color = <LED_COLOR_ID_RED>;
358 };
359 };
360 multi-led@1 {
361 #address-cells = <1>;
362 #size-cells = <0>;
363 reg = <0x1>;
364 color = <LED_COLOR_ID_RGB>;
365
366 led@2 {
367 led-cur = /bits/ 8 <12>;
368 max-cur = /bits/ 8 <15>;
369 reg = <0x2>;
370 color = <LED_COLOR_ID_GREEN>;
371 };
372
373 led@3 {
374 led-cur = /bits/ 8 <12>;
375 max-cur = /bits/ 8 <15>;
376 reg = <0x3>;
377 color = <LED_COLOR_ID_BLUE>;
378 };
379
380 led@7 {
381 led-cur = /bits/ 8 <12>;
382 max-cur = /bits/ 8 <15>;
383 reg = <0x7>;
384 color = <LED_COLOR_ID_RED>;
385 };
386 };
387 multi-led@2 {
388 #address-cells = <1>;
389 #size-cells = <0>;
390 reg = <0x2>;
391 color = <LED_COLOR_ID_RGB>;
392
393 led@4 {
394 led-cur = /bits/ 8 <12>;
395 max-cur = /bits/ 8 <15>;
396 reg = <0x4>;
397 color = <LED_COLOR_ID_GREEN>;
398 };
399
400 led@5 {
401 led-cur = /bits/ 8 <12>;
402 max-cur = /bits/ 8 <15>;
403 reg = <0x5>;
404 color = <LED_COLOR_ID_BLUE>;
405 };
406
407 led@8 {
408 led-cur = /bits/ 8 <12>;
409 max-cur = /bits/ 8 <15>;
410 reg = <0x8>;
411 color = <LED_COLOR_ID_RED>;
412 };
413 };
414 };
415
416 lp5523D: lp552D@35 {
417 #address-cells = <1>;
418 #size-cells = <0>;
419 compatible = "national,lp5523";
420 label = "q2";
421 reg = <0x35>;
422 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
423
424 multi-led@0 {
425 #address-cells = <1>;
426 #size-cells = <0>;
427 reg = <0x0>;
428 color = <LED_COLOR_ID_RGB>;
429
430 led@0 {
431 led-cur = /bits/ 8 <12>;
432 max-cur = /bits/ 8 <15>;
433 reg = <0x0>;
434 color = <LED_COLOR_ID_GREEN>;
435 };
436
437 led@1 {
438 led-cur = /bits/ 8 <12>;
439 max-cur = /bits/ 8 <15>;
440 reg = <0x1>;
441 color = <LED_COLOR_ID_BLUE>;
442 };
443
444 led@6 {
445 led-cur = /bits/ 8 <12>;
446 max-cur = /bits/ 8 <15>;
447 reg = <0x6>;
448 color = <LED_COLOR_ID_RED>;
449 };
450 };
451 multi-led@1 {
452 #address-cells = <1>;
453 #size-cells = <0>;
454 reg = <0x1>;
455 color = <LED_COLOR_ID_RGB>;
456
457 led@2 {
458 led-cur = /bits/ 8 <12>;
459 max-cur = /bits/ 8 <15>;
460 reg = <0x2>;
461 color = <LED_COLOR_ID_GREEN>;
462 };
463
464 led@3 {
465 led-cur = /bits/ 8 <12>;
466 max-cur = /bits/ 8 <15>;
467 reg = <0x3>;
468 color = <LED_COLOR_ID_BLUE>;
469 };
470
471 led@7 {
472 led-cur = /bits/ 8 <12>;
473 max-cur = /bits/ 8 <15>;
474 reg = <0x7>;
475 color = <LED_COLOR_ID_RED>;
476 };
477 };
478 multi-led@2 {
479 #address-cells = <1>;
480 #size-cells = <0>;
481 reg = <0x2>;
482 color = <LED_COLOR_ID_RGB>;
483
484 led@4 {
485 led-cur = /bits/ 8 <12>;
486 max-cur = /bits/ 8 <15>;
487 reg = <0x4>;
488 color = <LED_COLOR_ID_GREEN>;
489 };
490
491 led@5 {
492 led-cur = /bits/ 8 <12>;
493 max-cur = /bits/ 8 <15>;
494 reg = <0x5>;
495 color = <LED_COLOR_ID_BLUE>;
496 };
497
498 led@8 {
499 led-cur = /bits/ 8 <12>;
500 max-cur = /bits/ 8 <15>;
501 reg = <0x8>;
502 color = <LED_COLOR_ID_RED>;
503 };
504 };
505 };
506};
507
508&i2c3 {
509 clock-frequency = <400000>;
510
511 codec0: codec@18 {
512 #sound-dai-cells = <0>;
513 compatible = "ti,tlv320aic32x4";
514 reg = <0x18>;
515 clocks = <&sys_clkout1>;
516 clock-names = "mclk";
517 ldoin-supply = <&vcc1v8>;
518 iov-supply = <&vcc1v8>;
519 reset-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>; /* gpio_74 */
520 };
521};
522
523
524#include "../../tps65910.dtsi"
525
526&omap3_pmx_core {
527 tps_pins: tps-pins {
528 pinctrl-single,pins = <
529 OMAP3_CORE1_IOPAD(0x21e0, PIN_INPUT_PULLUP | PIN_OFF_INPUT_PULLUP | PIN_OFF_OUTPUT_LOW | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* sys_nirq.sys_nirq */
530 >;
531 };
532
533 button_pins: button-pins {
534 pinctrl-single,pins = <
535 OMAP3_CORE1_IOPAD(0x20dc, PIN_INPUT | MUX_MODE4) /* dss_data0.gpio_70 */
536 OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* dss_data2.gpio_72 */
537 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* dss_data4.gpio_74 */
538 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* dss_data15.gpio_85 */
539 OMAP3_CORE1_IOPAD(0x2a1a, PIN_OUTPUT | MUX_MODE0) /* sys_clkout1.sys_clkout1 */
540 >;
541 };
542
543 mmc1_pins: mmc1-pins {
544 pinctrl-single,pins = <
545 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
546 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
547 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
548 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
549 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
550 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
551 >;
552 };
553
554 mmc2_pins: mmc2-pins {
555 pinctrl-single,pins = <
556 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
557 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
558 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
559 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
560 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
561 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
562 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4.sdmmc2_dat4 */
563 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5.sdmmc2_dat5 */
564 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6.sdmmc2_dat6 */
565 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7.sdmmc2_dat7 */
566 >;
567 };
568
569 mcbsp2_pins: mcbsp2-pins {
570 pinctrl-single,pins = <
571 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
572 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
573 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
574 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
575 >;
576 };
577};
578
579&omap3_pmx_core2 {
580 mmc3_pins: mmc3-pins {
581 pinctrl-single,pins = <
582 OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
583 OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_ctl.sdmmc3_cmd */
584 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
585 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
586 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
587 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
588 >;
589 };
590};
591
592&mmc1 {
593 status = "okay";
594 bus-width = <4>;
595 pinctrl-names = "default";
596 pinctrl-0 = <&mmc1_pins>;
597 vmmc-supply = <&vmmc_reg>;
598};
599
600&mmc2 {
601 status = "okay";
602 bus-width = <8>;
603 pinctrl-names = "default";
604 pinctrl-0 = <&mmc2_pins>;
605 vmmc-supply = <&vmmc_reg>;
606};
607
608&mmc3 {
609 #address-cells = <1>;
610 #size-cells = <0>;
611 status = "okay";
612 bus-width = <4>;
613 pinctrl-names = "default";
614 pinctrl-0 = <&mmc3_pins>;
615 non-removable;
616 disable-wp;
617 mmc-pwrseq = <&sdio_pwrseq>;
618 vmmc-supply = <&vcc3v3>;
619 vqmmc-supply = <&vcc1v8>;
620 atheros@0 {
621 compatible = "atheros,ath6kl";
622 reg = <0>;
623 bus-width = <4>;
624 };
625};
626
627&tps {
628 pinctrl-names = "default";
629 pinctrl-0 = <&tps_pins>;
630
631 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
632 interrupt-parent = <&intc>;
633
634 ti,en-ck32k-xtal;
635 ti,system-power-controller;
636
637 vcc1-supply = <&vcc5v>;
638 vcc2-supply = <&vcc5v>;
639 vcc3-supply = <&vcc5v>;
640 vcc4-supply = <&vcc5v>;
641 vcc5-supply = <&vcc5v>;
642 vcc6-supply = <&vcc5v>;
643 vcc7-supply = <&vcc5v>;
644 vccio-supply = <&vcc5v>;
645
646 regulators {
647
648 vio_reg: regulator@1 {
649 regulator-min-microvolt = <1800000>;
650 regulator-max-microvolt = <1800000>;
651 regulator-always-on;
652 };
653
654 vdd1_reg: regulator@2 {
655 regulator-name = "vdd_mpu";
656 regulator-min-microvolt = <600000>;
657 regulator-max-microvolt = <1500000>;
658 regulator-boot-on;
659 regulator-always-on;
660 };
661
662 vdd2_reg: regulator@3 {
663 regulator-name = "vdd_dsp";
664 regulator-min-microvolt = <600000>;
665 regulator-max-microvolt = <1500000>;
666 regulator-always-on;
667 };
668
669 vdd3_reg: regulator@4 {
670 regulator-name = "vdd_core";
671 regulator-min-microvolt = <5000000>;
672 regulator-max-microvolt = <5000000>;
673 regulator-always-on;
674 };
675
676 vdig1_reg: regulator@5 {
677 regulator-min-microvolt = <1200000>;
678 regulator-max-microvolt = <2700000>;
679 regulator-always-on;
680 };
681
682 vdig2_reg: regulator@6 {
683 regulator-min-microvolt = <1000000>;
684 regulator-max-microvolt = <1800000>;
685 regulator-always-on;
686 };
687
688 vpll_reg: regulator@7 {
689 regulator-min-microvolt = <1000000>;
690 regulator-max-microvolt = <2500000>;
691 regulator-always-on;
692 };
693
694 vdac_reg: regulator@8 {
695 regulator-min-microvolt = <1100000>;
696 regulator-max-microvolt = <3300000>;
697 regulator-always-on;
698 };
699
700 vaux1_reg: regulator@9 {
701 regulator-min-microvolt = <1800000>;
702 regulator-max-microvolt = <2850000>;
703 regulator-always-on;
704 };
705
706 vaux2_reg: regulator@10 {
707 regulator-min-microvolt = <1800000>;
708 regulator-max-microvolt = <3300000>;
709 regulator-always-on;
710 };
711
712 vaux33_reg: regulator@11 {
713 regulator-min-microvolt = <1800000>;
714 regulator-max-microvolt = <3300000>;
715 regulator-always-on;
716 };
717
718 vmmc_reg: regulator@12 {
719 regulator-min-microvolt = <1800000>;
720 regulator-max-microvolt = <3000000>;
721 regulator-always-on;
722 };
723 };
724};