| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: STMicroelectronics Flexible Memory Controller 2 (FMC2) |
| 8 | |
| 9 | description: | |
| 10 | The FMC2 functional block makes the interface with: synchronous and |
| 11 | asynchronous static devices (such as PSNOR, PSRAM or other memory-mapped |
| 12 | peripherals) and NAND flash memories. |
| 13 | Its main purposes are: |
| 14 | - to translate AXI transactions into the appropriate external device |
| 15 | protocol |
| 16 | - to meet the access time requirements of the external devices |
| 17 | All external devices share the addresses, data and control signals with the |
| 18 | controller. Each external device is accessed by means of a unique Chip |
| 19 | Select. The FMC2 performs only one access at a time to an external device. |
| 20 | |
| 21 | maintainers: |
| 22 | - Christophe Kerello <christophe.kerello@foss.st.com> |
| 23 | |
| 24 | properties: |
| 25 | compatible: |
| 26 | const: st,stm32mp1-fmc2-ebi |
| 27 | |
| 28 | reg: |
| 29 | maxItems: 1 |
| 30 | |
| 31 | clocks: |
| 32 | maxItems: 1 |
| 33 | |
| 34 | resets: |
| 35 | maxItems: 1 |
| 36 | |
| 37 | "#address-cells": |
| 38 | const: 2 |
| 39 | |
| 40 | "#size-cells": |
| 41 | const: 1 |
| 42 | |
| 43 | ranges: |
| 44 | description: | |
| 45 | Reflects the memory layout with four integer values per bank. Format: |
| 46 | <bank-number> 0 <address of the bank> <size> |
| 47 | |
| 48 | patternProperties: |
| 49 | "^.*@[0-4],[a-f0-9]+$": |
| 50 | additionalProperties: true |
| 51 | type: object |
| 52 | $ref: mc-peripheral-props.yaml# |
| 53 | |
| 54 | required: |
| 55 | - "#address-cells" |
| 56 | - "#size-cells" |
| 57 | - compatible |
| 58 | - reg |
| 59 | - clocks |
| 60 | - ranges |
| 61 | |
| 62 | additionalProperties: false |
| 63 | |
| 64 | examples: |
| 65 | - | |
| 66 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 67 | #include <dt-bindings/clock/stm32mp1-clks.h> |
| 68 | #include <dt-bindings/reset/stm32mp1-resets.h> |
| 69 | memory-controller@58002000 { |
| 70 | #address-cells = <2>; |
| 71 | #size-cells = <1>; |
| 72 | compatible = "st,stm32mp1-fmc2-ebi"; |
| 73 | reg = <0x58002000 0x1000>; |
| 74 | clocks = <&rcc FMC_K>; |
| 75 | resets = <&rcc FMC_R>; |
| 76 | |
| 77 | ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ |
| 78 | <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ |
| 79 | <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ |
| 80 | <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ |
| 81 | <4 0 0x80000000 0x10000000>; /* NAND */ |
| 82 | |
| 83 | psram@0,0 { |
| 84 | compatible = "mtd-ram"; |
| 85 | reg = <0 0x00000000 0x100000>; |
| 86 | bank-width = <2>; |
| 87 | |
| 88 | st,fmc2-ebi-cs-transaction-type = <1>; |
| 89 | st,fmc2-ebi-cs-address-setup-ns = <60>; |
| 90 | st,fmc2-ebi-cs-data-setup-ns = <30>; |
| 91 | st,fmc2-ebi-cs-bus-turnaround-ns = <5>; |
| 92 | }; |
| 93 | |
| 94 | nand-controller@4,0 { |
| 95 | #address-cells = <1>; |
| 96 | #size-cells = <0>; |
| 97 | compatible = "st,stm32mp1-fmc2-nfc"; |
| 98 | reg = <4 0x00000000 0x1000>, |
| 99 | <4 0x08010000 0x1000>, |
| 100 | <4 0x08020000 0x1000>, |
| 101 | <4 0x01000000 0x1000>, |
| 102 | <4 0x09010000 0x1000>, |
| 103 | <4 0x09020000 0x1000>; |
| 104 | interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; |
| 105 | dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>, |
| 106 | <&mdma1 20 0x2 0x12000a08 0x0 0x0>, |
| 107 | <&mdma1 21 0x2 0x12000a0a 0x0 0x0>; |
| 108 | dma-names = "tx", "rx", "ecc"; |
| 109 | |
| 110 | nand@0 { |
| 111 | reg = <0>; |
| 112 | nand-on-flash-bbt; |
| 113 | #address-cells = <1>; |
| 114 | #size-cells = <1>; |
| 115 | }; |
| 116 | }; |
| 117 | }; |
| 118 | |
| 119 | ... |