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git01.mediatek.com / filogic / uboot / a504cd845b615a64cb7315eb409316165a5ce9ba / . / include / configs / rk3288_common.h
blob: 78595b86ec4855ff9c58dc193f0c96edf91127df [file] [log] [blame]
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]1/*
2 * (C) Copyright 2015 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __CONFIG_RK3288_COMMON_H
8#define __CONFIG_RK3288_COMMON_H
9
10#include <asm/arch/hardware.h>
Jacob Chen63dc9712016-10-08 13:47:41 +0800[diff] [blame]11#include "rockchip-common.h"
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]12
Xu Ziyuan68728e82016-08-27 21:53:14 +0800[diff] [blame]13#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]14#define CONFIG_NR_DRAM_BANKS 1
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]15#define CONFIG_SYS_MALLOC_LEN (32 << 20)
16#define CONFIG_SYS_CBSIZE 1024
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]17
18#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
huang lin8db3e242015-11-17 14:20:09 +0800[diff] [blame]19#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
20#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]21
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]22#define CONFIG_SYS_NS16550_MEM32
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]23
Philipp Tomsich798370f2017-06-29 11:21:15 +0200[diff] [blame]24#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800[diff] [blame]25/* Bootrom will load u-boot binary to 0x0 once return from SPL */
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800[diff] [blame]26#endif
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]27#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
28#define CONFIG_SYS_LOAD_ADDR 0x00800800
29#define CONFIG_SPL_STACK 0xff718000
Jagan Teki387fd4b2017-09-27 23:03:12 +0530[diff] [blame]30#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
31# define CONFIG_SPL_TEXT_BASE 0x0
32#else
Kever Yang5f651fd2017-10-10 16:21:05 +0200[diff] [blame]33# define CONFIG_SPL_TEXT_BASE 0xff704000
Jagan Teki387fd4b2017-09-27 23:03:12 +0530[diff] [blame]34#endif
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]35
36/* MMC/SD IP block */
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]37#define CONFIG_BOUNCE_BUFFER
38
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]39/* RAW SD card / eMMC locations. */
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]40#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
41
42/* FAT sd card locations. */
43#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
44#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
45
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]46#define CONFIG_SYS_SDRAM_BASE 0
47#define CONFIG_NR_DRAM_BANKS 1
48#define SDRAM_BANK_SIZE (2UL << 30)
Kever Yang5db9e672017-06-23 16:11:05 +0800[diff] [blame]49#define SDRAM_MAX_SIZE 0xfe000000
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]50
51#define CONFIG_SPI_FLASH
52#define CONFIG_SPI
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]53#define CONFIG_SF_DEFAULT_SPEED 20000000
54
jk.kernel@gmail.com376bcc62016-07-26 18:28:24 +0800[diff] [blame]55#ifndef CONFIG_SPL_BUILD
Xu Ziyuana11a53f2016-07-15 00:26:59 +0800[diff] [blame]56/* usb otg */
Xu Ziyuana11a53f2016-07-15 00:26:59 +0800[diff] [blame]57
Xu Ziyuanb653b472016-08-03 11:55:06 +0800[diff] [blame]58/* usb mass storage */
Xu Ziyuanb653b472016-08-03 11:55:06 +0800[diff] [blame]59#define CONFIG_CMD_USB_MASS_STORAGE
60
Kever Yangf7d6def2016-11-24 15:29:51 +0800[diff] [blame]61/* usb host support */
Sjoerd Simons427418b2015-08-30 16:55:48 -0600[diff] [blame]62#define ENV_MEM_LAYOUT_SETTINGS \
63 "scriptaddr=0x00000000\0" \
64 "pxefile_addr_r=0x00100000\0" \
65 "fdt_addr_r=0x01f00000\0" \
66 "kernel_addr_r=0x02000000\0" \
67 "ramdisk_addr_r=0x04000000\0"
68
Sjoerd Simons427418b2015-08-30 16:55:48 -0600[diff] [blame]69#include <config_distro_bootcmd.h>
70
Sandy Pattersonf4526ef2016-07-11 13:38:52 -0400[diff] [blame]71/* Linux fails to load the fdt if it's loaded above 256M on a Rock 2 board, so
Sjoerd Simons427418b2015-08-30 16:55:48 -0600[diff] [blame]72 * limit the fdt reallocation to that */
73#define CONFIG_EXTRA_ENV_SETTINGS \
Sandy Pattersonf4526ef2016-07-11 13:38:52 -0400[diff] [blame]74 "fdt_high=0x0fffffff\0" \
75 "initrd_high=0x0fffffff\0" \
Xu Ziyuan05c3ca62016-08-03 11:55:05 +0800[diff] [blame]76 "partitions=" PARTS_DEFAULT \
Sjoerd Simons427418b2015-08-30 16:55:48 -0600[diff] [blame]77 ENV_MEM_LAYOUT_SETTINGS \
Simon Glasscf88b7c2016-01-21 19:44:13 -0700[diff] [blame]78 ROCKCHIP_DEVICE_SETTINGS \
Sjoerd Simons427418b2015-08-30 16:55:48 -0600[diff] [blame]79 BOOTENV
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]80#endif
81
Jacob Chenc95f3782016-09-19 18:46:28 +0800[diff] [blame]82#define CONFIG_PREBOOT
83
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]84#endif