blob: 889ead0f5728fe5067774fa94e7d67ca0077a6fc [file] [log] [blame]
Sumit Garg46ad40b2022-07-12 12:42:10 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Qualcomm QCS404 pinctrl
4 *
5 * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
6 */
7
8#include "pinctrl-snapdragon.h"
9#include <common.h>
10
11#define MAX_PIN_NAME_LEN 32
12static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
13static const char * const msm_pinctrl_pins[] = {
14 "SDC1_RCLK",
15 "SDC1_CLK",
16 "SDC1_CMD",
17 "SDC1_DATA",
18 "SDC2_CLK",
19 "SDC2_CMD",
20 "SDC2_DATA",
21};
22
23static const struct pinctrl_function msm_pinctrl_functions[] = {
24 {"blsp_uart2", 1},
25};
26
27static const char *qcs404_get_function_name(struct udevice *dev,
28 unsigned int selector)
29{
30 return msm_pinctrl_functions[selector].name;
31}
32
33static const char *qcs404_get_pin_name(struct udevice *dev,
34 unsigned int selector)
35{
36 if (selector < 120) {
37 snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
38 return pin_name;
39 } else {
40 return msm_pinctrl_pins[selector - 120];
41 }
42}
43
44static unsigned int qcs404_get_function_mux(unsigned int selector)
45{
46 return msm_pinctrl_functions[selector].val;
47}
48
49struct msm_pinctrl_data qcs404_data = {
50 .pin_count = 126,
51 .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
52 .get_function_name = qcs404_get_function_name,
53 .get_function_mux = qcs404_get_function_mux,
54 .get_pin_name = qcs404_get_pin_name,
55};