Samuel Holland | 26bc4e7 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | // Copyright (C) 2017 Jagan Teki <jteki@openedev.com> |
Jagan Teki | e153362 | 2017-08-12 18:18:58 +0530 | [diff] [blame] | 3 | |
| 4 | /dts-v1/; |
| 5 | |
| 6 | #include "sun50i-a64.dtsi" |
Samuel Holland | 26bc4e7 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 7 | #include "sun50i-a64-cpu-opp.dtsi" |
Jagan Teki | e153362 | 2017-08-12 18:18:58 +0530 | [diff] [blame] | 8 | |
| 9 | #include <dt-bindings/gpio/gpio.h> |
| 10 | |
| 11 | / { |
| 12 | model = "Olimex A64-Olinuxino"; |
| 13 | compatible = "olimex,a64-olinuxino", "allwinner,sun50i-a64"; |
| 14 | |
| 15 | aliases { |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 16 | ethernet0 = &emac; |
Jagan Teki | e153362 | 2017-08-12 18:18:58 +0530 | [diff] [blame] | 17 | serial0 = &uart0; |
| 18 | }; |
| 19 | |
| 20 | chosen { |
| 21 | stdout-path = "serial0:115200n8"; |
| 22 | }; |
| 23 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 24 | hdmi-connector { |
| 25 | compatible = "hdmi-connector"; |
| 26 | type = "a"; |
| 27 | |
| 28 | port { |
| 29 | hdmi_con_in: endpoint { |
| 30 | remote-endpoint = <&hdmi_out_con>; |
| 31 | }; |
| 32 | }; |
| 33 | }; |
| 34 | |
Samuel Holland | 26bc4e7 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 35 | leds { |
| 36 | compatible = "gpio-leds"; |
| 37 | |
| 38 | led-0 { |
| 39 | label = "a64-olinuxino:red:user"; |
| 40 | gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ |
| 41 | }; |
| 42 | }; |
| 43 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 44 | reg_usb1_vbus: usb1-vbus { |
| 45 | compatible = "regulator-fixed"; |
| 46 | regulator-name = "usb1-vbus"; |
| 47 | regulator-min-microvolt = <5000000>; |
| 48 | regulator-max-microvolt = <5000000>; |
| 49 | regulator-boot-on; |
| 50 | enable-active-high; |
| 51 | gpio = <&pio 6 9 GPIO_ACTIVE_HIGH>; /* PG9 */ |
| 52 | status = "okay"; |
| 53 | }; |
| 54 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 55 | wifi_pwrseq: wifi_pwrseq { |
| 56 | compatible = "mmc-pwrseq-simple"; |
| 57 | reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ |
Jagan Teki | e153362 | 2017-08-12 18:18:58 +0530 | [diff] [blame] | 58 | }; |
| 59 | }; |
| 60 | |
Andre Przywara | 5eb4bbe | 2022-09-11 00:04:41 +0100 | [diff] [blame] | 61 | &codec { |
| 62 | status = "okay"; |
| 63 | }; |
| 64 | |
| 65 | &codec_analog { |
| 66 | cpvdd-supply = <®_eldo1>; |
| 67 | status = "okay"; |
| 68 | }; |
| 69 | |
Samuel Holland | 26bc4e7 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 70 | &cpu0 { |
| 71 | cpu-supply = <®_dcdc2>; |
| 72 | }; |
| 73 | |
| 74 | &cpu1 { |
| 75 | cpu-supply = <®_dcdc2>; |
| 76 | }; |
| 77 | |
| 78 | &cpu2 { |
| 79 | cpu-supply = <®_dcdc2>; |
| 80 | }; |
| 81 | |
| 82 | &cpu3 { |
| 83 | cpu-supply = <®_dcdc2>; |
| 84 | }; |
| 85 | |
Andre Przywara | 5eb4bbe | 2022-09-11 00:04:41 +0100 | [diff] [blame] | 86 | &dai { |
| 87 | status = "okay"; |
| 88 | }; |
| 89 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 90 | &de { |
| 91 | status = "okay"; |
| 92 | }; |
| 93 | |
| 94 | &ehci0 { |
| 95 | status = "okay"; |
| 96 | }; |
| 97 | |
| 98 | &ehci1 { |
| 99 | status = "okay"; |
| 100 | }; |
| 101 | |
| 102 | &emac { |
| 103 | pinctrl-names = "default"; |
| 104 | pinctrl-0 = <&rgmii_pins>; |
| 105 | phy-mode = "rgmii"; |
| 106 | phy-handle = <&ext_rgmii_phy>; |
| 107 | phy-supply = <®_dcdc1>; |
| 108 | allwinner,tx-delay-ps = <600>; |
| 109 | status = "okay"; |
| 110 | }; |
| 111 | |
| 112 | &hdmi { |
| 113 | hvcc-supply = <®_dldo1>; |
| 114 | status = "okay"; |
| 115 | }; |
| 116 | |
| 117 | &hdmi_out { |
| 118 | hdmi_out_con: endpoint { |
| 119 | remote-endpoint = <&hdmi_con_in>; |
| 120 | }; |
| 121 | }; |
| 122 | |
| 123 | &mdio { |
| 124 | ext_rgmii_phy: ethernet-phy@1 { |
| 125 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 126 | reg = <1>; |
| 127 | }; |
| 128 | }; |
| 129 | |
Jagan Teki | e153362 | 2017-08-12 18:18:58 +0530 | [diff] [blame] | 130 | &mmc0 { |
| 131 | pinctrl-names = "default"; |
| 132 | pinctrl-0 = <&mmc0_pins>; |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 133 | vmmc-supply = <®_dcdc1>; |
| 134 | cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; |
Jagan Teki | e153362 | 2017-08-12 18:18:58 +0530 | [diff] [blame] | 135 | disable-wp; |
| 136 | bus-width = <4>; |
| 137 | status = "okay"; |
| 138 | }; |
| 139 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 140 | &mmc1 { |
| 141 | pinctrl-names = "default"; |
| 142 | pinctrl-0 = <&mmc1_pins>; |
Samuel Holland | 26bc4e7 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 143 | vmmc-supply = <®_dcdc1>; |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 144 | vqmmc-supply = <®_dldo4>; |
| 145 | mmc-pwrseq = <&wifi_pwrseq>; |
| 146 | bus-width = <4>; |
| 147 | non-removable; |
| 148 | status = "okay"; |
| 149 | |
| 150 | rtl8723bs: wifi@1 { |
| 151 | reg = <1>; |
| 152 | interrupt-parent = <&r_pio>; |
| 153 | interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */ |
| 154 | interrupt-names = "host-wake"; |
| 155 | }; |
| 156 | }; |
| 157 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 158 | &ohci0 { |
| 159 | status = "okay"; |
| 160 | }; |
| 161 | |
| 162 | &ohci1 { |
| 163 | status = "okay"; |
| 164 | }; |
| 165 | |
Samuel Holland | 26bc4e7 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 166 | &pio { |
| 167 | vcc-pc-supply = <®_dcdc1>; |
| 168 | vcc-pd-supply = <®_dcdc1>; |
| 169 | vcc-pe-supply = <®_aldo1>; |
| 170 | vcc-pg-supply = <®_dldo4>; |
| 171 | }; |
| 172 | |
| 173 | &r_pio { |
| 174 | /* |
| 175 | * FIXME: We can't add that supply for now since it would |
| 176 | * create a circular dependency between pinctrl, the regulator |
| 177 | * and the RSB Bus. |
| 178 | * |
| 179 | * vcc-pl-supply = <®_aldo2>; |
| 180 | */ |
| 181 | }; |
| 182 | |
| 183 | &pio { |
| 184 | vcc-pa-supply = <®_dcdc1>; |
| 185 | vcc-pb-supply = <®_dcdc1>; |
| 186 | vcc-pc-supply = <®_dcdc1>; |
| 187 | vcc-pd-supply = <®_dcdc1>; |
| 188 | vcc-pe-supply = <®_aldo1>; |
| 189 | vcc-pf-supply = <®_dcdc1>; |
| 190 | vcc-pg-supply = <®_dldo4>; |
| 191 | vcc-ph-supply = <®_dcdc1>; |
| 192 | }; |
| 193 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 194 | &r_rsb { |
| 195 | status = "okay"; |
| 196 | |
| 197 | axp803: pmic@3a3 { |
| 198 | compatible = "x-powers,axp803"; |
| 199 | reg = <0x3a3>; |
| 200 | interrupt-parent = <&r_intc>; |
| 201 | interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 202 | x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 203 | }; |
| 204 | }; |
| 205 | |
Samuel Holland | 26bc4e7 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 206 | /* VCC-PL is powered by aldo2 but we cannot add it as the RSB */ |
| 207 | /* interface used to talk to the PMIC in on the PL pins */ |
| 208 | /* &r_pio { */ |
| 209 | /* vcc-pl-supply = <®_aldo2>; */ |
| 210 | /* }; */ |
| 211 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 212 | #include "axp803.dtsi" |
| 213 | |
Samuel Holland | 26bc4e7 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 214 | &ac_power_supply { |
| 215 | status = "okay"; |
| 216 | }; |
| 217 | |
| 218 | &battery_power_supply { |
| 219 | status = "okay"; |
| 220 | }; |
| 221 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 222 | ®_aldo1 { |
| 223 | regulator-always-on; |
| 224 | regulator-min-microvolt = <2800000>; |
| 225 | regulator-max-microvolt = <2800000>; |
| 226 | regulator-name = "vcc-pe"; |
| 227 | }; |
| 228 | |
| 229 | ®_aldo2 { |
| 230 | regulator-always-on; |
| 231 | regulator-min-microvolt = <3300000>; |
| 232 | regulator-max-microvolt = <3300000>; |
| 233 | regulator-name = "vcc-pl"; |
| 234 | }; |
| 235 | |
| 236 | ®_aldo3 { |
| 237 | regulator-always-on; |
| 238 | regulator-min-microvolt = <3000000>; |
| 239 | regulator-max-microvolt = <3000000>; |
| 240 | regulator-name = "vcc-pll-avcc"; |
| 241 | }; |
| 242 | |
| 243 | ®_dcdc1 { |
| 244 | regulator-always-on; |
| 245 | regulator-min-microvolt = <3300000>; |
| 246 | regulator-max-microvolt = <3300000>; |
| 247 | regulator-name = "vcc-3v3"; |
| 248 | }; |
| 249 | |
| 250 | ®_dcdc2 { |
| 251 | regulator-always-on; |
| 252 | regulator-min-microvolt = <1040000>; |
| 253 | regulator-max-microvolt = <1300000>; |
| 254 | regulator-name = "vdd-cpux"; |
| 255 | }; |
| 256 | |
| 257 | /* DCDC3 is polyphased with DCDC2 */ |
| 258 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 259 | /* |
| 260 | * The board uses DDR3L DRAM chips. 1.36V is the closest to the nominal |
| 261 | * 1.35V that the PMIC can drive. |
| 262 | */ |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 263 | ®_dcdc5 { |
| 264 | regulator-always-on; |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 265 | regulator-min-microvolt = <1360000>; |
| 266 | regulator-max-microvolt = <1360000>; |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 267 | regulator-name = "vcc-ddr3"; |
| 268 | }; |
| 269 | |
| 270 | ®_dcdc6 { |
| 271 | regulator-always-on; |
| 272 | regulator-min-microvolt = <1100000>; |
| 273 | regulator-max-microvolt = <1100000>; |
| 274 | regulator-name = "vdd-sys"; |
| 275 | }; |
| 276 | |
| 277 | ®_dldo1 { |
| 278 | regulator-min-microvolt = <3300000>; |
| 279 | regulator-max-microvolt = <3300000>; |
| 280 | regulator-name = "vcc-hdmi"; |
| 281 | }; |
| 282 | |
| 283 | ®_dldo2 { |
| 284 | regulator-min-microvolt = <3300000>; |
| 285 | regulator-max-microvolt = <3300000>; |
| 286 | regulator-name = "vcc-mipi"; |
| 287 | }; |
| 288 | |
| 289 | ®_dldo3 { |
| 290 | regulator-min-microvolt = <2800000>; |
| 291 | regulator-max-microvolt = <2800000>; |
| 292 | regulator-name = "vcc-avdd-csi"; |
| 293 | }; |
| 294 | |
| 295 | ®_dldo4 { |
| 296 | regulator-min-microvolt = <3300000>; |
| 297 | regulator-max-microvolt = <3300000>; |
| 298 | regulator-name = "vcc-wifi-io"; |
| 299 | }; |
| 300 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 301 | ®_drivevbus { |
| 302 | regulator-name = "usb0-vbus"; |
| 303 | status = "okay"; |
| 304 | }; |
| 305 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 306 | ®_eldo1 { |
| 307 | regulator-min-microvolt = <1800000>; |
| 308 | regulator-max-microvolt = <1800000>; |
| 309 | regulator-name = "cpvdd"; |
| 310 | }; |
| 311 | |
| 312 | ®_eldo2 { |
| 313 | regulator-min-microvolt = <1800000>; |
| 314 | regulator-max-microvolt = <1800000>; |
| 315 | regulator-name = "vcc-dvdd-csi"; |
| 316 | }; |
| 317 | |
| 318 | ®_fldo1 { |
| 319 | regulator-min-microvolt = <1200000>; |
| 320 | regulator-max-microvolt = <1200000>; |
| 321 | regulator-name = "vcc-1v2-hsic"; |
| 322 | }; |
| 323 | |
| 324 | /* |
| 325 | * The A64 chip cannot work without this regulator off, although |
| 326 | * it seems to be only driving the AR100 core. |
| 327 | * Maybe we don't still know well about CPUs domain. |
| 328 | */ |
| 329 | ®_fldo2 { |
| 330 | regulator-always-on; |
| 331 | regulator-min-microvolt = <1100000>; |
| 332 | regulator-max-microvolt = <1100000>; |
| 333 | regulator-name = "vdd-cpus"; |
| 334 | }; |
| 335 | |
| 336 | ®_rtc_ldo { |
| 337 | regulator-name = "vcc-rtc"; |
| 338 | }; |
| 339 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 340 | &simplefb_hdmi { |
| 341 | vcc-hdmi-supply = <®_dldo1>; |
| 342 | }; |
| 343 | |
Andre Przywara | 5eb4bbe | 2022-09-11 00:04:41 +0100 | [diff] [blame] | 344 | &sound { |
| 345 | simple-audio-card,aux-devs = <&codec_analog>; |
| 346 | simple-audio-card,widgets = "Microphone", "Microphone Jack Left", |
| 347 | "Microphone", "Microphone Jack Right", |
| 348 | "Headphone", "Headphone Jack"; |
| 349 | simple-audio-card,routing = "Left DAC", "DACL", |
| 350 | "Right DAC", "DACR", |
| 351 | "Headphone Jack", "HP", |
| 352 | "ADCL", "Left ADC", |
| 353 | "ADCR", "Right ADC", |
| 354 | "Microphone Jack Left", "MBIAS", |
| 355 | "MIC1", "Microphone Jack Left", |
| 356 | "Microphone Jack Right", "MBIAS", |
| 357 | "MIC2", "Microphone Jack Right"; |
| 358 | status = "okay"; |
| 359 | }; |
| 360 | |
Jagan Teki | e153362 | 2017-08-12 18:18:58 +0530 | [diff] [blame] | 361 | &uart0 { |
| 362 | pinctrl-names = "default"; |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 363 | pinctrl-0 = <&uart0_pb_pins>; |
| 364 | status = "okay"; |
| 365 | }; |
| 366 | |
| 367 | &usb_otg { |
| 368 | dr_mode = "otg"; |
| 369 | status = "okay"; |
| 370 | }; |
| 371 | |
| 372 | &usbphy { |
Jagan Teki | e153362 | 2017-08-12 18:18:58 +0530 | [diff] [blame] | 373 | status = "okay"; |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 374 | usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ |
| 375 | usb0_vbus-supply = <®_drivevbus>; |
| 376 | usb1_vbus-supply = <®_usb1_vbus>; |
Jagan Teki | e153362 | 2017-08-12 18:18:58 +0530 | [diff] [blame] | 377 | }; |