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Hideyuki Sano1da7a592012-06-27 10:35:35 +09001/*
2 * Configuation settings for the bonito board
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Hideyuki Sano1da7a592012-06-27 10:35:35 +09007 */
8
9#ifndef __ARMADILLO_800EVA_H
10#define __ARMADILLO_800EVA_H
11
12#undef DEBUG
Hideyuki Sano1da7a592012-06-27 10:35:35 +090013#define CONFIG_R8A7740
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +090014#define CONFIG_ARCH_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n"
Hideyuki Sano1da7a592012-06-27 10:35:35 +090015#define CONFIG_SH_GPIO_PFC
16
17#include <asm/arch/rmobile.h>
18
Hideyuki Sano1da7a592012-06-27 10:35:35 +090019#define CONFIG_CMD_DFL
20#define CONFIG_CMD_SDRAM
Nobuhiro Iwamatsu712d3e02012-08-09 15:38:47 +090021
Hideyuki Sano1da7a592012-06-27 10:35:35 +090022#define BOARD_LATE_INIT
23
Hideyuki Sano1da7a592012-06-27 10:35:35 +090024#define CONFIG_BOOTARGS ""
25
Hideyuki Sano1da7a592012-06-27 10:35:35 +090026#undef CONFIG_SHOW_BOOT_PROGRESS
27
28#define CONFIG_ARCH_CPU_INIT
Hideyuki Sano1da7a592012-06-27 10:35:35 +090029#define CONFIG_TMU_TIMER
30#define CONFIG_SYS_DCACHE_OFF
31
32/* STACK */
33#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000
34#define STACK_AREA_SIZE 0xC000
35#define LOW_LEVEL_MERAM_STACK \
36 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
37
38/* MEMORY */
39#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
40#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
41
42#define CONFIG_SYS_LONGHELP
Hideyuki Sano1da7a592012-06-27 10:35:35 +090043#define CONFIG_SYS_CBSIZE 256
44#define CONFIG_SYS_PBSIZE 256
45#define CONFIG_SYS_MAXARGS 16
46#define CONFIG_SYS_BARGSIZE 512
47#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
48
49/* SCIF */
50#define CONFIG_SCIF_CONSOLE
51#define CONFIG_CONS_SCIF1
52#define SCIF0_BASE 0xe6c40000
53#define SCIF1_BASE 0xe6c50000
54#define SCIF2_BASE 0xe6c60000
55#define SCIF4_BASE 0xe6c80000
56#define CONFIG_SCIF_A
Hideyuki Sano1da7a592012-06-27 10:35:35 +090057
58#define CONFIG_SYS_MEMTEST_START (ARMADILLO_800EVA_SDRAM_BASE)
59#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
60 504 * 1024 * 1024)
61#undef CONFIG_SYS_ALT_MEMTEST
62#undef CONFIG_SYS_MEMTEST_SCRATCH
63#undef CONFIG_SYS_LOADS_BAUD_CHANGE
64
65#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
66#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE)
67#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
68 64 * 1024 * 1024)
69#define CONFIG_NR_DRAM_BANKS 1
70
71#define CONFIG_SYS_MONITOR_BASE 0x00000000
72#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
73#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Hideyuki Sano1da7a592012-06-27 10:35:35 +090074#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
75#define CONFIG_SYS_TEXT_BASE 0xE80C0000
76
77/* FLASH */
Hideyuki Sano1da7a592012-06-27 10:35:35 +090078#define CONFIG_SYS_FLASH_CFI
79#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
80#define CONFIG_SYS_FLASH_BASE 0x00000000
81#define CONFIG_SYS_MAX_FLASH_SECT 512
82#define CONFIG_SYS_MAX_FLASH_BANKS 1
83#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
84
85#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
86#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
87#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
88#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
89
90/* ENV setting */
91#define CONFIG_ENV_IS_IN_FLASH
92#define CONFIG_ENV_OVERWRITE 1
93#define CONFIG_ENV_SECT_SIZE (128 * 1024)
94#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
95 CONFIG_SYS_MONITOR_LEN)
96#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
97#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
98#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
99
100/* SH Ether */
Hideyuki Sano1da7a592012-06-27 10:35:35 +0900101#define CONFIG_SH_ETHER
102#define CONFIG_SH_ETHER_USE_PORT 0
103#define CONFIG_SH_ETHER_PHY_ADDR 0x0
104#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
105#define CONFIG_SH_ETHER_SH7734_MII (0x01)
106#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
107#define CONFIG_PHYLIB
108#define CONFIG_PHY_SMSC
109#define CONFIG_BITBANGMII
110#define CONFIG_BITBANGMII_MULTI
111
112/* Board Clock */
113#define CONFIG_SYS_CLK_FREQ 50000000
Nobuhiro Iwamatsu82e1ec72013-09-30 10:30:41 +0900114#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
115#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Hideyuki Sano1da7a592012-06-27 10:35:35 +0900116#define CONFIG_SYS_TMU_CLK_DIV 4
Hideyuki Sano1da7a592012-06-27 10:35:35 +0900117
118#endif /* __ARMADILLO_800EVA_H */