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git01.mediatek.com / filogic / uboot / a4b3dedeb971e6dfee4e6b0be61368d086534979 / . / arch / powerpc / include / asm / global_data.h
blob: 3943d0e92b9e4f01829796c107bfd2abb7290042 [file] [log] [blame]
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]1/*
Wolfgang Denkf710efd2010-07-24 20:22:02 +0200[diff] [blame]2 * (C) Copyright 2002-2010
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]6 */
7
8#ifndef __ASM_GBL_DATA_H
9#define __ASM_GBL_DATA_H
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]10
Peter Tyserbe34d1d2009-09-21 11:20:37 -0500[diff] [blame]11#include "config.h"
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]12#include "asm/types.h"
13
Simon Glass3ac47d72012-12-13 20:48:30 +0000[diff] [blame]14/* Architecture-specific global data */
15struct arch_global_data {
Simon Glass9e247d12012-12-13 20:49:05 +0000[diff] [blame]16#if defined(CONFIG_FSL_ESDHC)
17 u32 sdhc_clk;
Yangbo Lub124f8a2015-04-22 13:57:00 +0800[diff] [blame]18#if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT)
19 u8 sdhc_adapter;
20#endif
Simon Glass9e247d12012-12-13 20:49:05 +0000[diff] [blame]21#endif
Simon Glass34a194f2012-12-13 20:48:44 +0000[diff] [blame]22#if defined(CONFIG_8xx)
23 unsigned long brg_clk;
24#endif
25#if defined(CONFIG_CPM2)
Simon Glass44ea8512012-12-13 20:48:46 +0000[diff] [blame]26 /* There are many clocks on the MPC8260 - see page 9-5 */
27 unsigned long vco_out;
28 unsigned long cpm_clk;
29 unsigned long scc_clk;
Simon Glass34a194f2012-12-13 20:48:44 +0000[diff] [blame]30 unsigned long brg_clk;
31#endif
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]32 /* TODO: sjg@chromium.org: Should these be unslgned long? */
Peter Tyser62e73982009-05-22 17:23:24 -0500[diff] [blame]33#if defined(CONFIG_MPC83xx)
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]34 /* There are other clocks in the MPC83XX */
35 u32 csb_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]36# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
Ilya Yanoka3e5fd52010-06-28 16:44:33 +0400[diff] [blame]37 defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]38 u32 tsec1_clk;
39 u32 tsec2_clk;
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]40 u32 usbdr_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]41# elif defined(CONFIG_MPC8309)
Gerlando Falautofe201cb2012-10-10 22:13:08 +0000[diff] [blame]42 u32 usbdr_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]43# endif
44# if defined(CONFIG_MPC834x)
Scott Woodbeb638a2007-04-16 14:34:18 -0500[diff] [blame]45 u32 usbmph_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]46# endif /* CONFIG_MPC834x */
47# if defined(CONFIG_MPC8315)
Dave Liue0cfec82007-09-18 12:36:58 +0800[diff] [blame]48 u32 tdm_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]49# endif
Dave Liua46daea2006-11-03 19:33:44 -0600[diff] [blame]50 u32 core_clk;
Eran Liberty9095d4a2005-07-28 10:08:46 -0500[diff] [blame]51 u32 enc_clk;
52 u32 lbiu_clk;
53 u32 lclk_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]54# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
Ilya Yanoka3e5fd52010-06-28 16:44:33 +0400[diff] [blame]55 defined(CONFIG_MPC837x)
Dave Liu5245ff52007-09-18 12:36:11 +0800[diff] [blame]56 u32 pciexp1_clk;
57 u32 pciexp2_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]58# endif
59# if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
Dave Liu5245ff52007-09-18 12:36:11 +0800[diff] [blame]60 u32 sata_clk;
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]61# endif
62# if defined(CONFIG_MPC8360)
63 u32 mem_sec_clk;
64# endif /* CONFIG_MPC8360 */
Dave Liu5245ff52007-09-18 12:36:11 +0800[diff] [blame]65#endif
Simon Glassa8b57392012-12-13 20:48:48 +0000[diff] [blame]66#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
67 u32 lbc_clk;
68 void *cpu;
69#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
Simon Glassc2baaec2012-12-13 20:48:49 +0000[diff] [blame]70#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
71 defined(CONFIG_MPC86xx)
72 u32 i2c1_clk;
73 u32 i2c2_clk;
74#endif
Simon Glass8518b172012-12-13 20:48:50 +0000[diff] [blame]75#if defined(CONFIG_QE)
76 u32 qe_clk;
77 u32 brg_clk;
78 uint mp_alloc_base;
79 uint mp_alloc_top;
80#endif /* CONFIG_QE */
Simon Glassc6622d62012-12-13 20:48:51 +0000[diff] [blame]81#if defined(CONFIG_FSL_LAW)
82 u32 used_laws;
83#endif
Simon Glass0b466582012-12-13 20:48:52 +0000[diff] [blame]84#if defined(CONFIG_E500)
85 u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
86#endif
Simon Glass4f8c5f02012-12-13 20:48:53 +0000[diff] [blame]87#if defined(CONFIG_MPC5xxx)
88 unsigned long ipb_clk;
89#endif
Simon Glass6c6cbd12012-12-13 20:48:54 +0000[diff] [blame]90#if defined(CONFIG_MPC512X)
91 u32 ips_clk;
92 u32 csb_clk;
93#endif /* CONFIG_MPC512X */
Simon Glass4d6eaa32012-12-13 20:48:56 +0000[diff] [blame]94 unsigned long reset_status; /* reset status register at boot */
Simon Glass387a1f22012-12-13 20:48:57 +0000[diff] [blame]95#if defined(CONFIG_MPC83xx)
96 unsigned long arbiter_event_attributes;
97 unsigned long arbiter_event_address;
98#endif
Simon Glass89370732017-01-23 13:31:23 -0700[diff] [blame]99#if defined(CONFIG_CPM2)
Simon Glass93980082012-12-13 20:48:58 +0000[diff] [blame]100 unsigned int dp_alloc_base;
101 unsigned int dp_alloc_top;
102#endif
Simon Glass004cc852012-12-13 20:48:59 +0000[diff] [blame]103#if defined(CONFIG_4xx)
104 u32 uart_clk;
105#endif /* CONFIG_4xx */
Simon Glassf2d9aaf2012-12-13 20:49:02 +0000[diff] [blame]106#ifdef CONFIG_SYS_FPGA_COUNT
107 unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
108#endif
Stefan Roeseb47a63d2015-10-02 08:20:35 +0200[diff] [blame]109#if defined(CONFIG_WD_MAX_RATE)
110 unsigned long long wdt_last; /* trace watch-dog triggering rate */
111#endif
112#if defined(CONFIG_LWMON5)
113 unsigned long kbd_status;
114#endif
Simon Glasscc76e9e2012-12-13 20:48:47 +0000[diff] [blame]115};
116
Simon Glass1c62cc22012-12-13 20:49:23 +0000[diff] [blame]117#include <asm-generic/global_data.h>
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]118
119#if 1
Wolfgang Denk69c09642008-02-14 22:43:22 +0100[diff] [blame]120#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]121#else /* We could use plain global data, but the resulting code is bigger */
122#define XTRN_DECLARE_GLOBAL_DATA_PTR extern
123#define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \
124 gd_t *gd
125#endif
126
127#endif /* __ASM_GBL_DATA_H */