blob: 85331088608e4aa829e3448f15ba89a8a229e276 [file] [log] [blame]
TsiChungLiewb859ef12007-08-16 19:23:50 -05001/*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
TsiChungLiewb859ef12007-08-16 19:23:50 -05006 */
7
Wolfgang Denk0191e472010-10-26 14:34:52 +02008#include <asm-offsets.h>
TsiChungLiewb859ef12007-08-16 19:23:50 -05009#include <config.h>
10#include "version.h"
TsiChung Liew0ee47d42010-03-11 22:12:53 -060011#include <asm/cache.h>
TsiChungLiewb859ef12007-08-16 19:23:50 -050012
TsiChungLiewb859ef12007-08-16 19:23:50 -050013#define _START _start
14#define _FAULT _fault
15
16#define SAVE_ALL \
17 move.w #0x2700,%sr; /* disable intrs */ \
18 subl #60,%sp; /* space for 15 regs */ \
19 moveml %d0-%d7/%a0-%a6,%sp@;
20
21#define RESTORE_ALL \
22 moveml %sp@,%d0-%d7/%a0-%a6; \
23 addl #60,%sp; /* space for 15 regs */ \
24 rte;
25
26.text
Angelo Dureghello65d59912016-05-22 00:14:29 +020027
TsiChungLiewb859ef12007-08-16 19:23:50 -050028/*
Angelo Dureghello65d59912016-05-22 00:14:29 +020029 * Vector table. This is used for initial platform startup.
30 * These vectors are to catch any un-intended traps.
TsiChungLiewb859ef12007-08-16 19:23:50 -050031 */
32_vectors:
Angelo Dureghello65d59912016-05-22 00:14:29 +020033INITSP: .long 0x00000000 /* Initial SP */
34INITPC: .long _START /* Initial PC */
TsiChungLiewb859ef12007-08-16 19:23:50 -050035
Angelo Dureghello65d59912016-05-22 00:14:29 +020036vector02_0F:
37.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
38.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
TsiChungLiewb859ef12007-08-16 19:23:50 -050039
40/* Reserved */
41vector10_17:
42.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
43
Angelo Dureghello65d59912016-05-22 00:14:29 +020044vector18_1F:
45.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
TsiChungLiewb859ef12007-08-16 19:23:50 -050046
47/* TRAP #0 - #15 */
48vector20_2F:
49.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
50.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
51
52/* Reserved */
53vector30_3F:
54.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
55.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
56
57vector64_127:
58.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
59.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
60.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
61.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
62.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
63.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
64.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
65.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66
67vector128_191:
68.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76
77vector192_255:
78.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86
Angelo Dureghello65d59912016-05-22 00:14:29 +020087.text
TsiChungLiewb859ef12007-08-16 19:23:50 -050088
Angelo Dureghello65d59912016-05-22 00:14:29 +020089.globl _start
TsiChungLiewb859ef12007-08-16 19:23:50 -050090_start:
91 nop
92 nop
Angelo Dureghello65d59912016-05-22 00:14:29 +020093 move.w #0x2700,%sr /* Mask off Interrupt */
TsiChungLiewb859ef12007-08-16 19:23:50 -050094
95 /* Set vector base register at the beginning of the Flash */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020096 move.l #CONFIG_SYS_FLASH_BASE, %d0
TsiChungLiewb859ef12007-08-16 19:23:50 -050097 movec %d0, %VBR
98
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020099 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
TsiChungLiewb859ef12007-08-16 19:23:50 -0500100 movec %d0, %RAMBAR1
101
102 /* invalidate and disable cache */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200103 move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
104 movec %d0, %CACR /* Invalidate cache */
TsiChungLiewb859ef12007-08-16 19:23:50 -0500105 nop
106 move.l #0, %d0
107 movec %d0, %ACR0
108 movec %d0, %ACR1
109
110 /* initialize general use internal ram */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200111 move.l #0, %d0
112 move.l #(ICACHE_STATUS), %a1 /* icache */
113 move.l #(DCACHE_STATUS), %a2 /* icache */
114 move.l %d0, (%a1)
115 move.l %d0, (%a2)
TsiChungLiewb859ef12007-08-16 19:23:50 -0500116
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200117 /* put relocation table address to a5 */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200118 move.l #__got_start, %a5
TsiChungLiewb859ef12007-08-16 19:23:50 -0500119
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200120 /* setup stack initially on top of internal static ram */
121 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
122
123 /*
124 * if configured, malloc_f arena will be reserved first,
125 * then (and always) gd struct space will be reserved
126 */
127 move.l %sp, -(%sp)
128 move.l #board_init_f_alloc_reserve, %a1
129 jsr (%a1)
130
131 /* update stack and frame-pointers */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200132 move.l %d0, %sp
133 move.l %sp, %fp
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200134
135 /* initialize reserved area */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200136 move.l %d0, -(%sp)
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200137 move.l #board_init_f_init_reserve, %a1
138 jsr (%a1)
TsiChungLiewb859ef12007-08-16 19:23:50 -0500139
angelo@sysam.itb8cd1322016-04-12 00:30:59 +0200140 /* run low-level CPU init code (from flash) */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200141 move.l #cpu_init_f, %a1
142 jsr (%a1)
143
angelo@sysam.itb8cd1322016-04-12 00:30:59 +0200144 /* run low-level board init code (from flash) */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200145 clr.l %sp@-
146 move.l #board_init_f, %a1
147 jsr (%a1)
TsiChungLiewb859ef12007-08-16 19:23:50 -0500148
149 /* board_init_f() does not return */
150
Angelo Dureghello65d59912016-05-22 00:14:29 +0200151/******************************************************************************/
TsiChungLiewb859ef12007-08-16 19:23:50 -0500152
153/*
154 * void relocate_code (addr_sp, gd, addr_moni)
155 *
156 * This "function" does not return, instead it continues in RAM
157 * after relocating the monitor code.
158 *
159 * r3 = dest
160 * r4 = src
161 * r5 = length in bytes
162 * r6 = cachelinesize
163 */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200164.globl relocate_code
TsiChungLiewb859ef12007-08-16 19:23:50 -0500165relocate_code:
Angelo Dureghello65d59912016-05-22 00:14:29 +0200166 link.w %a6,#0
167 move.l 8(%a6), %sp /* set new stack pointer */
TsiChungLiewb859ef12007-08-16 19:23:50 -0500168
Angelo Dureghello65d59912016-05-22 00:14:29 +0200169 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
170 move.l 16(%a6), %a0 /* Save copy of Destination Address */
TsiChungLiewb859ef12007-08-16 19:23:50 -0500171
Angelo Dureghello65d59912016-05-22 00:14:29 +0200172 move.l #CONFIG_SYS_MONITOR_BASE, %a1
173 move.l #__init_end, %a2
174 move.l %a0, %a3
TsiChungLiewb859ef12007-08-16 19:23:50 -0500175
176 /* copy the code to RAM */
1771:
Angelo Dureghello65d59912016-05-22 00:14:29 +0200178 move.l (%a1)+, (%a3)+
179 cmp.l %a1,%a2
180 bgt.s 1b
TsiChungLiewb859ef12007-08-16 19:23:50 -0500181
182/*
183 * We are done. Do not return, instead branch to second part of board
184 * initialization, now running from RAM.
185 */
186 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200187 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
TsiChungLiewb859ef12007-08-16 19:23:50 -0500188 jmp (%a1)
189
190in_ram:
191
192clear_bss:
193 /*
194 * Now clear BSS segment
195 */
196 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200197 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
TsiChungLiewb859ef12007-08-16 19:23:50 -0500198 move.l %a0, %d1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200199 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
TsiChungLiewb859ef12007-08-16 19:23:50 -05002006:
201 clr.l (%a1)+
202 cmp.l %a1,%d1
203 bgt.s 6b
204
205 /*
206 * fix got table in RAM
207 */
208 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
TsiChungLiewb859ef12007-08-16 19:23:50 -0500210 move.l %a1,%a5 /* * fix got pointer register a5 */
211
212 move.l %a0, %a2
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200213 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
TsiChungLiewb859ef12007-08-16 19:23:50 -0500214
2157:
216 move.l (%a1),%d1
217 sub.l #_start,%d1
218 add.l %a0,%d1
219 move.l %d1,(%a1)+
220 cmp.l %a2, %a1
221 bne 7b
222
223 /* calculate relative jump to board_init_r in ram */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200224 move.l %a0, %a1
225 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
TsiChungLiewb859ef12007-08-16 19:23:50 -0500226
227 /* set parameters for board_init_r */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200228 move.l %a0,-(%sp) /* dest_addr */
229 move.l %d0,-(%sp) /* gd */
TsiChungLiewb859ef12007-08-16 19:23:50 -0500230 jsr (%a1)
231
Angelo Dureghello65d59912016-05-22 00:14:29 +0200232/******************************************************************************/
233
TsiChungLiewb859ef12007-08-16 19:23:50 -0500234/* exception code */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200235.globl _fault
TsiChungLiewb859ef12007-08-16 19:23:50 -0500236_fault:
Angelo Dureghello65d59912016-05-22 00:14:29 +0200237 bra _fault
TsiChungLiewb859ef12007-08-16 19:23:50 -0500238
Angelo Dureghello65d59912016-05-22 00:14:29 +0200239.globl _exc_handler
TsiChungLiewb859ef12007-08-16 19:23:50 -0500240_exc_handler:
241 SAVE_ALL
242 movel %sp,%sp@-
Angelo Dureghello65d59912016-05-22 00:14:29 +0200243 bsr exc_handler
TsiChungLiewb859ef12007-08-16 19:23:50 -0500244 addql #4,%sp
245 RESTORE_ALL
246
Angelo Dureghello65d59912016-05-22 00:14:29 +0200247.globl _int_handler
TsiChungLiewb859ef12007-08-16 19:23:50 -0500248_int_handler:
249 SAVE_ALL
250 movel %sp,%sp@-
Angelo Dureghello65d59912016-05-22 00:14:29 +0200251 bsr int_handler
TsiChungLiewb859ef12007-08-16 19:23:50 -0500252 addql #4,%sp
253 RESTORE_ALL
254
Angelo Dureghello65d59912016-05-22 00:14:29 +0200255/******************************************************************************/
TsiChungLiewb859ef12007-08-16 19:23:50 -0500256
Angelo Dureghello65d59912016-05-22 00:14:29 +0200257.globl version_string
TsiChungLiewb859ef12007-08-16 19:23:50 -0500258version_string:
Angelo Dureghello65d59912016-05-22 00:14:29 +0200259.ascii U_BOOT_VERSION_STRING, "\0"
260.align 4