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git01.mediatek.com / filogic / uboot / a47ed87bad5297943254c8b96f1893ca0dcfcf12 / . / arch / arm / dts / tegra20-tec.dts
blob: 4733c8134900b73df073f706ad66928518d98fc4 [file] [log] [blame]
Thierry Reding52d6c122012-06-04 20:02:30 +0000[diff] [blame]1/dts-v1/;
2
Tom Warrene41e11b2013-02-21 12:31:28 +0000[diff] [blame]3#include "tegra20-tamonten.dtsi"
Thierry Reding52d6c122012-06-04 20:02:30 +0000[diff] [blame]4
5/ {
6 model = "Avionic Design Tamonten Evaluation Carrier";
Thierry Redingd63438b2012-09-19 00:37:20 +0000[diff] [blame]7 compatible = "ad,tec", "nvidia,tegra20";
Thierry Reding52d6c122012-06-04 20:02:30 +0000[diff] [blame]8
Simon Glass0c24f372014-09-04 16:27:35 -0600[diff] [blame]9 chosen {
10 stdout-path = &uartd;
11 };
12
Thierry Reding52d6c122012-06-04 20:02:30 +0000[diff] [blame]13 aliases {
14 usb0 = "/usb@c5008000";
Stephen Warrend55aadc2016-09-13 10:45:43 -0600[diff] [blame]15 mmc0 = "/sdhci@c8000600";
Thierry Reding52d6c122012-06-04 20:02:30 +0000[diff] [blame]16 };
17
18 memory {
19 reg = <0x00000000 0x20000000>;
20 };
21
Simon Glasse31a2a52016-01-30 16:37:52 -0700[diff] [blame]22 host1x@50000000 {
Thierry Redingc9318632012-11-23 00:58:51 +0000[diff] [blame]23 status = "okay";
24
25 dc@54200000 {
26 status = "okay";
27
28 rgb {
29 nvidia,panel = <&lcd_panel>;
30 status = "okay";
31 };
32 };
33 };
34
Thierry Reding52d6c122012-06-04 20:02:30 +0000[diff] [blame]35 serial@70006300 {
36 clock-frequency = <216000000>;
37 };
38
39 i2c@7000c000 {
40 status = "disabled";
41 };
42
43 i2c@7000c400 {
44 status = "disabled";
45 };
46
47 i2c@7000c500 {
48 status = "disabled";
49 };
50
51 i2c@7000d000 {
52 status = "disabled";
53 };
54
Simon Glassd8af3c92016-01-30 16:38:01 -0700[diff] [blame]55 pwm: pwm@7000a000 {
56 status = "okay";
57 };
58
Thierry Redingc9318632012-11-23 00:58:51 +0000[diff] [blame]59 lcd_panel: panel {
60 clock = <33260000>;
61 xres = <800>;
62 yres = <480>;
63 left-margin = <120>;
64 right-margin = <120>;
65 hsync-len = <16>;
66 lower-margin = <15>;
67 upper-margin = <15>;
68 vsync-len = <15>;
69
70 nvidia,bits-per-pixel = <16>;
71 nvidia,pwm = <&pwm 0 500000>;
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]72 nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(B, 5)
73 GPIO_ACTIVE_HIGH>;
74 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
75 GPIO_ACTIVE_HIGH>;
76 nvidia,backlight-vdd-gpios = <&gpio TEGRA_GPIO(W, 0)
77 GPIO_ACTIVE_HIGH>;
Thierry Redingc9318632012-11-23 00:58:51 +0000[diff] [blame]78 nvidia,panel-timings = <0 0 0 0>;
79 };
Thierry Reding52d6c122012-06-04 20:02:30 +0000[diff] [blame]80};