stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001-2003 |
| 3 | * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <asm/processor.h> |
| 26 | #include <command.h> |
| 27 | #include <malloc.h> |
| 28 | |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 29 | |
stroese | a474323 | 2004-12-16 18:37:08 +0000 | [diff] [blame^] | 30 | extern void lxt971_no_sleep(void); |
| 31 | |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 32 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 33 | int board_early_init_f (void) |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 34 | { |
| 35 | /* |
| 36 | * IRQ 0-15 405GP internally generated; active high; level sensitive |
| 37 | * IRQ 16 405GP internally generated; active low; level sensitive |
| 38 | * IRQ 17-24 RESERVED |
| 39 | * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive |
| 40 | * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive |
| 41 | * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive |
| 42 | * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive |
| 43 | * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive |
| 44 | * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive |
| 45 | * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive |
| 46 | */ |
| 47 | mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
| 48 | mtdcr(uicer, 0x00000000); /* disable all ints */ |
| 49 | mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/ |
| 50 | mtdcr(uicpr, 0xFFFFFF9F); /* set int polarities */ |
| 51 | mtdcr(uictr, 0x10000000); /* set int trigger levels */ |
| 52 | mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/ |
| 53 | mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
| 54 | |
| 55 | /* |
| 56 | * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us |
| 57 | */ |
| 58 | mtebc (epcr, 0xa8400000); /* ebc always driven */ |
| 59 | |
| 60 | return 0; |
| 61 | } |
| 62 | |
| 63 | |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 64 | int misc_init_f (void) |
| 65 | { |
| 66 | return 0; /* dummy implementation */ |
| 67 | } |
| 68 | |
| 69 | |
| 70 | int misc_init_r (void) |
| 71 | { |
| 72 | volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); |
| 73 | volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4); |
| 74 | volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4); |
| 75 | volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4); |
stroese | a474323 | 2004-12-16 18:37:08 +0000 | [diff] [blame^] | 76 | volatile unsigned char *led_reg = (unsigned char *)((ulong)DUART0_BA + 0x20); |
| 77 | unsigned long val; |
| 78 | int delay, flashcnt; |
| 79 | char *str; |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 80 | |
| 81 | /* |
| 82 | * Enable interrupts in exar duart mcr[3] |
| 83 | */ |
| 84 | *duart0_mcr = 0x08; |
| 85 | *duart1_mcr = 0x08; |
| 86 | *duart2_mcr = 0x08; |
| 87 | *duart3_mcr = 0x08; |
| 88 | |
stroese | a474323 | 2004-12-16 18:37:08 +0000 | [diff] [blame^] | 89 | /* |
| 90 | * Set RS232/RS422 control (RS232 = high on GPIO) |
| 91 | */ |
| 92 | val = in32(GPIO0_OR); |
| 93 | val &= ~(CFG_UART2_RS232 | CFG_UART3_RS232 | CFG_UART4_RS232 | CFG_UART5_RS232); |
| 94 | |
| 95 | str = getenv("phys0"); |
| 96 | if (!str || (str && (str[0] == '0'))) |
| 97 | val |= CFG_UART2_RS232; |
| 98 | |
| 99 | str = getenv("phys1"); |
| 100 | if (!str || (str && (str[0] == '0'))) |
| 101 | val |= CFG_UART3_RS232; |
| 102 | |
| 103 | str = getenv("phys2"); |
| 104 | if (!str || (str && (str[0] == '0'))) |
| 105 | val |= CFG_UART4_RS232; |
| 106 | |
| 107 | str = getenv("phys3"); |
| 108 | if (!str || (str && (str[0] == '0'))) |
| 109 | val |= CFG_UART5_RS232; |
| 110 | |
| 111 | out32(GPIO0_OR, val); |
| 112 | |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 113 | /* |
| 114 | * Set NAND-FLASH GPIO signals to default |
| 115 | */ |
| 116 | out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE)); |
| 117 | out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE); |
| 118 | |
stroese | a474323 | 2004-12-16 18:37:08 +0000 | [diff] [blame^] | 119 | /* |
| 120 | * check board type and setup AP power |
| 121 | */ |
| 122 | str = getenv("bd_type"); /* this is only set on non prototype hardware */ |
| 123 | if (str != NULL) { |
| 124 | if ((strcmp(str, "swch405") == 0) || (strcmp(str, "hub405") == 0)) { |
| 125 | unsigned char led_reg_default = 0; |
| 126 | str = getenv("ap_pwr"); |
| 127 | if (!str || (str && (str[0] == '1'))) |
| 128 | led_reg_default = 0x04 | 0x02 ; /* U2_LED | AP_PWR */ |
| 129 | |
| 130 | /* |
| 131 | * Flash LEDs on SWCH405 |
| 132 | */ |
| 133 | for (flashcnt = 0; flashcnt < 3; flashcnt++) { |
| 134 | *led_reg = led_reg_default; /* LED_A..D off */ |
| 135 | for (delay = 0; delay < 100; delay++) |
| 136 | udelay(1000); |
| 137 | *led_reg = led_reg_default | 0xf0; /* LED_A..D on */ |
| 138 | for (delay = 0; delay < 50; delay++) |
| 139 | udelay(1000); |
| 140 | } |
| 141 | *led_reg = led_reg_default; |
| 142 | } |
| 143 | } |
| 144 | |
| 145 | /* |
| 146 | * Reset external DUARTs |
| 147 | */ |
| 148 | out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */ |
| 149 | udelay(10); /* wait 10us */ |
| 150 | out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */ |
| 151 | udelay(1000); /* wait 1ms */ |
| 152 | |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 153 | return (0); |
| 154 | } |
| 155 | |
| 156 | |
| 157 | /* |
| 158 | * Check Board Identity: |
| 159 | */ |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 160 | int checkboard (void) |
| 161 | { |
| 162 | unsigned char str[64]; |
| 163 | int i = getenv_r ("serial#", str, sizeof(str)); |
| 164 | |
| 165 | puts ("Board: "); |
| 166 | |
| 167 | if (i == -1) { |
| 168 | puts ("### No HW ID - assuming HUB405"); |
| 169 | } else { |
| 170 | puts(str); |
| 171 | } |
| 172 | |
| 173 | putc ('\n'); |
| 174 | |
stroese | a474323 | 2004-12-16 18:37:08 +0000 | [diff] [blame^] | 175 | /* |
| 176 | * Disable sleep mode in LXT971 |
| 177 | */ |
| 178 | lxt971_no_sleep(); |
| 179 | |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 180 | return 0; |
| 181 | } |
| 182 | |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 183 | |
| 184 | long int initdram (int board_type) |
| 185 | { |
| 186 | unsigned long val; |
| 187 | |
| 188 | mtdcr(memcfga, mem_mb0cf); |
| 189 | val = mfdcr(memcfgd); |
| 190 | |
| 191 | #if 0 |
| 192 | printf("\nmb0cf=%x\n", val); /* test-only */ |
| 193 | printf("strap=%x\n", mfdcr(strap)); /* test-only */ |
| 194 | #endif |
| 195 | |
| 196 | return (4*1024*1024 << ((val & 0x000e0000) >> 17)); |
| 197 | } |
| 198 | |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 199 | |
| 200 | int testdram (void) |
| 201 | { |
| 202 | /* TODO: XXX XXX XXX */ |
| 203 | printf ("test: 16 MB - ok\n"); |
| 204 | |
| 205 | return (0); |
| 206 | } |
| 207 | |
stroese | d558dc4 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 208 | |
| 209 | #if (CONFIG_COMMANDS & CFG_CMD_NAND) |
| 210 | #include <linux/mtd/nand.h> |
| 211 | extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; |
| 212 | |
| 213 | void nand_init(void) |
| 214 | { |
| 215 | nand_probe(CFG_NAND_BASE); |
| 216 | if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) { |
| 217 | print_size(nand_dev_desc[0].totlen, "\n"); |
| 218 | } |
| 219 | } |
| 220 | #endif |