blob: 6f0a220320e4b9178ad2f4f7b97a38fd0c03abe9 [file] [log] [blame]
Manivannan Sadhasivam474a5df2018-06-14 23:38:31 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
Amit Singh Tomarddc4c8e2020-04-19 19:28:26 +05303 * Memory map for Actions Semi Owl series SoCs.
Manivannan Sadhasivam474a5df2018-06-14 23:38:31 +05304 *
5 * Copyright (C) 2015 Actions Semi Co., Ltd.
6 * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
7 */
8
Manivannan Sadhasivam474a5df2018-06-14 23:38:31 +05309#include <asm/armv8/mmu.h>
10
Amit Singh Tomarddc4c8e2020-04-19 19:28:26 +053011static struct mm_region owl_mem_map[] = {
Manivannan Sadhasivam474a5df2018-06-14 23:38:31 +053012 {
13 .virt = 0x0UL, /* DDR */
14 .phys = 0x0UL, /* DDR */
15 .size = 0x80000000UL,
16 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
17 PTE_BLOCK_INNER_SHARE
18 }, {
19 .virt = 0xE0000000UL, /* Peripheral block */
20 .phys = 0xE0000000UL, /* Peripheral block */
21 .size = 0x08000000UL,
22 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
23 PTE_BLOCK_NON_SHARE |
24 PTE_BLOCK_PXN | PTE_BLOCK_UXN
25 }, {
26 /* List terminator */
27 0,
28 }
29};
30
Amit Singh Tomarddc4c8e2020-04-19 19:28:26 +053031struct mm_region *mem_map = owl_mem_map;