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Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05301/*
Marcel Ziswilerd92dee52016-11-16 17:49:23 +01002 * Copyright 2015-2016 Toradex, Inc.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05303 *
Marcel Ziswilerd92dee52016-11-16 17:49:23 +01004 * Configuration settings for the Toradex VF50/VF61 modules.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05305 *
6 * Based on vf610twr.h:
7 * Copyright 2013 Freescale Semiconductor, Inc.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15#include <asm/arch/imx-regs.h>
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053016
Gong Qianyu52de2e52015-10-26 19:47:42 +080017#define CONFIG_SYS_FSL_CLK
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053018
Marcel Ziswilerd92dee52016-11-16 17:49:23 +010019#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053020
21#define CONFIG_SKIP_LOWLEVEL_INIT
22
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053023#ifdef CONFIG_CMD_FUSE
24#define CONFIG_MXC_OCOTP
25#endif
26
Stefan Agner13011752017-04-11 11:12:14 +053027#ifdef CONFIG_VIDEO_FSL_DCU_FB
Stefan Agner13011752017-04-11 11:12:14 +053028#define CONFIG_SPLASH_SCREEN_ALIGN
29#define CONFIG_VIDEO_LOGO
30#define CONFIG_VIDEO_BMP_LOGO
31#define CONFIG_SYS_FSL_DCU_LE
32
33#define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
34#define DCU_LAYER_MAX_NUM 64
35#endif
36
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053037/* Size of malloc() pool */
38#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
39
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053040/* Allow to overwrite serial and ethaddr */
41#define CONFIG_ENV_OVERWRITE
42#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053043
44/* NAND support */
Stefan Agner4ce682a2015-05-08 19:07:13 +020045#define CONFIG_SYS_NAND_ONFI_DETECTION
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053046#define CONFIG_SYS_MAX_NAND_DEVICE 1
47#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
48
49/* Dynamic MTD partition support */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053050#define CONFIG_MTD_PARTITIONS
51#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053052
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053053#define CONFIG_FSL_ESDHC
54#define CONFIG_SYS_FSL_ESDHC_ADDR 0
55#define CONFIG_SYS_FSL_ESDHC_NUM 1
56
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053057#define CONFIG_FEC_MXC
58#define CONFIG_MII
59#define IMX_FEC_BASE ENET1_BASE_ADDR
60#define CONFIG_FEC_XCV_TYPE RMII
61#define CONFIG_FEC_MXC_PHYADDR 0
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053062
63#define CONFIG_IPADDR 192.168.10.2
64#define CONFIG_NETMASK 255.255.255.0
65#define CONFIG_SERVERIP 192.168.10.1
66
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053067#define CONFIG_LOADADDR 0x80008000
68#define CONFIG_FDTADDR 0x84000000
69
70/* We boot from the gfxRAM area of the OCRAM. */
Stefan Agner1faaa3c2017-10-17 13:59:19 +020071#define CONFIG_BOARD_SIZE_LIMIT 520192
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053072
73#define SD_BOOTCMD \
74 "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \
75 "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \
76 "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
77 "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \
78 "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053079 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053080
81#define NFS_BOOTCMD \
82 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
83 "nfsboot=run setup; " \
84 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
85 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
86 "dhcp ${kernel_addr_r} && " \
87 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053088 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053089
90#define UBI_BOOTCMD \
91 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
92 "ubi.fm_autoconvert=1\0" \
93 "ubiboot=run setup; " \
94 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
95 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
Sanchayan Maity27e4e102016-11-25 16:19:17 +053096 "ubi part ubi && " \
97 "ubi read ${kernel_addr_r} kernel && " \
98 "ubi read ${fdt_addr_r} dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053099 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530100
101#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
102
Sanchayan Maity7755e532015-04-17 18:56:42 +0530103#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
104
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530105#define CONFIG_EXTRA_ENV_SETTINGS \
106 "kernel_addr_r=0x82000000\0" \
107 "fdt_addr_r=0x84000000\0" \
108 "kernel_file=zImage\0" \
109 "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \
110 "fdt_board=eval-v3\0" \
Sanchayan Maitya48b4272016-12-02 14:28:27 +0530111 "fdt_fixup=;\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530112 "defargs=\0" \
113 "console=ttyLP0\0" \
114 "setup=setenv setupargs " \
115 "console=tty1 console=${console}" \
116 ",${baudrate}n8 ${memargs}\0" \
117 "setsdupdate=mmc rescan && set interface mmc && " \
118 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
119 "source ${loadaddr}\0" \
120 "setusbupdate=usb start && set interface usb && " \
121 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
122 "source ${loadaddr}\0" \
123 "setupdate=run setsdupdate || run setusbupdate\0" \
Tom Rini5ad8e112017-10-22 17:55:07 -0400124 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Sanchayan Maity7755e532015-04-17 18:56:42 +0530125 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
Stefan Agner13011752017-04-11 11:12:14 +0530126 "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \
127 "splashpos=m,m\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530128 SD_BOOTCMD \
129 NFS_BOOTCMD \
130 UBI_BOOTCMD
131
132/* Miscellaneous configurable options */
Sanchayan Maity0d92de42015-06-08 12:40:41 +0530133#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530134#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
135
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530136#define CONFIG_SYS_MEMTEST_START 0x80010000
137#define CONFIG_SYS_MEMTEST_END 0x87C00000
138
139#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
140#define CONFIG_SYS_HZ 1000
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530141
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530142/* Physical memory map */
143#define CONFIG_NR_DRAM_BANKS 1
144#define PHYS_SDRAM (0x80000000)
145#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
146
147#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
148#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
149#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
150
151#define CONFIG_SYS_INIT_SP_OFFSET \
152 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
153#define CONFIG_SYS_INIT_SP_ADDR \
154 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
155
156/* Environment organization */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530157
158#ifdef CONFIG_ENV_IS_IN_MMC
159#define CONFIG_SYS_MMC_ENV_DEV 0
160#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
161#define CONFIG_ENV_SIZE (8 * 1024)
162#endif
163
164#ifdef CONFIG_ENV_IS_IN_NAND
165#define CONFIG_ENV_SIZE (64 * 2048)
166#define CONFIG_ENV_RANGE (4 * 64 * 2048)
167#define CONFIG_ENV_OFFSET (12 * 64 * 2048)
168#endif
169
Sanchayan Maity7755e532015-04-17 18:56:42 +0530170/* USB Host Support */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530171#define CONFIG_USB_EHCI_VF
172#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
173#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
174
Sanchayan Maity7755e532015-04-17 18:56:42 +0530175/* USB DFU */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530176#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024)
177
178/* USB Storage */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530179
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530180#endif /* __CONFIG_H */