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git01.mediatek.com / filogic / uboot / a425f7675ee5c0021739fcf00b8d6b49aff863bc / . / configs / sandbox_defconfig
blob: 2600bf70c0095fcf05f32f61c80df08f5458aff2 [file] [log] [blame]
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]1CONFIG_PCI=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]2CONFIG_DEFAULT_DEVICE_TREE="sandbox"
Ruchika Guptae9a788d2015-01-23 16:01:53 +0530[diff] [blame]3CONFIG_FIT=y
4CONFIG_FIT_VERBOSE=y
5CONFIG_FIT_SIGNATURE=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]6# CONFIG_CMD_IMLS is not set
7# CONFIG_CMD_FLASH is not set
8# CONFIG_CMD_SETEXPR is not set
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]9CONFIG_CMD_SOUND=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]10CONFIG_BOOTSTAGE=y
11CONFIG_BOOTSTAGE_REPORT=y
Joe Hershbergerb8819ac2015-05-20 14:27:14 -0500[diff] [blame]12CONFIG_CMD_PMIC=y
13CONFIG_CMD_REGULATOR=y
Simon Glass8b6216a2015-08-22 18:31:20 -0600[diff] [blame]14CONFIG_CMD_TPM=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]15CONFIG_OF_CONTROL=y
16CONFIG_OF_HOSTFILE=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]17CONFIG_CLK=y
18CONFIG_REGMAP=y
19CONFIG_SYSCON=y
20CONFIG_DEVRES=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]21CONFIG_DM_PCI=y
22CONFIG_PCI_SANDBOX=y
23CONFIG_SPI_FLASH_SANDBOX=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]24CONFIG_SPI_FLASH=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]25CONFIG_CMD_CROS_EC=y
Simon Glass5b79bb22015-02-13 12:20:47 -0700[diff] [blame]26CONFIG_CROS_EC=y
Simon Glass5b79bb22015-02-13 12:20:47 -0700[diff] [blame]27CONFIG_CROS_EC_SANDBOX=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]28CONFIG_RESET=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]29CONFIG_DM_ETH=y
Simon Glass5b79bb22015-02-13 12:20:47 -0700[diff] [blame]30CONFIG_CROS_EC_KEYB=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]31CONFIG_LED=y
32CONFIG_LED_GPIO=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]33CONFIG_SANDBOX_SERIAL=y
Simon Glassa425f762015-08-22 18:31:35 -0600[diff] [blame^]34CONFIG_DM_TPM=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]35CONFIG_TPM_TIS_SANDBOX=y
Simon Glass39bc3be2015-03-06 13:19:04 -0700[diff] [blame]36CONFIG_SYS_I2C_SANDBOX=y
Simon Glass4b322d32015-03-06 13:19:05 -0700[diff] [blame]37CONFIG_SANDBOX_SPI=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]38CONFIG_SANDBOX_GPIO=y
Joe Hershbergerb8819ac2015-05-20 14:27:14 -0500[diff] [blame]39CONFIG_DM_PMIC=y
40CONFIG_DM_PMIC_SANDBOX=y
41CONFIG_DM_REGULATOR=y
42CONFIG_DM_REGULATOR_SANDBOX=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]43CONFIG_RAM=y
Simon Glass3f111d42015-03-06 13:19:08 -0700[diff] [blame]44CONFIG_SOUND=y
Simon Glass9c2d7af2015-03-06 13:19:14 -0700[diff] [blame]45CONFIG_SOUND_SANDBOX=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]46CONFIG_USB=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]47CONFIG_DM_USB=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]48CONFIG_USB_EMUL=y
49CONFIG_USB_STORAGE=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]50CONFIG_DM_MMC=y
Simon Glass4a9cbb92015-04-20 12:37:29 -0600[diff] [blame]51CONFIG_DM_RTC=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]52CONFIG_SYS_VSNPRINTF=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]53CONFIG_CMD_DHRYSTONE=y
Simon Glass8b6216a2015-08-22 18:31:20 -0600[diff] [blame]54CONFIG_TPM=y
Przemyslaw Marczak200d0222015-05-13 13:38:36 +0200[diff] [blame]55CONFIG_ERRNO_STR=y
Joe Hershberger437176b2015-05-20 14:27:31 -0500[diff] [blame]56CONFIG_UNIT_TEST=y
Joe Hershbergeree20efe2015-05-20 14:27:30 -0500[diff] [blame]57CONFIG_UT_TIME=y
Joe Hershberger9dc1d712015-05-20 14:27:29 -0500[diff] [blame]58CONFIG_UT_DM=y
Joe Hershberger38418272015-05-20 14:27:39 -0500[diff] [blame]59CONFIG_UT_ENV=y