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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Behún58371682017-06-09 19:28:42 +02002/*
Marek Behúnd63726e2022-06-01 17:17:06 +02003 * Copyright (C) 2017 Marek Behún <kabel@kernel.org>
Marek Behún58371682017-06-09 19:28:42 +02004 */
5
6/ {
7 aliases {
8 i2c0 = &i2c0;
9 i2c1 = &i2cmux;
10 spi0 = &spi0;
11 };
12};
13
14&i2c0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070015 bootph-all;
Marek Behún58371682017-06-09 19:28:42 +020016
17 i2cmux: i2cmux@70 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070018 bootph-all;
Marek Behún58371682017-06-09 19:28:42 +020019
20 i2c@0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070021 bootph-all;
Marek Behún58371682017-06-09 19:28:42 +020022 };
23
24 i2c@1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070025 bootph-all;
Marek Behún58371682017-06-09 19:28:42 +020026 };
27
28 i2c@5 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070029 bootph-all;
Marek Behún58371682017-06-09 19:28:42 +020030
Pali Rohár9300f6c2022-04-08 16:30:15 +020031 crypto@64 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070032 bootph-all;
Marek Behún58371682017-06-09 19:28:42 +020033 };
34 };
35 };
36};
37
Marek Mojík8f3b5b32023-12-19 10:55:55 +010038&mdio {
39 switch@10 {
40 mdio {
41 #address-cells = <1>;
42 #size-cells = <0>;
43
44 sw_phy0: ethernet-phy@0 {
45 reg = <0x0>;
46 };
47
48 sw_phy1: ethernet-phy@1 {
49 reg = <0x1>;
50 };
51
52 sw_phy2: ethernet-phy@2 {
53 reg = <0x2>;
54 };
55
56 sw_phy3: ethernet-phy@3 {
57 reg = <0x3>;
58 };
59
60 sw_phy4: ethernet-phy@4 {
61 reg = <0x4>;
62 };
63 };
64 ports {
65 ports@0 {
66 phy-handle = <&sw_phy0>;
67 phy-mode = "internal";
68 };
69 ports@1 {
70 phy-handle = <&sw_phy1>;
71 phy-mode = "internal";
72 };
73 ports@2 {
74 phy-handle = <&sw_phy2>;
75 phy-mode = "internal";
76 };
77 ports@3 {
78 phy-handle = <&sw_phy3>;
79 phy-mode = "internal";
80 };
81 ports@4 {
82 phy-handle = <&sw_phy4>;
83 phy-mode = "internal";
84 };
85 };
86 };
87};
88
Rogier Stame0e10d42022-02-09 00:27:00 +010089#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
Marek Behún58371682017-06-09 19:28:42 +020090&spi0 {
Pali Rohár6458dea2022-07-27 14:47:38 +020091 flash@0 {
Marek Behún3e83efa2021-07-15 19:21:01 +020092 partitions {
93 partition@0 {
94 reg = <0x0 CONFIG_ENV_OFFSET>;
95 };
96
97 partition@f0000 {
98 reg = <CONFIG_ENV_OFFSET CONFIG_ENV_SIZE>;
99 label = "u-boot-env";
100 };
101 };
Marek Behún58371682017-06-09 19:28:42 +0200102 };
103};
Rogier Stame0e10d42022-02-09 00:27:00 +0100104#endif
Marek Behún58371682017-06-09 19:28:42 +0200105
Pali Rohár75c36582022-08-03 13:00:51 +0200106#include "mvebu-u-boot.dtsi"