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git01.mediatek.com / filogic / uboot / a4102644e04e5472be0e2abad1ca9c96b2d55cab / . / board / m5272c3 / u-boot.lds
blob: f7dc0709040af5dca7a1ae029497bca26d768c36 [file] [log] [blame]
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]1/*
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]2 * (C) Copyright 2000
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(m68k)
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]25SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]26/* Do we need any of these for elf?
27 __DYNAMIC = 0; */
28SECTIONS
29{
30 /* Read-only sections, merged into text segment: */
31 . = + SIZEOF_HEADERS;
32 .interp : { *(.interp) }
33 .hash : { *(.hash) }
34 .dynsym : { *(.dynsym) }
35 .dynstr : { *(.dynstr) }
36 .rel.text : { *(.rel.text) }
37 .rela.text : { *(.rela.text) }
38 .rel.data : { *(.rel.data) }
39 .rela.data : { *(.rela.data) }
40 .rel.rodata : { *(.rel.rodata) }
41 .rela.rodata : { *(.rela.rodata) }
42 .rel.got : { *(.rel.got) }
43 .rela.got : { *(.rela.got) }
44 .rel.ctors : { *(.rel.ctors) }
45 .rela.ctors : { *(.rela.ctors) }
46 .rel.dtors : { *(.rel.dtors) }
47 .rela.dtors : { *(.rela.dtors) }
48 .rel.bss : { *(.rel.bss) }
49 .rela.bss : { *(.rela.bss) }
50 .rel.plt : { *(.rel.plt) }
51 .rela.plt : { *(.rela.plt) }
52 .init : { *(.init) }
53 .plt : { *(.plt) }
54 .text :
55 {
56 /* WARNING - the following is hand-optimized to fit within */
57 /* the sector layout of our flash chips! XXX FIXME XXX */
58
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]59 cpu/mcf52x2/start.o (.text)
60 lib_m68k/traps.o (.text)
61 cpu/mcf52x2/interrupts.o (.text)
62 common/dlmalloc.o (.text)
63 lib_generic/zlib.o (.text)
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]64
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]65 . = DEFINED(env_offset) ? env_offset : .;
66 common/environment.o (.text)
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]67
68 *(.text)
69 *(.fixup)
70 *(.got1)
71 }
72 _etext = .;
73 PROVIDE (etext = .);
74 .rodata :
75 {
76 *(.rodata)
77 *(.rodata1)
78 }
79 .fini : { *(.fini) } =0
80 .ctors : { *(.ctors) }
81 .dtors : { *(.dtors) }
82
83 /* Read-write section, merged into data segment: */
84 . = (. + 0x00FF) & 0xFFFFFF00;
85 _erotext = .;
86 PROVIDE (erotext = .);
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]87
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]88 .reloc :
89 {
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]90 __got_start = .;
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]91 *(.got)
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]92 __got_end = .;
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]93 _GOT2_TABLE_ = .;
94 *(.got2)
95 _FIXUP_TABLE_ = .;
96 *(.fixup)
97 }
98 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
99 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
100
101 .data :
102 {
103 *(.data)
104 *(.data1)
105 *(.sdata)
106 *(.sdata2)
107 *(.dynamic)
108 CONSTRUCTORS
109 }
110 _edata = .;
111 PROVIDE (edata = .);
112
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]113 . = .;
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]114 __u_boot_cmd_start = .;
115 .u_boot_cmd : { *(.u_boot_cmd) }
116 __u_boot_cmd_end = .;
117
118
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]119 . = .;
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]120 __start___ex_table = .;
121 __ex_table : { *(__ex_table) }
122 __stop___ex_table = .;
123
124 . = ALIGN(256);
125 __init_begin = .;
126 .text.init : { *(.text.init) }
127 .data.init : { *(.data.init) }
128 . = ALIGN(256);
129 __init_end = .;
130
131 __bss_start = .;
132 .bss :
133 {
134 _sbss = .;
135 *(.sbss) *(.scommon)
136 *(.dynbss)
137 *(.bss)
138 *(COMMON)
139 . = ALIGN(4);
140 _ebss = .;
141 }
142 _end = . ;
143 PROVIDE (end = .);
144}