| Mugunthan V N | 0f14831 | 2015-09-22 18:45:12 +0530 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_OMAP54XX=y |
| 3 | CONFIG_TARGET_DRA7XX_EVM=y |
| Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 4 | CONFIG_DM_GPIO=y |
| 5 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
| Mugunthan V N | 0f14831 | 2015-09-22 18:45:12 +0530 | [diff] [blame] | 6 | CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" |
| 7 | CONFIG_SPL=y |
| 8 | CONFIG_SPL_STACK_R=y |
| Mugunthan V N | 0f14831 | 2015-09-22 18:45:12 +0530 | [diff] [blame] | 9 | # CONFIG_CMD_IMLS is not set |
| 10 | # CONFIG_CMD_FLASH is not set |
| Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 11 | CONFIG_CMD_GPIO=y |
| Mugunthan V N | 0f14831 | 2015-09-22 18:45:12 +0530 | [diff] [blame] | 12 | # CONFIG_CMD_SETEXPR is not set |
| 13 | # CONFIG_CMD_NFS is not set |
| 14 | CONFIG_OF_CONTROL=y |
| Mugunthan V N | 0f14831 | 2015-09-22 18:45:12 +0530 | [diff] [blame] | 15 | CONFIG_DM=y |
| 16 | CONFIG_SPI_FLASH=y |
| 17 | CONFIG_SPI_FLASH_BAR=y |
| Bin Meng | 27f5b19 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 18 | CONFIG_SPI_FLASH_SPANSION=y |
| Mugunthan V N | 2d2046d | 2015-11-26 17:25:42 +0530 | [diff] [blame] | 19 | CONFIG_DM_SERIAL=y |
| Thomas Chou | a6cec01 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 20 | CONFIG_SYS_NS16550=y |
| Bin Meng | 72a049d | 2015-11-25 05:34:53 -0800 | [diff] [blame] | 21 | CONFIG_TI_QSPI=y |
| Mugunthan V N | 9fe0f30 | 2015-12-23 20:39:46 +0530 | [diff] [blame] | 22 | CONFIG_DM_SPI=y |
| 23 | CONFIG_DM_SPI_FLASH=y |
| Mugunthan V N | 825c186 | 2015-12-24 16:08:22 +0530 | [diff] [blame] | 24 | CONFIG_TIMER=y |
| 25 | CONFIG_OMAP_TIMER=y |