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git01.mediatek.com / filogic / uboot / a3d6939ca80e6628505268a9753ad42e50529efb / . / dts / upstream / src / riscv / starfive / jh7110-common.dtsi
blob: 68d16717db8cdbdac9e55ce25a8466bcea27b4d2 [file] [log] [blame]
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/*
3 * Copyright (C) 2022 StarFive Technology Co., Ltd.
4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
5 */
6
7/dts-v1/;
8#include "jh7110.dtsi"
9#include "jh7110-pinfunc.h"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13 aliases {
14 ethernet0 = &gmac0;
15 i2c0 = &i2c0;
16 i2c2 = &i2c2;
17 i2c5 = &i2c5;
18 i2c6 = &i2c6;
19 mmc0 = &mmc0;
20 mmc1 = &mmc1;
21 serial0 = &uart0;
22 };
23
24 chosen {
25 stdout-path = "serial0:115200n8";
26 };
27
28 memory@40000000 {
29 device_type = "memory";
30 reg = <0x0 0x40000000 0x1 0x0>;
31 };
32
33 gpio-restart {
34 compatible = "gpio-restart";
35 gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
36 priority = <224>;
37 };
38
39 pwmdac_codec: audio-codec {
40 compatible = "linux,spdif-dit";
41 #sound-dai-cells = <0>;
42 };
43
44 sound {
45 compatible = "simple-audio-card";
46 simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
47 #address-cells = <1>;
48 #size-cells = <0>;
49
50 simple-audio-card,dai-link@0 {
51 reg = <0>;
52 format = "left_j";
53 bitclock-master = <&sndcpu0>;
54 frame-master = <&sndcpu0>;
55
56 sndcpu0: cpu {
57 sound-dai = <&pwmdac>;
58 };
59
60 codec {
61 sound-dai = <&pwmdac_codec>;
62 };
63 };
64 };
65};
66
67&cpus {
68 timebase-frequency = <4000000>;
69};
70
71&dvp_clk {
72 clock-frequency = <74250000>;
73};
74
75&gmac0_rgmii_rxin {
76 clock-frequency = <125000000>;
77};
78
79&gmac0_rmii_refin {
80 clock-frequency = <50000000>;
81};
82
83&gmac1_rgmii_rxin {
84 clock-frequency = <125000000>;
85};
86
87&gmac1_rmii_refin {
88 clock-frequency = <50000000>;
89};
90
91&hdmitx0_pixelclk {
92 clock-frequency = <297000000>;
93};
94
95&i2srx_bclk_ext {
96 clock-frequency = <12288000>;
97};
98
99&i2srx_lrck_ext {
100 clock-frequency = <192000>;
101};
102
103&i2stx_bclk_ext {
104 clock-frequency = <12288000>;
105};
106
107&i2stx_lrck_ext {
108 clock-frequency = <192000>;
109};
110
111&mclk_ext {
112 clock-frequency = <12288000>;
113};
114
115&osc {
116 clock-frequency = <24000000>;
117};
118
119&rtc_osc {
120 clock-frequency = <32768>;
121};
122
123&tdm_ext {
124 clock-frequency = <49152000>;
125};
126
127&camss {
128 assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
129 <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
130 assigned-clock-rates = <49500000>, <198000000>;
131 status = "okay";
132
133 ports {
134 #address-cells = <1>;
135 #size-cells = <0>;
136
137 port@0 {
138 reg = <0>;
139 };
140
141 port@1 {
142 reg = <1>;
143
144 camss_from_csi2rx: endpoint {
145 remote-endpoint = <&csi2rx_to_camss>;
146 };
147 };
148 };
149};
150
151&csi2rx {
152 assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
153 assigned-clock-rates = <297000000>;
154 status = "okay";
155
156 ports {
157 #address-cells = <1>;
158 #size-cells = <0>;
159
160 port@0 {
161 reg = <0>;
162
163 /* remote MIPI sensor endpoint */
164 };
165
166 port@1 {
167 reg = <1>;
168
169 csi2rx_to_camss: endpoint {
170 remote-endpoint = <&camss_from_csi2rx>;
171 };
172 };
173 };
174};
175
176&gmac0 {
177 phy-handle = <&phy0>;
178 phy-mode = "rgmii-id";
179 status = "okay";
180
181 mdio {
182 #address-cells = <1>;
183 #size-cells = <0>;
184 compatible = "snps,dwmac-mdio";
185
186 phy0: ethernet-phy@0 {
187 reg = <0>;
188 };
189 };
190};
191
192&i2c0 {
193 clock-frequency = <100000>;
194 i2c-sda-hold-time-ns = <300>;
195 i2c-sda-falling-time-ns = <510>;
196 i2c-scl-falling-time-ns = <510>;
197 pinctrl-names = "default";
198 pinctrl-0 = <&i2c0_pins>;
199 status = "okay";
200};
201
202&i2c2 {
203 clock-frequency = <100000>;
204 i2c-sda-hold-time-ns = <300>;
205 i2c-sda-falling-time-ns = <510>;
206 i2c-scl-falling-time-ns = <510>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&i2c2_pins>;
209 status = "okay";
210};
211
212&i2c5 {
213 clock-frequency = <100000>;
214 i2c-sda-hold-time-ns = <300>;
215 i2c-sda-falling-time-ns = <510>;
216 i2c-scl-falling-time-ns = <510>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&i2c5_pins>;
219 status = "okay";
220
221 axp15060: pmic@36 {
222 compatible = "x-powers,axp15060";
223 reg = <0x36>;
224 interrupt-controller;
225 #interrupt-cells = <1>;
226
227 regulators {
228 vcc_3v3: dcdc1 {
229 regulator-boot-on;
230 regulator-always-on;
231 regulator-min-microvolt = <3300000>;
232 regulator-max-microvolt = <3300000>;
233 regulator-name = "vcc_3v3";
234 };
235
236 vdd_cpu: dcdc2 {
237 regulator-always-on;
238 regulator-min-microvolt = <500000>;
239 regulator-max-microvolt = <1540000>;
240 regulator-name = "vdd-cpu";
241 };
242
243 emmc_vdd: aldo4 {
244 regulator-boot-on;
245 regulator-always-on;
246 regulator-min-microvolt = <1800000>;
247 regulator-max-microvolt = <3300000>;
248 regulator-name = "emmc_vdd";
249 };
250 };
251 };
252};
253
254&i2c6 {
255 clock-frequency = <100000>;
256 i2c-sda-hold-time-ns = <300>;
257 i2c-sda-falling-time-ns = <510>;
258 i2c-scl-falling-time-ns = <510>;
259 pinctrl-names = "default";
260 pinctrl-0 = <&i2c6_pins>;
261 status = "okay";
262};
263
264&mmc0 {
265 max-frequency = <100000000>;
266 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
267 assigned-clock-rates = <50000000>;
268 bus-width = <8>;
269 cap-mmc-highspeed;
270 mmc-ddr-1_8v;
271 mmc-hs200-1_8v;
272 cap-mmc-hw-reset;
273 post-power-on-delay-ms = <200>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&mmc0_pins>;
276 vmmc-supply = <&vcc_3v3>;
277 vqmmc-supply = <&emmc_vdd>;
278 status = "okay";
279};
280
281&mmc1 {
282 max-frequency = <100000000>;
283 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
284 assigned-clock-rates = <50000000>;
285 bus-width = <4>;
286 no-sdio;
287 no-mmc;
288 cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
289 disable-wp;
290 cap-sd-highspeed;
291 post-power-on-delay-ms = <200>;
292 pinctrl-names = "default";
293 pinctrl-0 = <&mmc1_pins>;
294 status = "okay";
295};
296
297&pwmdac {
298 pinctrl-names = "default";
299 pinctrl-0 = <&pwmdac_pins>;
300 status = "okay";
301};
302
303&qspi {
304 #address-cells = <1>;
305 #size-cells = <0>;
306 status = "okay";
307
308 nor_flash: flash@0 {
309 compatible = "jedec,spi-nor";
310 reg = <0>;
311 cdns,read-delay = <5>;
312 spi-max-frequency = <12000000>;
313 cdns,tshsl-ns = <1>;
314 cdns,tsd2d-ns = <1>;
315 cdns,tchsh-ns = <1>;
316 cdns,tslch-ns = <1>;
317
318 partitions {
319 compatible = "fixed-partitions";
320 #address-cells = <1>;
321 #size-cells = <1>;
322
323 spl@0 {
324 reg = <0x0 0x80000>;
325 };
326 uboot-env@f0000 {
327 reg = <0xf0000 0x10000>;
328 };
329 uboot@100000 {
330 reg = <0x100000 0x400000>;
331 };
332 reserved-data@600000 {
333 reg = <0x600000 0xa00000>;
334 };
335 };
336 };
337};
338
339&pwm {
340 pinctrl-names = "default";
341 pinctrl-0 = <&pwm_pins>;
342 status = "okay";
343};
344
345&spi0 {
346 pinctrl-names = "default";
347 pinctrl-0 = <&spi0_pins>;
348 status = "okay";
349
350 spi_dev0: spi@0 {
351 compatible = "rohm,dh2228fv";
352 reg = <0>;
353 spi-max-frequency = <10000000>;
354 };
355};
356
357&sysgpio {
358 i2c0_pins: i2c0-0 {
359 i2c-pins {
360 pinmux = <GPIOMUX(57, GPOUT_LOW,
361 GPOEN_SYS_I2C0_CLK,
362 GPI_SYS_I2C0_CLK)>,
363 <GPIOMUX(58, GPOUT_LOW,
364 GPOEN_SYS_I2C0_DATA,
365 GPI_SYS_I2C0_DATA)>;
366 bias-disable; /* external pull-up */
367 input-enable;
368 input-schmitt-enable;
369 };
370 };
371
372 i2c2_pins: i2c2-0 {
373 i2c-pins {
374 pinmux = <GPIOMUX(3, GPOUT_LOW,
375 GPOEN_SYS_I2C2_CLK,
376 GPI_SYS_I2C2_CLK)>,
377 <GPIOMUX(2, GPOUT_LOW,
378 GPOEN_SYS_I2C2_DATA,
379 GPI_SYS_I2C2_DATA)>;
380 bias-disable; /* external pull-up */
381 input-enable;
382 input-schmitt-enable;
383 };
384 };
385
386 i2c5_pins: i2c5-0 {
387 i2c-pins {
388 pinmux = <GPIOMUX(19, GPOUT_LOW,
389 GPOEN_SYS_I2C5_CLK,
390 GPI_SYS_I2C5_CLK)>,
391 <GPIOMUX(20, GPOUT_LOW,
392 GPOEN_SYS_I2C5_DATA,
393 GPI_SYS_I2C5_DATA)>;
394 bias-disable; /* external pull-up */
395 input-enable;
396 input-schmitt-enable;
397 };
398 };
399
400 i2c6_pins: i2c6-0 {
401 i2c-pins {
402 pinmux = <GPIOMUX(16, GPOUT_LOW,
403 GPOEN_SYS_I2C6_CLK,
404 GPI_SYS_I2C6_CLK)>,
405 <GPIOMUX(17, GPOUT_LOW,
406 GPOEN_SYS_I2C6_DATA,
407 GPI_SYS_I2C6_DATA)>;
408 bias-disable; /* external pull-up */
409 input-enable;
410 input-schmitt-enable;
411 };
412 };
413
414 mmc0_pins: mmc0-0 {
415 rst-pins {
416 pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
417 GPOEN_ENABLE,
418 GPI_NONE)>;
419 bias-pull-up;
420 drive-strength = <12>;
421 input-disable;
422 input-schmitt-disable;
423 slew-rate = <0>;
424 };
425
426 mmc-pins {
427 pinmux = <PINMUX(64, 0)>,
428 <PINMUX(65, 0)>,
429 <PINMUX(66, 0)>,
430 <PINMUX(67, 0)>,
431 <PINMUX(68, 0)>,
432 <PINMUX(69, 0)>,
433 <PINMUX(70, 0)>,
434 <PINMUX(71, 0)>,
435 <PINMUX(72, 0)>,
436 <PINMUX(73, 0)>;
437 bias-pull-up;
438 drive-strength = <12>;
439 input-enable;
440 };
441 };
442
443 mmc1_pins: mmc1-0 {
444 clk-pins {
445 pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
446 GPOEN_ENABLE,
447 GPI_NONE)>;
448 bias-pull-up;
449 drive-strength = <12>;
450 input-disable;
451 input-schmitt-disable;
452 slew-rate = <0>;
453 };
454
455 mmc-pins {
456 pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
457 GPOEN_SYS_SDIO1_CMD,
458 GPI_SYS_SDIO1_CMD)>,
459 <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
460 GPOEN_SYS_SDIO1_DATA0,
461 GPI_SYS_SDIO1_DATA0)>,
462 <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
463 GPOEN_SYS_SDIO1_DATA1,
464 GPI_SYS_SDIO1_DATA1)>,
465 <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
466 GPOEN_SYS_SDIO1_DATA2,
467 GPI_SYS_SDIO1_DATA2)>,
468 <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
469 GPOEN_SYS_SDIO1_DATA3,
470 GPI_SYS_SDIO1_DATA3)>;
471 bias-pull-up;
472 drive-strength = <12>;
473 input-enable;
474 input-schmitt-enable;
475 slew-rate = <0>;
476 };
477 };
478
479 pwmdac_pins: pwmdac-0 {
480 pwmdac-pins {
481 pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
482 GPOEN_ENABLE,
483 GPI_NONE)>,
484 <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
485 GPOEN_ENABLE,
486 GPI_NONE)>;
487 bias-disable;
488 drive-strength = <2>;
489 input-disable;
490 input-schmitt-disable;
491 slew-rate = <0>;
492 };
493 };
494
495 pwm_pins: pwm-0 {
496 pwm-pins {
497 pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
498 GPOEN_SYS_PWM0_CHANNEL0,
499 GPI_NONE)>,
500 <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
501 GPOEN_SYS_PWM0_CHANNEL1,
502 GPI_NONE)>;
503 bias-disable;
504 drive-strength = <12>;
505 input-disable;
506 input-schmitt-disable;
507 slew-rate = <0>;
508 };
509 };
510
511 spi0_pins: spi0-0 {
512 mosi-pins {
513 pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
514 GPOEN_ENABLE,
515 GPI_NONE)>;
516 bias-disable;
517 input-disable;
518 input-schmitt-disable;
519 };
520
521 miso-pins {
522 pinmux = <GPIOMUX(53, GPOUT_LOW,
523 GPOEN_DISABLE,
524 GPI_SYS_SPI0_RXD)>;
525 bias-pull-up;
526 input-enable;
527 input-schmitt-enable;
528 };
529
530 sck-pins {
531 pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
532 GPOEN_ENABLE,
533 GPI_SYS_SPI0_CLK)>;
534 bias-disable;
535 input-disable;
536 input-schmitt-disable;
537 };
538
539 ss-pins {
540 pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
541 GPOEN_ENABLE,
542 GPI_SYS_SPI0_FSS)>;
543 bias-disable;
544 input-disable;
545 input-schmitt-disable;
546 };
547 };
548
549 uart0_pins: uart0-0 {
550 tx-pins {
551 pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
552 GPOEN_ENABLE,
553 GPI_NONE)>;
554 bias-disable;
555 drive-strength = <12>;
556 input-disable;
557 input-schmitt-disable;
558 slew-rate = <0>;
559 };
560
561 rx-pins {
562 pinmux = <GPIOMUX(6, GPOUT_LOW,
563 GPOEN_DISABLE,
564 GPI_SYS_UART0_RX)>;
565 bias-disable; /* external pull-up */
566 drive-strength = <2>;
567 input-enable;
568 input-schmitt-enable;
569 slew-rate = <0>;
570 };
571 };
572};
573
574&uart0 {
575 pinctrl-names = "default";
576 pinctrl-0 = <&uart0_pins>;
577 status = "okay";
578};
579
580&usb0 {
581 dr_mode = "peripheral";
582 status = "okay";
583};
584
585&U74_1 {
586 cpu-supply = <&vdd_cpu>;
587};
588
589&U74_2 {
590 cpu-supply = <&vdd_cpu>;
591};
592
593&U74_3 {
594 cpu-supply = <&vdd_cpu>;
595};
596
597&U74_4 {
598 cpu-supply = <&vdd_cpu>;
599};