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git01.mediatek.com / filogic / uboot / a3d6939ca80e6628505268a9753ad42e50529efb / . / dts / upstream / src / arm64 / rockchip / rk3588-edgeble-neu6a-common.dtsi
blob: 709d348cf06b81781f68fdcbb776ca8b3742941a [file] [log] [blame]
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
4 */
5
6#include <dt-bindings/gpio/gpio.h>
7#include <dt-bindings/leds/common.h>
8
9/ {
10 aliases {
11 mmc0 = &sdhci;
12 };
13
14 gpio-leds {
15 compatible = "gpio-leds";
16
17 led_user: led-0 {
18 color = <LED_COLOR_ID_GREEN>;
19 function = LED_FUNCTION_HEARTBEAT;
20 gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
21 linux,default-trigger = "heartbeat";
22 pinctrl-names = "default";
23 pinctrl-0 = <&led_user_en>;
24 };
25 };
26
27 vcc12v_dcin: vcc12v-dcin-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vcc12v_dcin";
30 regulator-always-on;
31 regulator-boot-on;
32 regulator-min-microvolt = <12000000>;
33 regulator-max-microvolt = <12000000>;
34 };
35
36 vcc5v0_sys: vcc5v0-sys-regulator {
37 compatible = "regulator-fixed";
38 regulator-name = "vcc5v0_sys";
39 regulator-always-on;
40 regulator-boot-on;
41 regulator-min-microvolt = <5000000>;
42 regulator-max-microvolt = <5000000>;
43 vin-supply = <&vcc12v_dcin>;
44 };
45
46 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
47 compatible = "regulator-fixed";
48 regulator-name = "vcc_1v1_nldo_s3";
49 regulator-always-on;
50 regulator-boot-on;
51 regulator-min-microvolt = <1100000>;
52 regulator-max-microvolt = <1100000>;
53 vin-supply = <&vcc5v0_sys>;
54 };
55};
56
57&cpu_b0 {
58 cpu-supply = <&vdd_cpu_big0_s0>;
59};
60
61&cpu_b1 {
62 cpu-supply = <&vdd_cpu_big0_s0>;
63};
64
65&cpu_b2 {
66 cpu-supply = <&vdd_cpu_big1_s0>;
67};
68
69&cpu_b3 {
70 cpu-supply = <&vdd_cpu_big1_s0>;
71};
72
73&cpu_l0 {
74 cpu-supply = <&vdd_cpu_lit_s0>;
75};
76
77&cpu_l1 {
78 cpu-supply = <&vdd_cpu_lit_s0>;
79};
80
81&cpu_l2 {
82 cpu-supply = <&vdd_cpu_lit_s0>;
83};
84
85&cpu_l3 {
86 cpu-supply = <&vdd_cpu_lit_s0>;
87};
88
89&i2c0 {
90 pinctrl-names = "default";
91 pinctrl-0 = <&i2c0m2_xfer>;
92 status = "okay";
93
94 vdd_cpu_big0_s0: regulator@42 {
95 compatible = "rockchip,rk8602";
96 reg = <0x42>;
97 fcs,suspend-voltage-selector = <1>;
98 regulator-name = "vdd_cpu_big0_s0";
99 regulator-always-on;
100 regulator-boot-on;
101 regulator-min-microvolt = <550000>;
102 regulator-max-microvolt = <1050000>;
103 regulator-ramp-delay = <2300>;
104 vin-supply = <&vcc5v0_sys>;
105
106 regulator-state-mem {
107 regulator-off-in-suspend;
108 };
109 };
110
111 vdd_cpu_big1_s0: regulator@43 {
112 compatible = "rockchip,rk8603", "rockchip,rk8602";
113 reg = <0x43>;
114 fcs,suspend-voltage-selector = <1>;
115 regulator-name = "vdd_cpu_big1_s0";
116 regulator-always-on;
117 regulator-boot-on;
118 regulator-min-microvolt = <550000>;
119 regulator-max-microvolt = <1050000>;
120 regulator-ramp-delay = <2300>;
121 vin-supply = <&vcc5v0_sys>;
122
123 regulator-state-mem {
124 regulator-off-in-suspend;
125 };
126 };
127};
128
129&pinctrl {
130 leds {
131 led_user_en: led_user_en {
132 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
133 };
134 };
135};
136
137&sdhci {
138 bus-width = <8>;
139 no-sdio;
140 no-sd;
141 non-removable;
142 mmc-hs400-1_8v;
143 mmc-hs400-enhanced-strobe;
144 status = "okay";
145};
146
147&spi2 {
148 status = "okay";
149 assigned-clocks = <&cru CLK_SPI2>;
150 assigned-clock-rates = <200000000>;
151 num-cs = <1>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
154
155 pmic@0 {
156 compatible = "rockchip,rk806";
157 spi-max-frequency = <1000000>;
158 reg = <0x0>;
159 interrupt-parent = <&gpio0>;
160 interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
161 pinctrl-names = "default";
162 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
163 <&rk806_dvs2_null>, <&rk806_dvs3_null>;
164
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]165 system-power-controller;
166
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]167 vcc1-supply = <&vcc5v0_sys>;
168 vcc2-supply = <&vcc5v0_sys>;
169 vcc3-supply = <&vcc5v0_sys>;
170 vcc4-supply = <&vcc5v0_sys>;
171 vcc5-supply = <&vcc5v0_sys>;
172 vcc6-supply = <&vcc5v0_sys>;
173 vcc7-supply = <&vcc5v0_sys>;
174 vcc8-supply = <&vcc5v0_sys>;
175 vcc9-supply = <&vcc5v0_sys>;
176 vcc10-supply = <&vcc5v0_sys>;
177 vcc11-supply = <&vcc_2v0_pldo_s3>;
178 vcc12-supply = <&vcc5v0_sys>;
179 vcc13-supply = <&vcc_1v1_nldo_s3>;
180 vcc14-supply = <&vcc_1v1_nldo_s3>;
181 vcca-supply = <&vcc5v0_sys>;
182
183 gpio-controller;
184 #gpio-cells = <2>;
185
186 rk806_dvs1_null: dvs1-null-pins {
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]187 pins = "gpio_pwrctrl1";
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]188 function = "pin_fun0";
189 };
190
191 rk806_dvs2_null: dvs2-null-pins {
192 pins = "gpio_pwrctrl2";
193 function = "pin_fun0";
194 };
195
196 rk806_dvs3_null: dvs3-null-pins {
197 pins = "gpio_pwrctrl3";
198 function = "pin_fun0";
199 };
200
201 regulators {
202 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
203 regulator-name = "vdd_gpu_s0";
204 regulator-boot-on;
205 regulator-min-microvolt = <550000>;
206 regulator-max-microvolt = <950000>;
207 regulator-ramp-delay = <12500>;
208 regulator-enable-ramp-delay = <400>;
209
210 regulator-state-mem {
211 regulator-off-in-suspend;
212 };
213 };
214
215 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
216 regulator-name = "vdd_cpu_lit_s0";
217 regulator-always-on;
218 regulator-boot-on;
219 regulator-min-microvolt = <550000>;
220 regulator-max-microvolt = <950000>;
221 regulator-ramp-delay = <12500>;
222
223 regulator-state-mem {
224 regulator-off-in-suspend;
225 };
226 };
227
228 vdd_log_s0: dcdc-reg3 {
229 regulator-name = "vdd_log_s0";
230 regulator-always-on;
231 regulator-boot-on;
232 regulator-min-microvolt = <675000>;
233 regulator-max-microvolt = <750000>;
234 regulator-ramp-delay = <12500>;
235
236 regulator-state-mem {
237 regulator-off-in-suspend;
238 regulator-suspend-microvolt = <750000>;
239 };
240 };
241
242 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
243 regulator-name = "vdd_vdenc_s0";
244 regulator-always-on;
245 regulator-boot-on;
246 regulator-min-microvolt = <550000>;
247 regulator-max-microvolt = <950000>;
248 regulator-ramp-delay = <12500>;
249
250 regulator-state-mem {
251 regulator-off-in-suspend;
252 };
253 };
254
255 vdd_ddr_s0: dcdc-reg5 {
256 regulator-name = "vdd_ddr_s0";
257 regulator-always-on;
258 regulator-boot-on;
259 regulator-min-microvolt = <675000>;
260 regulator-max-microvolt = <900000>;
261 regulator-ramp-delay = <12500>;
262
263 regulator-state-mem {
264 regulator-off-in-suspend;
265 regulator-suspend-microvolt = <850000>;
266 };
267 };
268
269 vdd2_ddr_s3: dcdc-reg6 {
270 regulator-name = "vdd2_ddr_s3";
271 regulator-always-on;
272 regulator-boot-on;
273
274 regulator-state-mem {
275 regulator-on-in-suspend;
276 };
277 };
278
279 vcc_2v0_pldo_s3: dcdc-reg7 {
280 regulator-name = "vdd_2v0_pldo_s3";
281 regulator-always-on;
282 regulator-boot-on;
283 regulator-min-microvolt = <2000000>;
284 regulator-max-microvolt = <2000000>;
285 regulator-ramp-delay = <12500>;
286
287 regulator-state-mem {
288 regulator-on-in-suspend;
289 regulator-suspend-microvolt = <2000000>;
290 };
291 };
292
293 vcc_3v3_s3: dcdc-reg8 {
294 regulator-name = "vcc_3v3_s3";
295 regulator-always-on;
296 regulator-boot-on;
297 regulator-min-microvolt = <3300000>;
298 regulator-max-microvolt = <3300000>;
299
300 regulator-state-mem {
301 regulator-on-in-suspend;
302 regulator-suspend-microvolt = <3300000>;
303 };
304 };
305
306 vddq_ddr_s0: dcdc-reg9 {
307 regulator-name = "vddq_ddr_s0";
308 regulator-always-on;
309 regulator-boot-on;
310
311 regulator-state-mem {
312 regulator-off-in-suspend;
313 };
314 };
315
316 vcc_1v8_s3: dcdc-reg10 {
317 regulator-name = "vcc_1v8_s3";
318 regulator-always-on;
319 regulator-boot-on;
320 regulator-min-microvolt = <1800000>;
321 regulator-max-microvolt = <1800000>;
322
323 regulator-state-mem {
324 regulator-on-in-suspend;
325 regulator-suspend-microvolt = <1800000>;
326 };
327 };
328
329 avcc_1v8_s0: pldo-reg1 {
330 regulator-name = "avcc_1v8_s0";
331 regulator-always-on;
332 regulator-boot-on;
333 regulator-min-microvolt = <1800000>;
334 regulator-max-microvolt = <1800000>;
335
336 regulator-state-mem {
337 regulator-off-in-suspend;
338 };
339 };
340
341 vcc_1v8_s0: pldo-reg2 {
342 regulator-name = "vcc_1v8_s0";
343 regulator-always-on;
344 regulator-boot-on;
345 regulator-min-microvolt = <1800000>;
346 regulator-max-microvolt = <1800000>;
347
348 regulator-state-mem {
349 regulator-off-in-suspend;
350 regulator-suspend-microvolt = <1800000>;
351 };
352 };
353
354 avdd_1v2_s0: pldo-reg3 {
355 regulator-name = "avdd_1v2_s0";
356 regulator-always-on;
357 regulator-boot-on;
358 regulator-min-microvolt = <1200000>;
359 regulator-max-microvolt = <1200000>;
360
361 regulator-state-mem {
362 regulator-off-in-suspend;
363 };
364 };
365
366 vcc_3v3_s0: pldo-reg4 {
367 regulator-name = "vcc_3v3_s0";
368 regulator-always-on;
369 regulator-boot-on;
370 regulator-min-microvolt = <3300000>;
371 regulator-max-microvolt = <3300000>;
372 regulator-ramp-delay = <12500>;
373
374 regulator-state-mem {
375 regulator-off-in-suspend;
376 };
377 };
378
379 vccio_sd_s0: pldo-reg5 {
380 regulator-name = "vccio_sd_s0";
381 regulator-always-on;
382 regulator-boot-on;
383 regulator-min-microvolt = <1800000>;
384 regulator-max-microvolt = <3300000>;
385 regulator-ramp-delay = <12500>;
386
387 regulator-state-mem {
388 regulator-off-in-suspend;
389 };
390 };
391
392 pldo6_s3: pldo-reg6 {
393 regulator-name = "pldo6_s3";
394 regulator-always-on;
395 regulator-boot-on;
396 regulator-min-microvolt = <1800000>;
397 regulator-max-microvolt = <1800000>;
398
399 regulator-state-mem {
400 regulator-on-in-suspend;
401 regulator-suspend-microvolt = <1800000>;
402 };
403 };
404
405 vdd_0v75_s3: nldo-reg1 {
406 regulator-name = "vdd_0v75_s3";
407 regulator-always-on;
408 regulator-boot-on;
409 regulator-min-microvolt = <750000>;
410 regulator-max-microvolt = <750000>;
411
412 regulator-state-mem {
413 regulator-on-in-suspend;
414 regulator-suspend-microvolt = <750000>;
415 };
416 };
417
418 vdd_ddr_pll_s0: nldo-reg2 {
419 regulator-name = "vdd_ddr_pll_s0";
420 regulator-always-on;
421 regulator-boot-on;
422 regulator-min-microvolt = <850000>;
423 regulator-max-microvolt = <850000>;
424
425 regulator-state-mem {
426 regulator-off-in-suspend;
427 regulator-suspend-microvolt = <850000>;
428 };
429 };
430
431 avdd_0v75_s0: nldo-reg3 {
432 regulator-name = "avdd_0v75_s0";
433 regulator-always-on;
434 regulator-boot-on;
435 regulator-min-microvolt = <750000>;
436 regulator-max-microvolt = <750000>;
437
438 regulator-state-mem {
439 regulator-off-in-suspend;
440 };
441 };
442
443 vdd_0v85_s0: nldo-reg4 {
444 regulator-name = "vdd_0v85_s0";
445 regulator-always-on;
446 regulator-boot-on;
447 regulator-min-microvolt = <850000>;
448 regulator-max-microvolt = <850000>;
449
450 regulator-state-mem {
451 regulator-off-in-suspend;
452 };
453 };
454
455 vdd_0v75_s0: nldo-reg5 {
456 regulator-name = "vdd_0v75_s0";
457 regulator-always-on;
458 regulator-boot-on;
459 regulator-min-microvolt = <750000>;
460 regulator-max-microvolt = <750000>;
461
462 regulator-state-mem {
463 regulator-off-in-suspend;
464 };
465 };
466 };
467 };
468};