| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Hardkernel Odroid XU3 audio subsystem device tree source |
| 4 | * |
| 5 | * Copyright (c) 2015 Krzysztof Kozlowski |
| 6 | * Copyright (c) 2014 Collabora Ltd. |
| 7 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| 8 | * http://www.samsung.com |
| 9 | */ |
| 10 | |
| 11 | #include <dt-bindings/sound/samsung-i2s.h> |
| 12 | |
| 13 | / { |
| 14 | sound: sound { |
| 15 | compatible = "samsung,odroid-xu3-audio"; |
| 16 | model = "Odroid-XU3"; |
| 17 | |
| 18 | samsung,audio-widgets = |
| 19 | "Headphone", "Headphone Jack", |
| 20 | "Speakers", "Speakers"; |
| 21 | audio-routing = "Headphone Jack", "HPL", |
| 22 | "Headphone Jack", "HPR", |
| 23 | "Headphone Jack", "MICBIAS", |
| 24 | "IN12", "Headphone Jack", |
| 25 | "Speakers", "SPKL", |
| 26 | "Speakers", "SPKR", |
| 27 | "I2S Playback", "Mixer DAI TX", |
| 28 | "HiFi Playback", "Mixer DAI TX", |
| 29 | "Mixer DAI RX", "HiFi Capture"; |
| 30 | |
| 31 | cpu { |
| 32 | sound-dai = <&i2s0 0>, <&i2s0 1>; |
| 33 | }; |
| 34 | codec { |
| 35 | sound-dai = <&hdmi>, <&max98090>; |
| 36 | }; |
| 37 | }; |
| 38 | }; |
| 39 | |
| 40 | &hsi2c_5 { |
| 41 | status = "okay"; |
| 42 | max98090: audio-codec@10 { |
| 43 | compatible = "maxim,max98090"; |
| 44 | reg = <0x10>; |
| 45 | interrupt-parent = <&gpx3>; |
| 46 | interrupts = <2 IRQ_TYPE_NONE>; |
| 47 | clocks = <&i2s0 CLK_I2S_CDCLK>; |
| 48 | clock-names = "mclk"; |
| 49 | #sound-dai-cells = <0>; |
| 50 | }; |
| 51 | }; |
| 52 | |
| 53 | &i2s0 { |
| 54 | status = "okay"; |
| 55 | assigned-clocks = <&clock CLK_MOUT_EPLL>, |
| 56 | <&clock CLK_MOUT_MAU_EPLL>, |
| 57 | <&clock CLK_MOUT_USER_MAU_EPLL>, |
| 58 | <&clock_audss EXYNOS_MOUT_AUDSS>, |
| 59 | <&clock_audss EXYNOS_MOUT_I2S>, |
| 60 | <&i2s0 CLK_I2S_RCLK_SRC>, |
| 61 | <&clock_audss EXYNOS_DOUT_SRP>, |
| 62 | <&clock_audss EXYNOS_DOUT_AUD_BUS>, |
| 63 | <&clock_audss EXYNOS_DOUT_I2S>; |
| 64 | |
| 65 | assigned-clock-parents = <&clock CLK_FOUT_EPLL>, |
| 66 | <&clock CLK_MOUT_EPLL>, |
| 67 | <&clock CLK_MOUT_MAU_EPLL>, |
| 68 | <&clock CLK_MAU_EPLL>, |
| 69 | <&clock_audss EXYNOS_MOUT_AUDSS>, |
| 70 | <&clock_audss EXYNOS_SCLK_I2S>; |
| 71 | |
| 72 | assigned-clock-rates = <0>, |
| 73 | <0>, |
| 74 | <0>, |
| 75 | <0>, |
| 76 | <0>, |
| 77 | <0>, |
| 78 | <196608001>, |
| 79 | <(196608002 / 2)>, |
| 80 | <196608000>; |
| 81 | |
| 82 | }; |