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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale(NXP) IMX8/9 DDR performance monitor
8
9maintainers:
10 - Frank Li <frank.li@nxp.com>
11
12properties:
13 compatible:
14 oneOf:
15 - enum:
16 - fsl,imx8-ddr-pmu
17 - fsl,imx8m-ddr-pmu
18 - fsl,imx8mq-ddr-pmu
19 - fsl,imx8mm-ddr-pmu
20 - fsl,imx8mn-ddr-pmu
21 - fsl,imx8mp-ddr-pmu
22 - fsl,imx93-ddr-pmu
23 - items:
24 - enum:
25 - fsl,imx8mm-ddr-pmu
26 - fsl,imx8mn-ddr-pmu
27 - fsl,imx8mq-ddr-pmu
28 - fsl,imx8mp-ddr-pmu
29 - const: fsl,imx8m-ddr-pmu
Tom Rini93743d22024-04-01 09:08:13 -040030 - items:
31 - const: fsl,imx8dxl-ddr-pmu
32 - const: fsl,imx8-ddr-pmu
Tom Rini53633a82024-02-29 12:33:36 -050033
34 reg:
35 maxItems: 1
36
37 interrupts:
38 maxItems: 1
39
40required:
41 - compatible
42 - reg
43 - interrupts
44
45additionalProperties: false
46
47examples:
48 - |
49 #include <dt-bindings/interrupt-controller/arm-gic.h>
50
51 ddr-pmu@5c020000 {
52 compatible = "fsl,imx8-ddr-pmu";
53 reg = <0x5c020000 0x10000>;
54 interrupt-parent = <&gic>;
55 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
56 };