Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | Marvell Orion/Discovery ethernet controller |
| 2 | ============================================= |
| 3 | |
| 4 | The Marvell Discovery ethernet controller can be found on Marvell Orion SoCs |
| 5 | (Kirkwood, Dove, Orion5x, and Discovery Innovation) and as part of Marvell |
| 6 | Discovery system controller chips (mv64[345]60). |
| 7 | |
| 8 | The Discovery ethernet controller is described with two levels of nodes. The |
| 9 | first level describes the ethernet controller itself and the second level |
| 10 | describes up to 3 ethernet port nodes within that controller. The reason for |
| 11 | the multiple levels is that the port registers are interleaved within a single |
| 12 | set of controller registers. Each port node describes port-specific properties. |
| 13 | |
| 14 | Note: The above separation is only true for Discovery system controllers. |
| 15 | For Orion SoCs we stick to the separation, although there each controller has |
| 16 | only one port associated. Multiple ports are implemented as multiple single-port |
| 17 | controllers. As Kirkwood has some issues with proper initialization after reset, |
| 18 | an extra compatible string is added for it. |
| 19 | |
| 20 | * Ethernet controller node |
| 21 | |
| 22 | Required controller properties: |
| 23 | - #address-cells: shall be 1. |
| 24 | - #size-cells: shall be 0. |
| 25 | - compatible: shall be one of "marvell,orion-eth", "marvell,kirkwood-eth". |
| 26 | - reg: address and length of the controller registers. |
| 27 | |
| 28 | Optional controller properties: |
| 29 | - clocks: phandle reference to the controller clock. |
| 30 | - marvell,tx-checksum-limit: max tx packet size for hardware checksum. |
| 31 | |
| 32 | * Ethernet port node |
| 33 | |
| 34 | Required port properties: |
| 35 | - compatible: shall be one of "marvell,orion-eth-port", |
| 36 | "marvell,kirkwood-eth-port". |
| 37 | - reg: port number relative to ethernet controller, shall be 0, 1, or 2. |
| 38 | - interrupts: port interrupt. |
| 39 | - local-mac-address: See ethernet.txt file in the same directory. |
| 40 | |
| 41 | Optional port properties: |
| 42 | - marvell,tx-queue-size: size of the transmit ring buffer. |
| 43 | - marvell,tx-sram-addr: address of transmit descriptor buffer located in SRAM. |
| 44 | - marvell,tx-sram-size: size of transmit descriptor buffer located in SRAM. |
| 45 | - marvell,rx-queue-size: size of the receive ring buffer. |
| 46 | - marvell,rx-sram-addr: address of receive descriptor buffer located in SRAM. |
| 47 | - marvell,rx-sram-size: size of receive descriptor buffer located in SRAM. |
| 48 | |
| 49 | and |
| 50 | |
| 51 | - phy-handle: See ethernet.txt file in the same directory. |
| 52 | - phy-mode: See ethernet.txt file in the same directory. |
| 53 | |
| 54 | or |
| 55 | |
| 56 | - speed: port speed if no PHY connected. |
| 57 | - duplex: port mode if no PHY connected. |
| 58 | |
| 59 | * Node example: |
| 60 | |
| 61 | mdio-bus { |
| 62 | ... |
| 63 | ethphy: ethernet-phy@8 { |
| 64 | ... |
| 65 | }; |
| 66 | }; |
| 67 | |
| 68 | eth: ethernet-controller@72000 { |
| 69 | compatible = "marvell,orion-eth"; |
| 70 | #address-cells = <1>; |
| 71 | #size-cells = <0>; |
| 72 | reg = <0x72000 0x2000>; |
| 73 | clocks = <&gate_clk 2>; |
| 74 | marvell,tx-checksum-limit = <1600>; |
| 75 | |
| 76 | ethernet@0 { |
| 77 | compatible = "marvell,orion-eth-port"; |
| 78 | reg = <0>; |
| 79 | interrupts = <29>; |
| 80 | phy-handle = <ðphy>; |
| 81 | local-mac-address = [00 00 00 00 00 00]; |
| 82 | }; |
| 83 | }; |