Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | Vitesse VSC73xx Switches |
| 2 | ======================== |
| 3 | |
| 4 | This defines device tree bindings for the Vitesse VSC73xx switch chips. |
| 5 | The Vitesse company has been acquired by Microsemi and Microsemi has |
| 6 | been acquired Microchip but retains this vendor branding. |
| 7 | |
| 8 | The currently supported switch chips are: |
| 9 | Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch |
| 10 | Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch |
| 11 | Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch |
| 12 | Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch |
| 13 | |
| 14 | This switch could have two different management interface. |
| 15 | |
| 16 | If SPI interface is used, the device tree node is an SPI device so it must |
| 17 | reside inside a SPI bus device tree node, see spi/spi-bus.txt |
| 18 | |
| 19 | When the chip is connected to a parallel memory bus and work in memory-mapped |
| 20 | I/O mode, a platform device is used to represent the vsc73xx. In this case it |
| 21 | must reside inside a platform bus device tree node. |
| 22 | |
| 23 | Required properties: |
| 24 | |
| 25 | - compatible: must be exactly one of: |
| 26 | "vitesse,vsc7385" |
| 27 | "vitesse,vsc7388" |
| 28 | "vitesse,vsc7395" |
| 29 | "vitesse,vsc7398" |
| 30 | - gpio-controller: indicates that this switch is also a GPIO controller, |
| 31 | see gpio/gpio.txt |
| 32 | - #gpio-cells: this must be set to <2> and indicates that we are a twocell |
| 33 | GPIO controller, see gpio/gpio.txt |
| 34 | |
| 35 | Optional properties: |
| 36 | |
| 37 | - reset-gpios: a handle to a GPIO line that can issue reset of the chip. |
| 38 | It should be tagged as active low. |
| 39 | |
| 40 | Required subnodes: |
| 41 | |
| 42 | See net/dsa/dsa.txt for a list of additional required and optional properties |
| 43 | and subnodes of DSA switches. |
| 44 | |
| 45 | Examples: |
| 46 | |
| 47 | SPI: |
| 48 | switch@0 { |
| 49 | compatible = "vitesse,vsc7395"; |
| 50 | reg = <0>; |
| 51 | /* Specified for 2.5 MHz or below */ |
| 52 | spi-max-frequency = <2500000>; |
| 53 | gpio-controller; |
| 54 | #gpio-cells = <2>; |
| 55 | |
| 56 | ports { |
| 57 | #address-cells = <1>; |
| 58 | #size-cells = <0>; |
| 59 | |
| 60 | port@0 { |
| 61 | reg = <0>; |
| 62 | label = "lan1"; |
| 63 | }; |
| 64 | port@1 { |
| 65 | reg = <1>; |
| 66 | label = "lan2"; |
| 67 | }; |
| 68 | port@2 { |
| 69 | reg = <2>; |
| 70 | label = "lan3"; |
| 71 | }; |
| 72 | port@3 { |
| 73 | reg = <3>; |
| 74 | label = "lan4"; |
| 75 | }; |
| 76 | vsc: port@6 { |
| 77 | reg = <6>; |
| 78 | ethernet = <&gmac1>; |
| 79 | phy-mode = "rgmii"; |
| 80 | fixed-link { |
| 81 | speed = <1000>; |
| 82 | full-duplex; |
| 83 | pause; |
| 84 | }; |
| 85 | }; |
| 86 | }; |
| 87 | }; |
| 88 | |
| 89 | Platform: |
| 90 | switch@2,0 { |
| 91 | #address-cells = <1>; |
| 92 | #size-cells = <1>; |
| 93 | compatible = "vitesse,vsc7385"; |
| 94 | reg = <0x2 0x0 0x20000>; |
| 95 | reset-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; |
| 96 | |
| 97 | ports { |
| 98 | #address-cells = <1>; |
| 99 | #size-cells = <0>; |
| 100 | |
| 101 | port@0 { |
| 102 | reg = <0>; |
| 103 | label = "lan1"; |
| 104 | }; |
| 105 | port@1 { |
| 106 | reg = <1>; |
| 107 | label = "lan2"; |
| 108 | }; |
| 109 | port@2 { |
| 110 | reg = <2>; |
| 111 | label = "lan3"; |
| 112 | }; |
| 113 | port@3 { |
| 114 | reg = <3>; |
| 115 | label = "lan4"; |
| 116 | }; |
| 117 | vsc: port@6 { |
| 118 | reg = <6>; |
| 119 | ethernet = <&enet0>; |
| 120 | phy-mode = "rgmii"; |
| 121 | fixed-link { |
| 122 | speed = <1000>; |
| 123 | full-duplex; |
| 124 | pause; |
| 125 | }; |
| 126 | }; |
| 127 | }; |
| 128 | |
| 129 | }; |