| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/misc/xlnx,tmr-manager.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Xilinx Triple Modular Redundancy(TMR) Manager IP |
| 8 | |
| 9 | maintainers: |
| 10 | - Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com> |
| 11 | |
| 12 | description: | |
| 13 | The Triple Modular Redundancy(TMR) Manager is responsible for handling the |
| 14 | TMR subsystem state, including fault detection and error recovery. The core |
| 15 | is triplicated in each of the sub-blocks in the TMR subsystem, and provides |
| 16 | majority voting of its internal state. |
| 17 | |
| 18 | properties: |
| 19 | compatible: |
| 20 | enum: |
| 21 | - xlnx,tmr-manager-1.0 |
| 22 | |
| 23 | reg: |
| 24 | maxItems: 1 |
| 25 | |
| 26 | xlnx,magic1: |
| 27 | minimum: 0 |
| 28 | maximum: 255 |
| 29 | description: |
| 30 | Magic byte 1, When configured it allows the controller to perform |
| 31 | recovery. |
| 32 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 33 | |
| 34 | required: |
| 35 | - compatible |
| 36 | - reg |
| 37 | - xlnx,magic1 |
| 38 | |
| 39 | additionalProperties: false |
| 40 | |
| 41 | examples: |
| 42 | - | |
| 43 | tmr-manager@44a10000 { |
| 44 | compatible = "xlnx,tmr-manager-1.0"; |
| 45 | reg = <0x44a10000 0x10000>; |
| 46 | xlnx,magic1 = <0x46>; |
| 47 | }; |