| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/iio/adc/sprd,sc2720-adc.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Spreadtrum SC27XX series PMICs ADC |
| 8 | |
| 9 | maintainers: |
| 10 | - Baolin Wang <baolin.wang7@gmail.com> |
| 11 | |
| 12 | description: |
| 13 | Supports the ADC found on these PMICs. |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | enum: |
| 18 | - sprd,sc2720-adc |
| 19 | - sprd,sc2721-adc |
| 20 | - sprd,sc2723-adc |
| 21 | - sprd,sc2730-adc |
| 22 | - sprd,sc2731-adc |
| 23 | - sprd,ump9620-adc |
| 24 | |
| 25 | reg: |
| 26 | maxItems: 1 |
| 27 | |
| 28 | interrupts: |
| 29 | maxItems: 1 |
| 30 | |
| 31 | "#io-channel-cells": |
| 32 | const: 1 |
| 33 | |
| 34 | hwlocks: |
| 35 | maxItems: 1 |
| 36 | |
| 37 | nvmem-cells: true |
| 38 | |
| 39 | nvmem-cell-names: true |
| 40 | |
| 41 | allOf: |
| 42 | - if: |
| 43 | not: |
| 44 | properties: |
| 45 | compatible: |
| 46 | contains: |
| 47 | enum: |
| 48 | - sprd,ump9620-adc |
| 49 | then: |
| 50 | properties: |
| 51 | nvmem-cells: |
| 52 | maxItems: 2 |
| 53 | nvmem-cell-names: |
| 54 | items: |
| 55 | - const: big_scale_calib |
| 56 | - const: small_scale_calib |
| 57 | |
| 58 | else: |
| 59 | properties: |
| 60 | nvmem-cells: |
| 61 | maxItems: 6 |
| 62 | nvmem-cell-names: |
| 63 | items: |
| 64 | - const: big_scale_calib1 |
| 65 | - const: big_scale_calib2 |
| 66 | - const: small_scale_calib1 |
| 67 | - const: small_scale_calib2 |
| 68 | - const: vbat_det_cal1 |
| 69 | - const: vbat_det_cal2 |
| 70 | |
| 71 | required: |
| 72 | - compatible |
| 73 | - reg |
| 74 | - interrupts |
| 75 | - "#io-channel-cells" |
| 76 | - hwlocks |
| 77 | - nvmem-cells |
| 78 | - nvmem-cell-names |
| 79 | |
| 80 | additionalProperties: false |
| 81 | |
| 82 | examples: |
| 83 | - | |
| 84 | #include <dt-bindings/interrupt-controller/irq.h> |
| 85 | pmic { |
| 86 | #address-cells = <1>; |
| 87 | #size-cells = <0>; |
| 88 | adc@480 { |
| 89 | compatible = "sprd,sc2731-adc"; |
| 90 | reg = <0x480>; |
| 91 | interrupt-parent = <&sc2731_pmic>; |
| 92 | interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; |
| 93 | #io-channel-cells = <1>; |
| 94 | hwlocks = <&hwlock 4>; |
| 95 | nvmem-cells = <&adc_big_scale>, <&adc_small_scale>; |
| 96 | nvmem-cell-names = "big_scale_calib", "small_scale_calib"; |
| 97 | }; |
| 98 | }; |
| 99 | |
| 100 | - | |
| 101 | #include <dt-bindings/interrupt-controller/irq.h> |
| 102 | pmic { |
| 103 | #address-cells = <1>; |
| 104 | #size-cells = <0>; |
| 105 | adc@504 { |
| 106 | compatible = "sprd,ump9620-adc"; |
| 107 | reg = <0x504>; |
| 108 | interrupt-parent = <&ump9620_pmic>; |
| 109 | interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; |
| 110 | #io-channel-cells = <1>; |
| 111 | hwlocks = <&hwlock 4>; |
| 112 | nvmem-cells = <&adc_bcal1>, <&adc_bcal2>, |
| 113 | <&adc_scal1>, <&adc_scal2>, |
| 114 | <&vbat_det_cal1>, <&vbat_det_cal2>; |
| 115 | nvmem-cell-names = "big_scale_calib1", "big_scale_calib2", |
| 116 | "small_scale_calib1", "small_scale_calib2", |
| 117 | "vbat_det_cal1", "vbat_det_cal2"; |
| 118 | }; |
| 119 | }; |
| 120 | ... |