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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/microchip,sparx5.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip Sparx5 Boards
8
9maintainers:
10 - Lars Povlsen <lars.povlsen@microchip.com>
11
12description: |+
13 The Microchip Sparx5 SoC is a ARMv8-based used in a family of
14 gigabit TSN-capable gigabit switches.
15
16 The SparX-5 Ethernet switch family provides a rich set of switching
17 features such as advanced TCAM-based VLAN and QoS processing
18 enabling delivery of differentiated services, and security through
19 TCAM-based frame processing using versatile content aware processor
20 (VCAP)
21
22properties:
23 $nodename:
24 const: '/'
25 compatible:
26 oneOf:
27 - description: The Sparx5 pcb125 board is a modular board,
28 which has both spi-nor and eMMC storage. The modular design
29 allows for connection of different network ports.
30 items:
31 - const: microchip,sparx5-pcb125
32 - const: microchip,sparx5
33
34 - description: The Sparx5 pcb134 is a pizzabox form factor
35 gigabit switch with 20 SFP ports. It features spi-nor and
36 either spi-nand or eMMC storage (mount option).
37 items:
38 - const: microchip,sparx5-pcb134
39 - const: microchip,sparx5
40
41 - description: The Sparx5 pcb135 is a pizzabox form factor
42 gigabit switch with 48+4 Cu ports. It features spi-nor and
43 either spi-nand or eMMC storage (mount option).
44 items:
45 - const: microchip,sparx5-pcb135
46 - const: microchip,sparx5
47
48 axi@600000000:
49 type: object
50 description: the root node in the Sparx5 platforms must contain
51 an axi bus child node. They are always at physical address
52 0x600000000 in all the Sparx5 variants.
53 properties:
54 compatible:
55 items:
56 - const: simple-bus
57
58 required:
59 - compatible
60
61required:
62 - compatible
63 - axi@600000000
64
65additionalProperties: true
66
67...