| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Temperature Sensor ADC (TSADC) on Rockchip SoCs |
| 8 | |
| 9 | maintainers: |
| 10 | - Heiko Stuebner <heiko@sntech.de> |
| 11 | |
| Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 12 | $ref: thermal-sensor.yaml# |
| 13 | |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 14 | properties: |
| 15 | compatible: |
| 16 | enum: |
| 17 | - rockchip,px30-tsadc |
| 18 | - rockchip,rk3228-tsadc |
| 19 | - rockchip,rk3288-tsadc |
| 20 | - rockchip,rk3328-tsadc |
| 21 | - rockchip,rk3368-tsadc |
| 22 | - rockchip,rk3399-tsadc |
| 23 | - rockchip,rk3568-tsadc |
| 24 | - rockchip,rk3588-tsadc |
| 25 | - rockchip,rv1108-tsadc |
| 26 | |
| 27 | reg: |
| 28 | maxItems: 1 |
| 29 | |
| 30 | interrupts: |
| 31 | maxItems: 1 |
| 32 | |
| 33 | clocks: |
| 34 | minItems: 2 |
| 35 | maxItems: 2 |
| 36 | |
| 37 | clock-names: |
| 38 | items: |
| 39 | - const: tsadc |
| 40 | - const: apb_pclk |
| 41 | |
| 42 | resets: |
| 43 | minItems: 1 |
| 44 | maxItems: 3 |
| 45 | |
| 46 | reset-names: |
| 47 | minItems: 1 |
| 48 | items: |
| 49 | - const: tsadc-apb |
| 50 | - const: tsadc |
| 51 | - const: tsadc-phy |
| 52 | |
| 53 | "#thermal-sensor-cells": |
| 54 | const: 1 |
| 55 | |
| 56 | rockchip,grf: |
| 57 | description: The phandle of the syscon node for the general register file. |
| 58 | $ref: /schemas/types.yaml#/definitions/phandle |
| 59 | |
| 60 | rockchip,hw-tshut-temp: |
| 61 | description: The hardware-controlled shutdown temperature value. |
| 62 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 63 | |
| 64 | rockchip,hw-tshut-mode: |
| 65 | description: The hardware-controlled shutdown mode 0:CRU 1:GPIO. |
| 66 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 67 | enum: [0, 1] |
| 68 | |
| 69 | rockchip,hw-tshut-polarity: |
| 70 | description: The hardware-controlled active polarity 0:LOW 1:HIGH. |
| 71 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 72 | enum: [0, 1] |
| 73 | |
| 74 | required: |
| 75 | - compatible |
| 76 | - reg |
| 77 | - interrupts |
| 78 | - clocks |
| 79 | - clock-names |
| 80 | - resets |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 81 | |
| Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 82 | unevaluatedProperties: false |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 83 | |
| 84 | examples: |
| 85 | - | |
| 86 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 87 | #include <dt-bindings/clock/rk3288-cru.h> |
| 88 | |
| 89 | tsadc: tsadc@ff280000 { |
| 90 | compatible = "rockchip,rk3288-tsadc"; |
| 91 | reg = <0xff280000 0x100>; |
| 92 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; |
| 93 | clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; |
| 94 | clock-names = "tsadc", "apb_pclk"; |
| 95 | resets = <&cru SRST_TSADC>; |
| 96 | reset-names = "tsadc-apb"; |
| 97 | #thermal-sensor-cells = <1>; |
| 98 | rockchip,hw-tshut-temp = <95000>; |
| 99 | rockchip,hw-tshut-mode = <0>; |
| 100 | rockchip,hw-tshut-polarity = <0>; |
| 101 | }; |