Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2011-2012 |
Pali Rohár | 10a953d | 2020-04-01 00:35:08 +0200 | [diff] [blame] | 4 | * Pali Rohár <pali@kernel.org> |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 5 | * |
| 6 | * (C) Copyright 2010 |
| 7 | * Alistair Buxton <a.j.buxton@gmail.com> |
| 8 | * |
| 9 | * Derived from Beagle Board code: |
| 10 | * (C) Copyright 2006-2008 |
| 11 | * Texas Instruments. |
| 12 | * Richard Woodruff <r-woodruff2@ti.com> |
| 13 | * Syed Mohammed Khasim <x0khasim@ti.com> |
| 14 | * |
| 15 | * Configuration settings for the Nokia RX-51 aka N900. |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #ifndef __CONFIG_H |
| 19 | #define __CONFIG_H |
| 20 | |
| 21 | /* |
| 22 | * High Level Configuration Options |
| 23 | */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 24 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 25 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
Nishanth Menon | fa96c96 | 2015-03-09 17:12:04 -0500 | [diff] [blame] | 26 | #include <asm/arch/omap.h> |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 27 | #include <asm/arch/mem.h> |
| 28 | #include <linux/stringify.h> |
| 29 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 30 | /* Clock Defines */ |
| 31 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 32 | #define V_SCLK (V_OSCK >> 1) |
| 33 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 34 | #define CONFIG_UBI_SIZE (512 << 10) |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 35 | |
| 36 | /* |
| 37 | * Hardware drivers |
| 38 | */ |
| 39 | |
| 40 | /* |
| 41 | * NS16550 Configuration |
| 42 | */ |
| 43 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 44 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 45 | #define CONFIG_SYS_NS16550_SERIAL |
| 46 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 47 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
| 48 | |
| 49 | /* |
| 50 | * select serial console configuration |
| 51 | */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 52 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 53 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 54 | #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 55 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 56 | /* USB device configuration */ |
| 57 | #define CONFIG_USB_DEVICE |
Pali Rohár | bba0bba | 2021-02-20 11:50:15 +0100 | [diff] [blame] | 58 | #define CONFIG_USB_TTY |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 59 | #define CONFIG_USBD_VENDORID 0x0421 |
Pali Rohár | bba0bba | 2021-02-20 11:50:15 +0100 | [diff] [blame] | 60 | #define CONFIG_USBD_PRODUCTID_CDCACM 0x01c8 |
| 61 | #define CONFIG_USBD_PRODUCTID_GSERIAL 0x01c8 |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 62 | #define CONFIG_USBD_MANUFACTURER "Nokia" |
Pali Rohár | bba0bba | 2021-02-20 11:50:15 +0100 | [diff] [blame] | 63 | #define CONFIG_USBD_PRODUCT_NAME "N900 (U-Boot)" |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 64 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 65 | #define GPIO_SLIDE 71 |
| 66 | |
| 67 | /* |
| 68 | * Board ONENAND Info. |
| 69 | */ |
| 70 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 71 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 72 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 73 | /* Environment information */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 74 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 75 | "usbtty=cdc_acm\0" \ |
Pali Rohár | 54a3014 | 2022-02-03 19:38:50 +0100 | [diff] [blame] | 76 | "stdin=usbtty,serial,keyboard\0" \ |
Pali Rohár | 1d701a5 | 2022-03-09 20:46:01 +0100 | [diff] [blame] | 77 | "stdout=usbtty,serial,vidconsole\0" \ |
| 78 | "stderr=usbtty,serial,vidconsole\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 79 | "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \ |
| 80 | "switchmmc=mmc dev ${mmcnum}\0" \ |
| 81 | "kernaddr=0x82008000\0" \ |
| 82 | "initrdaddr=0x84008000\0" \ |
| 83 | "scriptaddr=0x86008000\0" \ |
| 84 | "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \ |
| 85 | "${loadaddr} ${mmcfile}\0" \ |
| 86 | "kernload=setenv loadaddr ${kernaddr};" \ |
| 87 | "setenv mmcfile ${mmckernfile};" \ |
| 88 | "run fileload\0" \ |
| 89 | "initrdload=setenv loadaddr ${initrdaddr};" \ |
| 90 | "setenv mmcfile ${mmcinitrdfile};" \ |
| 91 | "run fileload\0" \ |
| 92 | "scriptload=setenv loadaddr ${scriptaddr};" \ |
| 93 | "setenv mmcfile ${mmcscriptfile};" \ |
| 94 | "run fileload\0" \ |
| 95 | "scriptboot=echo Running ${mmcscriptfile} from mmc " \ |
| 96 | "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \ |
| 97 | "kernboot=echo Booting ${mmckernfile} from mmc " \ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 98 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} || " \ |
| 99 | "bootz ${kernaddr}\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 100 | "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 101 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr} || " \ |
| 102 | "bootz ${kernaddr} ${initrdaddr}\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 103 | "attachboot=echo Booting attached kernel image ...;" \ |
| 104 | "setenv setup_omap_atag 1;" \ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 105 | "bootm ${attkernaddr} || bootz ${attkernaddr};" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 106 | "setenv setup_omap_atag\0" \ |
Pali Rohár | 5e0f513 | 2021-06-18 15:27:04 +0200 | [diff] [blame] | 107 | "trymmcscriptboot=run switchmmc && run scriptload && run scriptboot\0" \ |
| 108 | "trymmckernboot=run switchmmc && run kernload && run kernboot\0" \ |
| 109 | "trymmckerninitrdboot=run switchmmc && run initrdload && " \ |
| 110 | "run kernload && run kerninitrdboot\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 111 | "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 112 | "setenv mmckernfile uImage; run trymmckernboot;" \ |
| 113 | "setenv mmckernfile zImage; run trymmckernboot\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 114 | "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \ |
| 115 | "setenv mmcpart 2; run trymmcpartboot;" \ |
| 116 | "setenv mmcpart 3; run trymmcpartboot;" \ |
| 117 | "setenv mmcpart 4; run trymmcpartboot\0" \ |
| 118 | "trymmcboot=if run switchmmc; then " \ |
| 119 | "setenv mmctype fat;" \ |
| 120 | "run trymmcallpartboot;" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 121 | "setenv mmctype ext4;" \ |
| 122 | "run trymmcallpartboot;" \ |
| 123 | "fi\0" \ |
| 124 | "emmcboot=setenv mmcnum 1; run trymmcboot\0" \ |
| 125 | "sdboot=setenv mmcnum 0; run trymmcboot\0" \ |
Pali Rohár | 5e0f513 | 2021-06-18 15:27:04 +0200 | [diff] [blame] | 126 | "trymmcbootmenu=setenv mmctype fat && run trymmcscriptboot || " \ |
| 127 | "setenv mmctype ext4 && run trymmcscriptboot\0" \ |
| 128 | "preboot=setenv mmcpart 1; setenv mmcscriptfile bootmenu.scr;" \ |
| 129 | "setenv mmcnum 0 && run trymmcbootmenu || " \ |
| 130 | "setenv mmcnum 1 && run trymmcbootmenu;" \ |
Pali Rohár | 6f52aee | 2020-04-01 00:35:11 +0200 | [diff] [blame] | 131 | "if run slide; then true; else " \ |
| 132 | "setenv bootmenu_delay 0;" \ |
| 133 | "setenv bootdelay 0;" \ |
| 134 | "fi\0" \ |
Pali Rohár | 13eb3e4 | 2013-03-07 05:15:19 +0000 | [diff] [blame] | 135 | "menucmd=bootmenu\0" \ |
| 136 | "bootmenu_0=Attached kernel=run attachboot\0" \ |
| 137 | "bootmenu_1=Internal eMMC=run emmcboot\0" \ |
| 138 | "bootmenu_2=External SD card=run sdboot\0" \ |
| 139 | "bootmenu_3=U-Boot boot order=boot\0" \ |
| 140 | "bootmenu_delay=30\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 141 | "" |
| 142 | |
Pali Rohár | 13eb3e4 | 2013-03-07 05:15:19 +0000 | [diff] [blame] | 143 | #define CONFIG_POSTBOOTMENU \ |
| 144 | "echo;" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 145 | "echo Extra commands:;" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 146 | "echo run sdboot - Boot from SD card slot.;" \ |
| 147 | "echo run emmcboot - Boot internal eMMC memory.;" \ |
| 148 | "echo run attachboot - Boot attached kernel image.;" \ |
| 149 | "echo" |
| 150 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 151 | /* |
| 152 | * OMAP3 has 12 GP timers, they can be driven by the system clock |
| 153 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 154 | * This rate is divided by a local divisor. |
| 155 | */ |
| 156 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
| 157 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 158 | |
| 159 | /* |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 160 | * Physical Memory Map |
| 161 | */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 162 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
| 163 | |
| 164 | /* |
| 165 | * FLASH and environment organization |
| 166 | */ |
| 167 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 168 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 169 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
| 170 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
| 171 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 172 | CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 173 | |
| 174 | /* |
| 175 | * Attached kernel image |
| 176 | */ |
| 177 | |
| 178 | #define SDRAM_SIZE 0x10000000 /* 256 MB */ |
| 179 | #define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE) |
| 180 | |
| 181 | #define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */ |
| 182 | #define KERNEL_OFFSET 0x40000 /* 256 kB */ |
| 183 | #define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET) |
| 184 | #define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE) |
| 185 | |
| 186 | /* Reserve protected RAM for attached kernel */ |
| 187 | #define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1) |
| 188 | |
| 189 | #endif /* __CONFIG_H */ |