Anatolij Gustschin | 81cad14 | 2010-04-24 19:27:09 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010 DENX Software Engineering |
| 3 | * Anatolij Gustschin <agust@denx.de> |
| 4 | * |
| 5 | * Common configuration options for MPC5121 based boards |
| 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Anatolij Gustschin | 81cad14 | 2010-04-24 19:27:09 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __MPC5121_COMMON_H |
| 11 | #define __MPC5121_COMMON_H |
| 12 | |
| 13 | /* Use SRAM for initial stack */ |
| 14 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Init RAM base */ |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 15 | #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_SRAM_SIZE /* Size of area */ |
Anatolij Gustschin | 81cad14 | 2010-04-24 19:27:09 +0200 | [diff] [blame] | 16 | |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 17 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 18 | GENERATED_GBL_DATA_SIZE) |
Michael Zaidman | f969a68 | 2010-09-20 08:51:53 +0200 | [diff] [blame] | 19 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) |
Anatolij Gustschin | 81cad14 | 2010-04-24 19:27:09 +0200 | [diff] [blame] | 20 | |
| 21 | #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ |
| 22 | #define CONFIG_SYS_MEMTEST_END 0x00400000 |
| 23 | |
| 24 | /* |
| 25 | * Serial console |
| 26 | */ |
Anatolij Gustschin | 81cad14 | 2010-04-24 19:27:09 +0200 | [diff] [blame] | 27 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
| 28 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} |
| 29 | |
| 30 | #define CONFIG_CMDLINE_EDITING 1 /* command line history */ |
Anatolij Gustschin | 81cad14 | 2010-04-24 19:27:09 +0200 | [diff] [blame] | 31 | |
| 32 | #endif /* __MPC5121_COMMON_H */ |