Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / a34d0f673098d188162dc28fabb8acc4ded12e3b / . / arch / arm / mach-rmobile / pfc-r8a7795.c
blob: 44460939733dec7cbfc61521948058307778ced8 [file] [log] [blame]
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1/*
2 * arch/arm/cpu/armv8/rcar_gen3/pfc-r8a7795.c
3 * This file is r8a7795 processor support - PFC hardware block.
4 *
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]5 * Copyright (C) 2015-2016 Renesas Electronics Corporation
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#include <common.h>
11#include <sh_pfc.h>
12#include <asm/gpio.h>
13
14#define CPU_32_PORT(fn, pfx, sfx) \
15 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
16 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
17 PORT_1(fn, pfx##31, sfx)
18
19#define CPU_32_PORT1(fn, pfx, sfx) \
20 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
21 PORT_10(fn, pfx##2, sfx)
22
23#define CPU_32_PORT2(fn, pfx, sfx) \
24 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
25 PORT_10(fn, pfx##2, sfx)
26
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]27#define CPU_32_PORT_29(fn, pfx, sfx) \
28 PORT_10(fn, pfx, sfx), \
29 PORT_10(fn, pfx##1, sfx), \
30 PORT_1(fn, pfx##20, sfx), \
31 PORT_1(fn, pfx##21, sfx), \
32 PORT_1(fn, pfx##22, sfx), \
33 PORT_1(fn, pfx##23, sfx), \
34 PORT_1(fn, pfx##24, sfx), \
35 PORT_1(fn, pfx##25, sfx), \
36 PORT_1(fn, pfx##26, sfx), \
37 PORT_1(fn, pfx##27, sfx), \
38 PORT_1(fn, pfx##28, sfx)
39
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]40#define CPU_32_PORT_28(fn, pfx, sfx) \
41 PORT_10(fn, pfx, sfx), \
42 PORT_10(fn, pfx##1, sfx), \
43 PORT_1(fn, pfx##20, sfx), \
44 PORT_1(fn, pfx##21, sfx), \
45 PORT_1(fn, pfx##22, sfx), \
46 PORT_1(fn, pfx##23, sfx), \
47 PORT_1(fn, pfx##24, sfx), \
48 PORT_1(fn, pfx##25, sfx), \
49 PORT_1(fn, pfx##26, sfx), \
50 PORT_1(fn, pfx##27, sfx)
51
52#define CPU_32_PORT_26(fn, pfx, sfx) \
53 PORT_10(fn, pfx, sfx), \
54 PORT_10(fn, pfx##1, sfx), \
55 PORT_1(fn, pfx##20, sfx), \
56 PORT_1(fn, pfx##21, sfx), \
57 PORT_1(fn, pfx##22, sfx), \
58 PORT_1(fn, pfx##23, sfx), \
59 PORT_1(fn, pfx##24, sfx), \
60 PORT_1(fn, pfx##25, sfx)
61
62#define CPU_32_PORT_18(fn, pfx, sfx) \
63 PORT_10(fn, pfx, sfx), \
64 PORT_1(fn, pfx##10, sfx), \
65 PORT_1(fn, pfx##11, sfx), \
66 PORT_1(fn, pfx##12, sfx), \
67 PORT_1(fn, pfx##13, sfx), \
68 PORT_1(fn, pfx##14, sfx), \
69 PORT_1(fn, pfx##15, sfx), \
70 PORT_1(fn, pfx##16, sfx), \
71 PORT_1(fn, pfx##17, sfx)
72
73#define CPU_32_PORT_16(fn, pfx, sfx) \
74 PORT_10(fn, pfx, sfx), \
75 PORT_1(fn, pfx##10, sfx), \
76 PORT_1(fn, pfx##11, sfx), \
77 PORT_1(fn, pfx##12, sfx), \
78 PORT_1(fn, pfx##13, sfx), \
79 PORT_1(fn, pfx##14, sfx), \
80 PORT_1(fn, pfx##15, sfx)
81
82#define CPU_32_PORT_15(fn, pfx, sfx) \
83 PORT_10(fn, pfx, sfx), \
84 PORT_1(fn, pfx##10, sfx), \
85 PORT_1(fn, pfx##11, sfx), \
86 PORT_1(fn, pfx##12, sfx), \
87 PORT_1(fn, pfx##13, sfx), \
88 PORT_1(fn, pfx##14, sfx)
89
90#define CPU_32_PORT_4(fn, pfx, sfx) \
91 PORT_1(fn, pfx##0, sfx), \
92 PORT_1(fn, pfx##1, sfx), \
93 PORT_1(fn, pfx##2, sfx), \
94 PORT_1(fn, pfx##3, sfx)
95
96
97/* --gen3-- */
98/* GP_0_0_DATA -> GP_7_4_DATA */
99/* except for GP0[16] - [31],
100 GP1[28] - [31],
101 GP2[15] - [31],
102 GP3[16] - [31],
103 GP4[18] - [31],
104 GP5[26] - [31],
105 GP7[4] - [31] */
106
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]107#define ES_CPU_ALL_PORT(fn, pfx, sfx) \
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]108 CPU_32_PORT_16(fn, pfx##_0_, sfx), \
109 CPU_32_PORT_28(fn, pfx##_1_, sfx), \
110 CPU_32_PORT_15(fn, pfx##_2_, sfx), \
111 CPU_32_PORT_16(fn, pfx##_3_, sfx), \
112 CPU_32_PORT_18(fn, pfx##_4_, sfx), \
113 CPU_32_PORT_26(fn, pfx##_5_, sfx), \
114 CPU_32_PORT(fn, pfx##_6_, sfx), \
115 CPU_32_PORT_4(fn, pfx##_7_, sfx)
116
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]117#define CPU_ALL_PORT(fn, pfx, sfx) \
118 CPU_32_PORT_16(fn, pfx##_0_, sfx), \
119 CPU_32_PORT_29(fn, pfx##_1_, sfx), \
120 CPU_32_PORT_15(fn, pfx##_2_, sfx), \
121 CPU_32_PORT_16(fn, pfx##_3_, sfx), \
122 CPU_32_PORT_18(fn, pfx##_4_, sfx), \
123 CPU_32_PORT_26(fn, pfx##_5_, sfx), \
124 CPU_32_PORT(fn, pfx##_6_, sfx), \
125 CPU_32_PORT_4(fn, pfx##_7_, sfx)
126
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]127#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
128#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
129 GP##pfx##_IN, GP##pfx##_OUT)
130
131#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
132#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
133
134#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
135#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
136#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
137
138
139#define PORT_10_REV(fn, pfx, sfx) \
140 PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
141 PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
142 PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
143 PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
144 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
145
146#define CPU_32_PORT_REV(fn, pfx, sfx) \
147 PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
148 PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
149 PORT_10_REV(fn, pfx, sfx)
150
151#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
152#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
153
154#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
155#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
156 FN_##ipsr, FN_##fn)
157
158enum {
159 PINMUX_RESERVED = 0,
160
161 PINMUX_DATA_BEGIN,
162 GP_ALL(DATA),
163 PINMUX_DATA_END,
164
165 PINMUX_INPUT_BEGIN,
166 GP_ALL(IN),
167 PINMUX_INPUT_END,
168
169 PINMUX_OUTPUT_BEGIN,
170 GP_ALL(OUT),
171 PINMUX_OUTPUT_END,
172
173 PINMUX_FUNCTION_BEGIN,
174 GP_ALL(FN),
175
176 /* GPSR0 */
177 GFN_D15,
178 GFN_D14,
179 GFN_D13,
180 GFN_D12,
181 GFN_D11,
182 GFN_D10,
183 GFN_D9,
184 GFN_D8,
185 GFN_D7,
186 GFN_D6,
187 GFN_D5,
188 GFN_D4,
189 GFN_D3,
190 GFN_D2,
191 GFN_D1,
192 GFN_D0,
193
194 /* GPSR1 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]195 GFN_CLKOUT,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]196 GFN_EX_WAIT0_A,
197 GFN_WE1x,
198 GFN_WE0x,
199 GFN_RD_WRx,
200 GFN_RDx,
201 GFN_BSx,
202 GFN_CS1x_A26,
203 GFN_CS0x,
204 GFN_A19,
205 GFN_A18,
206 GFN_A17,
207 GFN_A16,
208 GFN_A15,
209 GFN_A14,
210 GFN_A13,
211 GFN_A12,
212 GFN_A11,
213 GFN_A10,
214 GFN_A9,
215 GFN_A8,
216 GFN_A7,
217 GFN_A6,
218 GFN_A5,
219 GFN_A4,
220 GFN_A3,
221 GFN_A2,
222 GFN_A1,
223 GFN_A0,
224
225 /* GPSR2 */
226 GFN_AVB_AVTP_CAPTURE_A,
227 GFN_AVB_AVTP_MATCH_A,
228 GFN_AVB_LINK,
229 GFN_AVB_PHY_INT,
230 GFN_AVB_MAGIC,
231 GFN_AVB_MDC,
232 GFN_PWM2_A,
233 GFN_PWM1_A,
234 GFN_PWM0,
235 GFN_IRQ5,
236 GFN_IRQ4,
237 GFN_IRQ3,
238 GFN_IRQ2,
239 GFN_IRQ1,
240 GFN_IRQ0,
241
242 /* GPSR3 */
243 GFN_SD1_WP,
244 GFN_SD1_CD,
245 GFN_SD0_WP,
246 GFN_SD0_CD,
247 GFN_SD1_DAT3,
248 GFN_SD1_DAT2,
249 GFN_SD1_DAT1,
250 GFN_SD1_DAT0,
251 GFN_SD1_CMD,
252 GFN_SD1_CLK,
253 GFN_SD0_DAT3,
254 GFN_SD0_DAT2,
255 GFN_SD0_DAT1,
256 GFN_SD0_DAT0,
257 GFN_SD0_CMD,
258 GFN_SD0_CLK,
259
260 /* GPSR4 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]261 GFN_SD3_DS,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]262 GFN_SD3_DAT7,
263 GFN_SD3_DAT6,
264 GFN_SD3_DAT5,
265 GFN_SD3_DAT4,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]266 GFN_SD3_DAT3,
267 GFN_SD3_DAT2,
268 GFN_SD3_DAT1,
269 GFN_SD3_DAT0,
270 GFN_SD3_CMD,
271 GFN_SD3_CLK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]272 GFN_SD2_DS,
273 GFN_SD2_DAT3,
274 GFN_SD2_DAT2,
275 GFN_SD2_DAT1,
276 GFN_SD2_DAT0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]277 GFN_SD2_CMD,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]278 GFN_SD2_CLK,
279
280 /* GPSR5 */
281 GFN_MLB_DAT,
282 GFN_MLB_SIG,
283 GFN_MLB_CLK,
284 FN_MSIOF0_RXD,
285 GFN_MSIOF0_SS2,
286 FN_MSIOF0_TXD,
287 GFN_MSIOF0_SS1,
288 GFN_MSIOF0_SYNC,
289 FN_MSIOF0_SCK,
290 GFN_HRTS0x,
291 GFN_HCTS0x,
292 GFN_HTX0,
293 GFN_HRX0,
294 GFN_HSCK0,
295 GFN_RX2_A,
296 GFN_TX2_A,
297 GFN_SCK2,
298 GFN_RTS1x_TANS,
299 GFN_CTS1x,
300 GFN_TX1_A,
301 GFN_RX1_A,
302 GFN_RTS0x_TANS,
303 GFN_CTS0x,
304 GFN_TX0,
305 GFN_RX0,
306 GFN_SCK0,
307
308 /* GPSR6 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]309 GFN_USB3_OVC,
310 GFN_USB3_PWEN,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]311 GFN_USB30_OVC,
312 GFN_USB30_PWEN,
313 GFN_USB1_OVC,
314 GFN_USB1_PWEN,
315 GFN_USB0_OVC,
316 GFN_USB0_PWEN,
317 GFN_AUDIO_CLKB_B,
318 GFN_AUDIO_CLKA_A,
319 GFN_SSI_SDATA9_A,
320 GFN_SSI_SDATA8,
321 GFN_SSI_SDATA7,
322 GFN_SSI_WS78,
323 GFN_SSI_SCK78,
324 GFN_SSI_SDATA6,
325 GFN_SSI_WS6,
326 GFN_SSI_SCK6,
327 FN_SSI_SDATA5,
328 FN_SSI_WS5,
329 FN_SSI_SCK5,
330 GFN_SSI_SDATA4,
331 GFN_SSI_WS4,
332 GFN_SSI_SCK4,
333 GFN_SSI_SDATA3,
334 GFN_SSI_WS34,
335 GFN_SSI_SCK34,
336 GFN_SSI_SDATA2_A,
337 GFN_SSI_SDATA1_A,
338 GFN_SSI_SDATA0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]339 GFN_SSI_WS01239,
340 GFN_SSI_SCK01239,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]341
342 /* GPSR7 */
343 FN_HDMI1_CEC,
344 FN_HDMI0_CEC,
345 FN_AVS2,
346 FN_AVS1,
347
348 /* IPSR0 */
349 IFN_AVB_MDC,
350 FN_MSIOF2_SS2_C,
351 IFN_AVB_MAGIC,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]352 FN_MSIOF2_SS1_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]353 FN_SCK4_A,
354 IFN_AVB_PHY_INT,
355 FN_MSIOF2_SYNC_C,
356 FN_RX4_A,
357 IFN_AVB_LINK,
358 FN_MSIOF2_SCK_C,
359 FN_TX4_A,
360 IFN_AVB_AVTP_MATCH_A,
361 FN_MSIOF2_RXD_C,
362 FN_CTS4x_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]363 FN_FSCLKST2x_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]364 IFN_AVB_AVTP_CAPTURE_A,
365 FN_MSIOF2_TXD_C,
366 FN_RTS4x_TANS_A,
367 IFN_IRQ0,
368 FN_QPOLB,
369 FN_DU_CDE,
370 FN_VI4_DATA0_B,
371 FN_CAN0_TX_B,
372 FN_CANFD0_TX_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]373 FN_MSIOF3_SS2_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]374 IFN_IRQ1,
375 FN_QPOLA,
376 FN_DU_DISP,
377 FN_VI4_DATA1_B,
378 FN_CAN0_RX_B,
379 FN_CANFD0_RX_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]380 FN_MSIOF3_SS1_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]381
382 /* IPSR1 */
383 IFN_IRQ2,
384 FN_QCPV_QDE,
385 FN_DU_EXODDF_DU_ODDF_DISP_CDE,
386 FN_VI4_DATA2_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]387 FN_MSIOF3_SYNC_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]388 FN_PWM3_B,
389 IFN_IRQ3,
390 FN_QSTVB_QVE,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]391 FN_DU_DOTCLKOUT1,
392 FN_VI4_DATA3_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]393 FN_MSIOF3_SCK_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]394 FN_PWM4_B,
395 IFN_IRQ4,
396 FN_QSTH_QHS,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]397 FN_DU_EXHSYNC_DU_HSYNC,
398 FN_VI4_DATA4_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]399 FN_MSIOF3_RXD_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]400 FN_PWM5_B,
401 IFN_IRQ5,
402 FN_QSTB_QHE,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]403 FN_DU_EXVSYNC_DU_VSYNC,
404 FN_VI4_DATA5_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]405 FN_FSCLKST2x_B,
406 FN_MSIOF3_TXD_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]407 FN_PWM6_B,
408 IFN_PWM0,
409 FN_AVB_AVTP_PPS,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]410 FN_VI4_DATA6_B,
411 FN_IECLK_B,
412 IFN_PWM1_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]413 FN_HRX3_D,
414 FN_VI4_DATA7_B,
415 FN_IERX_B,
416 IFN_PWM2_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]417 FN_HTX3_D,
418 FN_IETX_B,
419 IFN_A0,
420 FN_LCDOUT16,
421 FN_MSIOF3_SYNC_B,
422 FN_VI4_DATA8,
423 FN_DU_DB0,
424 FN_PWM3_A,
425
426 /* IPSR2 */
427 IFN_A1,
428 FN_LCDOUT17,
429 FN_MSIOF3_TXD_B,
430 FN_VI4_DATA9,
431 FN_DU_DB1,
432 FN_PWM4_A,
433 IFN_A2,
434 FN_LCDOUT18,
435 FN_MSIOF3_SCK_B,
436 FN_VI4_DATA10,
437 FN_DU_DB2,
438 FN_PWM5_A,
439 IFN_A3,
440 FN_LCDOUT19,
441 FN_MSIOF3_RXD_B,
442 FN_VI4_DATA11,
443 FN_DU_DB3,
444 FN_PWM6_A,
445 IFN_A4,
446 FN_LCDOUT20,
447 FN_MSIOF3_SS1_B,
448 FN_VI4_DATA12,
449 FN_VI5_DATA12,
450 FN_DU_DB4,
451 IFN_A5,
452 FN_LCDOUT21,
453 FN_MSIOF3_SS2_B,
454 FN_SCK4_B,
455 FN_VI4_DATA13,
456 FN_VI5_DATA13,
457 FN_DU_DB5,
458 IFN_A6,
459 FN_LCDOUT22,
460 FN_MSIOF2_SS1_A,
461 FN_RX4_B,
462 FN_VI4_DATA14,
463 FN_VI5_DATA14,
464 FN_DU_DB6,
465 IFN_A7,
466 FN_LCDOUT23,
467 FN_MSIOF2_SS2_A,
468 FN_TX4_B,
469 FN_VI4_DATA15,
470 FN_V15_DATA15,
471 FN_DU_DB7,
472 IFN_A8,
473 FN_RX3_B,
474 FN_MSIOF2_SYNC_A,
475 FN_HRX4_B,
476 FN_SDA6_A,
477 FN_AVB_AVTP_MATCH_B,
478 FN_PWM1_B,
479
480 /* IPSR3 */
481 IFN_A9,
482 FN_MSIOF2_SCK_A,
483 FN_CTS4x_B,
484 FN_VI5_VSYNCx,
485 IFN_A10,
486 FN_MSIOF2_RXD_A,
487 FN_RTS4n_TANS_B,
488 FN_VI5_HSYNCx,
489 IFN_A11,
490 FN_TX3_B,
491 FN_MSIOF2_TXD_A,
492 FN_HTX4_B,
493 FN_HSCK4,
494 FN_VI5_FIELD,
495 FN_SCL6_A,
496 FN_AVB_AVTP_CAPTURE_B,
497 FN_PWM2_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]498 IFN_A12,
499 FN_LCDOUT12,
500 FN_MSIOF3_SCK_C,
501 FN_HRX4_A,
502 FN_VI5_DATA8,
503 FN_DU_DG4,
504 IFN_A13,
505 FN_LCDOUT13,
506 FN_MSIOF3_SYNC_C,
507 FN_HTX4_A,
508 FN_VI5_DATA9,
509 FN_DU_DG5,
510 IFN_A14,
511 FN_LCDOUT14,
512 FN_MSIOF3_RXD_C,
513 FN_HCTS4x,
514 FN_VI5_DATA10,
515 FN_DU_DG6,
516 IFN_A15,
517 FN_LCDOUT15,
518 FN_MSIOF3_TXD_C,
519 FN_HRTS4x,
520 FN_VI5_DATA11,
521 FN_DU_DG7,
522 IFN_A16,
523 FN_LCDOUT8,
524 FN_VI4_FIELD,
525 FN_DU_DG0,
526
527 /* IPSR4 */
528 IFN_A17,
529 FN_LCDOUT9,
530 FN_VI4_VSYNCx,
531 FN_DU_DG1,
532 IFN_A18,
533 FN_LCDOUT10,
534 FN_VI4_HSYNCx,
535 FN_DU_DG2,
536 IFN_A19,
537 FN_LCDOUT11,
538 FN_VI4_CLKENB,
539 FN_DU_DG3,
540 IFN_CS0x,
541 FN_VI5_CLKENB,
542 IFN_CS1x_A26,
543 FN_VI5_CLK,
544 FN_EX_WAIT0_B,
545 IFN_BSx,
546 FN_QSTVA_QVS,
547 FN_MSIOF3_SCK_D,
548 FN_SCK3,
549 FN_HSCK3,
550 FN_CAN1_TX,
551 FN_CANFD1_TX,
552 FN_IETX_A,
553 IFN_RDx,
554 FN_MSIOF3_SYNC_D,
555 FN_RX3_A,
556 FN_HRX3_A,
557 FN_CAN0_TX_A,
558 FN_CANFD0_TX_A,
559 IFN_RD_WRx,
560 FN_MSIOF3_RXD_D,
561 FN_TX3_A,
562 FN_HTX3_A,
563 FN_CAN0_RX_A,
564 FN_CANFD0_RX_A,
565
566 /* IPSR5 */
567 IFN_WE0x,
568 FN_MSIIOF3_TXD_D,
569 FN_CTS3x,
570 FN_HCTS3x,
571 FN_SCL6_B,
572 FN_CAN_CLK,
573 FN_IECLK_A,
574 IFN_WE1x,
575 FN_MSIOF3_SS1_D,
576 FN_RTS3x_TANS,
577 FN_HRTS3x,
578 FN_SDA6_B,
579 FN_CAN1_RX,
580 FN_CANFD1_RX,
581 FN_IERX_A,
582 IFN_EX_WAIT0_A,
583 FN_QCLK,
584 FN_VI4_CLK,
585 FN_DU_DOTCLKOUT0,
586 IFN_D0,
587 FN_MSIOF2_SS1_B,
588 FN_MSIOF3_SCK_A,
589 FN_VI4_DATA16,
590 FN_VI5_DATA0,
591 IFN_D1,
592 FN_MSIOF2_SS2_B,
593 FN_MSIOF3_SYNC_A,
594 FN_VI4_DATA17,
595 FN_VI5_DATA1,
596 IFN_D2,
597 FN_MSIOF3_RXD_A,
598 FN_VI4_DATA18,
599 FN_VI5_DATA2,
600 IFN_D3,
601 FN_MSIOF3_TXD_A,
602 FN_VI4_DATA19,
603 FN_VI5_DATA3,
604 IFN_D4,
605 FN_MSIOF2_SCK_B,
606 FN_VI4_DATA20,
607 FN_VI5_DATA4,
608
609 /* IPSR6 */
610 IFN_D5,
611 FN_MSIOF2_SYNC_B,
612 FN_VI4_DATA21,
613 FN_VI5_DATA5,
614 IFN_D6,
615 FN_MSIOF2_RXD_B,
616 FN_VI4_DATA22,
617 FN_VI5_DATA6,
618 IFN_D7,
619 FN_MSIOF2_TXD_B,
620 FN_VI4_DATA23,
621 FN_VI5_DATA7,
622 IFN_D8,
623 FN_LCDOUT0,
624 FN_MSIOF2_SCK_D,
625 FN_SCK4_C,
626 FN_VI4_DATA0_A,
627 FN_DU_DR0,
628 IFN_D9,
629 FN_LCDOUT1,
630 FN_MSIOF2_SYNC_D,
631 FN_VI4_DATA1_A,
632 FN_DU_DR1,
633 IFN_D10,
634 FN_LCDOUT2,
635 FN_MSIOF2_RXD_D,
636 FN_HRX3_B,
637 FN_VI4_DATA2_A,
638 FN_CTS4x_C,
639 FN_DU_DR2,
640 IFN_D11,
641 FN_LCDOUT3,
642 FN_MSIOF2_TXD_D,
643 FN_HTX3_B,
644 FN_VI4_DATA3_A,
645 FN_RTS4x_TANS_C,
646 FN_DU_DR3,
647 IFN_D12,
648 FN_LCDOUT4,
649 FN_MSIOF2_SS1_D,
650 FN_RX4_C,
651 FN_VI4_DATA4_A,
652 FN_DU_DR4,
653
654 /* IPSR7 */
655 IFN_D13,
656 FN_LCDOUT5,
657 FN_MSIOF2_SS2_D,
658 FN_TX4_C,
659 FN_VI4_DATA5_A,
660 FN_DU_DR5,
661 IFN_D14,
662 FN_LCDOUT6,
663 FN_MSIOF3_SS1_A,
664 FN_HRX3_C,
665 FN_VI4_DATA6_A,
666 FN_DU_DR6,
667 FN_SCL6_C,
668 IFN_D15,
669 FN_LCDOUT7,
670 FN_MSIOF3_SS2_A,
671 FN_HTX3_C,
672 FN_VI4_DATA7_A,
673 FN_DU_DR7,
674 FN_SDA6_C,
675 FN_FSCLKST,
676 IFN_SD0_CLK,
677 FN_MSIOF1_SCK_E,
678 FN_STP_OPWM_0_B,
679 IFN_SD0_CMD,
680 FN_MSIOF1_SYNC_E,
681 FN_STP_IVCXO27_0_B,
682 IFN_SD0_DAT0,
683 FN_MSIOF1_RXD_E,
684 FN_TS_SCK0_B,
685 FN_STP_ISCLK_0_B,
686 IFN_SD0_DAT1,
687 FN_MSIOF1_TXD_E,
688 FN_TS_SPSYNC0_B,
689 FN_STP_ISSYNC_0_B,
690
691 /* IPSR8 */
692 IFN_SD0_DAT2,
693 FN_MSIOF1_SS1_E,
694 FN_TS_SDAT0_B,
695 FN_STP_ISD_0_B,
696 IFN_SD0_DAT3,
697 FN_MSIOF1_SS2_E,
698 FN_TS_SDEN0_B,
699 FN_STP_ISEN_0_B,
700 IFN_SD1_CLK,
701 FN_MSIOF1_SCK_G,
702 FN_SIM0_CLK_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]703 IFN_SD1_CMD,
704 FN_MSIOF1_SYNC_G,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]705 FN_NFCEx_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]706 FN_SIM0_D_A,
707 FN_STP_IVCXO27_1_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]708 IFN_SD1_DAT0,
709 FN_SD2_DAT4,
710 FN_MSIOF1_RXD_G,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]711 FN_NFWPx_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]712 FN_TS_SCK1_B,
713 FN_STP_ISCLK_1_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]714 IFN_SD1_DAT1,
715 FN_SD2_DAT5,
716 FN_MSIOF1_TXD_G,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]717 FN_NFDATA14_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]718 FN_TS_SPSYNC1_B,
719 FN_STP_ISSYNC_1_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]720 IFN_SD1_DAT2,
721 FN_SD2_DAT6,
722 FN_MSIOF1_SS1_G,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]723 FN_NFDATA15_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]724 FN_TS_SDAT1_B,
725 FN_STP_IOD_1_B,
726 IFN_SD1_DAT3,
727 FN_SD2_DAT7,
728 FN_MSIOF1_SS2_G,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]729 FN_NFRBx_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]730 FN_TS_SDEN1_B,
731 FN_STP_ISEN_1_B,
732
733 /* IPSR9 */
734 IFN_SD2_CLK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]735 FN_NFDATA8,
736 IFN_SD2_CMD,
737 FN_NFDATA9,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]738 IFN_SD2_DAT0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]739 FN_NFDATA10,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]740 IFN_SD2_DAT1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]741 FN_NFDATA11,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]742 IFN_SD2_DAT2,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]743 FN_NFDATA12,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]744 IFN_SD2_DAT3,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]745 FN_NFDATA13,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]746 IFN_SD2_DS,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]747 FN_NFALE,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]748 FN_SATA_DEVSLP_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]749 IFN_SD3_CLK,
750 FN_NFWEx,
751
752 /* IPSR10 */
753 IFN_SD3_CMD,
754 FN_NFREx,
755 IFN_SD3_DAT0,
756 FN_NFDATA0,
757 IFN_SD3_DAT1,
758 FN_NFDATA1,
759 IFN_SD3_DAT2,
760 FN_NFDATA2,
761 IFN_SD3_DAT3,
762 FN_NFDATA3,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]763 IFN_SD3_DAT4,
764 FN_SD2_CD_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]765 FN_NFDATA4,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]766 IFN_SD3_DAT5,
767 FN_SD2_WP_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]768 FN_NFDATA5,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]769 IFN_SD3_DAT6,
770 FN_SD3_CD,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]771 FN_NFDATA6,
772
773 /* IPSR11 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]774 IFN_SD3_DAT7,
775 FN_SD3_WP,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]776 FN_NFDATA7,
777 IFN_SD3_DS,
778 FN_NFCLE,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]779 IFN_SD0_CD,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]780 FN_NFDATA14_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]781 FN_SCL2_B,
782 FN_SIM0_RST_A,
783 IFN_SD0_WP,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]784 FN_NFDATA15_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]785 FN_SDA2_B,
786 IFN_SD1_CD,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]787 FN_NFRBx_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]788 FN_SIM0_CLK_B,
789 IFN_SD1_WP,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]790 FN_NFCEx_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]791 FN_SIM0_D_B,
792 IFN_SCK0,
793 FN_HSCK1_B,
794 FN_MSIOF1_SS2_B,
795 FN_AUDIO_CLKC_B,
796 FN_SDA2_A,
797 FN_SIM0_RST_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]798 FN_STP_OPWM_0_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]799 FN_RIF0_CLK_B,
800 FN_ADICHS2,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]801 FN_SCK5_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]802 IFN_RX0,
803 FN_HRX1_B,
804 FN_TS_SCK0_C,
805 FN_STP_ISCLK_0_C,
806 FN_RIF0_D0_B,
807
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]808 /* IPSR12 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]809 IFN_TX0,
810 FN_HTX1_B,
811 FN_TS_SPSYNC0_C,
812 FN_STP_ISSYNC_0_C,
813 FN_RIF0_D1_B,
814 IFN_CTS0x,
815 FN_HCTS1x_B,
816 FN_MSIOF1_SYNC_B,
817 FN_TS_SPSYNC1_C,
818 FN_STP_ISSYNC_1_C,
819 FN_RIF1_SYNC_B,
820 FN_AUDIO_CLKOUT_C,
821 FN_ADICS_SAMP,
822 IFN_RTS0x_TANS,
823 FN_HRTS1x_B,
824 FN_MSIOF1_SS1_B,
825 FN_AUDIO_CLKA_B,
826 FN_SCL2_A,
827 FN_STP_IVCXO27_1_C,
828 FN_RIF0_SYNC_B,
829 FN_ADICHS1,
830 IFN_RX1_A,
831 FN_HRX1_A,
832 FN_TS_SDAT0_C,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]833 FN_STP_ISD_0_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]834 FN_RIF1_CLK_C,
835 IFN_TX1_A,
836 FN_HTX1_A,
837 FN_TS_SDEN0_C,
838 FN_STP_ISEN_0_C,
839 FN_RIF1_D0_C,
840 IFN_CTS1x,
841 FN_HCTS1x_A,
842 FN_MSIOF1_RXD_B,
843 FN_TS_SDEN1_C,
844 FN_STP_ISEN_1_C,
845 FN_RIF1_D0_B,
846 FN_ADIDATA,
847 IFN_RTS1x_TANS,
848 FN_HRTS1x_A,
849 FN_MSIOF1_TXD_B,
850 FN_TS_SDAT1_C,
851 FN_STP_ISD_1_C,
852 FN_RIF1_D1_B,
853 FN_ADICHS0,
854 IFN_SCK2,
855 FN_SCIF_CLK_B,
856 FN_MSIOF1_SCK_B,
857 FN_TS_SCK1_C,
858 FN_STP_ISCLK_1_C,
859 FN_RIF1_CLK_B,
860 FN_ADICLK,
861
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]862 /* IPSR13 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]863 IFN_TX2_A,
864 FN_SD2_CD_B,
865 FN_SCL1_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]866 FN_FMCLK_A,
867 FN_RIF1_D1_C,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]868 FN_FSO_CFE_0x,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]869 IFN_RX2_A,
870 FN_SD2_WP_B,
871 FN_SDA1_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]872 FN_FMIN_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]873 FN_RIF1_SYNC_C,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]874 FN_FSO_CFE_1x,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]875 IFN_HSCK0,
876 FN_MSIOF1_SCK_D,
877 FN_AUDIO_CLKB_A,
878 FN_SSI_SDATA1_B,
879 FN_TS_SCK0_D,
880 FN_STP_ISCLK_0_D,
881 FN_RIF0_CLK_C,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]882 FN_RX5_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]883 IFN_HRX0,
884 FN_MSIOF1_RXD_D,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]885 FN_SSI_SDATA2_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]886 FN_TS_SDEN0_D,
887 FN_STP_ISEN_0_D,
888 FN_RIF0_D0_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]889 IFN_HTX0,
890 FN_MSIOF1_TXD_D,
891 FN_SSI_SDATA9_B,
892 FN_TS_SDAT0_D,
893 FN_STP_ISD_0_D,
894 FN_RIF0_D1_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]895 IFN_HCTS0x,
896 FN_RX2_B,
897 FN_MSIOF1_SYNC_D,
898 FN_SSI_SCK9_A,
899 FN_TS_SPSYNC0_D,
900 FN_STP_ISSYNC_0_D,
901 FN_RIF0_SYNC_C,
902 FN_AUDIO_CLKOUT1_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]903 IFN_HRTS0x,
904 FN_TX2_B,
905 FN_MSIOF1_SS1_D,
906 FN_SSI_WS9_A,
907 FN_STP_IVCXO27_0_D,
908 FN_BPFCLK_A,
909 FN_AUDIO_CLKOUT2_A,
910 IFN_MSIOF0_SYNC,
911 FN_AUDIO_CLKOUT_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]912 FN_TX5_B,
913 FN_BPFCLK_D,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]914
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]915 /* IPSR14 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]916 IFN_MSIOF0_SS1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]917 FN_RX5_A,
918 FN_NFWPx_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]919 FN_AUDIO_CLKA_C,
920 FN_SSI_SCK2_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]921 FN_STP_IVCXO27_0_C,
922 FN_AUDIO_CLKOUT3_A,
923 FN_TCLK1_B,
924 IFN_MSIOF0_SS2,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]925 FN_TX5_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]926 FN_MSIOF1_SS2_D,
927 FN_AUDIO_CLKC_A,
928 FN_SSI_WS2_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]929 FN_STP_OPWM_0_D,
930 FN_AUDIO_CLKOUT_D,
931 FN_SPEEDIN_B,
932 IFN_MLB_CLK,
933 FN_MSIOF1_SCK_F,
934 FN_SCL1_B,
935 IFN_MLB_SIG,
936 FN_RX1_B,
937 FN_MSIOF1_SYNC_F,
938 FN_SDA1_B,
939 IFN_MLB_DAT,
940 FN_TX1_B,
941 FN_MSIOF1_RXD_F,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]942 IFN_SSI_SCK01239,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]943 FN_MSIOF1_TXD_F,
944 FN_MOUT0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]945 IFN_SSI_WS01239,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]946 FN_MSIOF1_SS1_F,
947 FN_MOUT1,
948 IFN_SSI_SDATA0,
949 FN_MSIOF1_SS2_F,
950 FN_MOUT2,
951
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]952 /* IPSR15 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]953 IFN_SSI_SDATA1_A,
954 FN_MOUT5,
955 IFN_SSI_SDATA2_A,
956 FN_SSI_SCK1_B,
957 FN_MOUT6,
958 IFN_SSI_SCK34,
959 FN_MSIOF1_SS1_A,
960 FN_STP_OPWM_0_A,
961 IFN_SSI_WS34,
962 FN_HCTS2x_A,
963 FN_MSIOF1_SS2_A,
964 FN_STP_IVCXO27_0_A,
965 IFN_SSI_SDATA3,
966 FN_HRTS2x_A,
967 FN_MSIOF1_TXD_A,
968 FN_TS_SCK0_A,
969 FN_STP_ISCLK_0_A,
970 FN_RIF0_D1_A,
971 FN_RIF2_D0_A,
972 IFN_SSI_SCK4,
973 FN_HRX2_A,
974 FN_MSIOF1_SCK_A,
975 FN_TS_SDAT0_A,
976 FN_STP_ISD_0_A,
977 FN_RIF0_CLK_A,
978 FN_RIF2_CLK_A,
979 IFN_SSI_WS4,
980 FN_HTX2_A,
981 FN_MSIOF1_SYNC_A,
982 FN_TS_SDEN0_A,
983 FN_STP_ISEN_0_A,
984 FN_RIF0_SYNC_A,
985 FN_RIF2_SYNC_A,
986 IFN_SSI_SDATA4,
987 FN_HSCK2_A,
988 FN_MSIOF1_RXD_A,
989 FN_TS_SPSYNC0_A,
990 FN_STP_ISSYNC_0_A,
991 FN_RIF0_D0_A,
992 FN_RIF2_D1_A,
993
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]994 /* IPSR16 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]995 IFN_SSI_SCK6,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]996 FN_SIM0_RST_D,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]997 IFN_SSI_WS6,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]998 FN_SIM0_D_D,
999 IFN_SSI_SDATA6,
1000 FN_SIM0_CLK_D,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1001 FN_SATA_DEVSLP_A,
1002 IFN_SSI_SCK78,
1003 FN_HRX2_B,
1004 FN_MSIOF1_SCK_C,
1005 FN_TS_SCK1_A,
1006 FN_STP_ISCLK_1_A,
1007 FN_RIF1_CLK_A,
1008 FN_RIF3_CLK_A,
1009 IFN_SSI_WS78,
1010 FN_HTX2_B,
1011 FN_MSIOF1_SYNC_C,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1012 FN_TS_SDAT1_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1013 FN_STP_ISD_1_A,
1014 FN_RIF1_SYNC_A,
1015 FN_RIF3_SYNC_A,
1016 IFN_SSI_SDATA7,
1017 FN_HCTS2x_B,
1018 FN_MSIOF1_RXD_C,
1019 FN_TS_SDEN1_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1020 FN_STP_ISEN_1_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1021 FN_RIF1_D0_A,
1022 FN_RIF3_D0_A,
1023 FN_TCLK2_A,
1024 IFN_SSI_SDATA8,
1025 FN_HRTS2x_B,
1026 FN_MSIOF1_TXD_C,
1027 FN_TS_SPSYNC1_A,
1028 FN_STP_ISSYNC_1_A,
1029 FN_RIF1_D1_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1030 FN_RIF3_D1_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1031 IFN_SSI_SDATA9_A,
1032 FN_HSCK2_B,
1033 FN_MSIOF1_SS1_C,
1034 FN_HSCK1_A,
1035 FN_SSI_WS1_B,
1036 FN_SCK1,
1037 FN_STP_IVCXO27_1_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1038 FN_SCK5_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1039
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1040 /* IPSR17 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1041 IFN_AUDIO_CLKA_A,
1042 FN_CC5_OSCOUT,
1043 IFN_AUDIO_CLKB_B,
1044 FN_SCIF_CLK_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1045 FN_STP_IVCXO27_1_D,
1046 FN_REMOCON_A,
1047 FN_TCLK1_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1048 IFN_USB0_PWEN,
1049 FN_SIM0_RST_C,
1050 FN_TS_SCK1_D,
1051 FN_STP_ISCLK_1_D,
1052 FN_BPFCLK_B,
1053 FN_RIF3_CLK_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1054 FN_HSCK2_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1055 IFN_USB0_OVC,
1056 FN_SIM0_D_C,
1057 FN_TS_SDAT1_D,
1058 FN_STP_ISD_1_D,
1059 FN_RIF3_SYNC_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1060 FN_HRX2_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1061 IFN_USB1_PWEN,
1062 FN_SIM0_CLK_C,
1063 FN_SSI_SCK1_A,
1064 FN_TS_SCK0_E,
1065 FN_STP_ISCLK_0_E,
1066 FN_FMCLK_B,
1067 FN_RIF2_CLK_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1068 FN_SPEEDIN_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1069 FN_HTX2_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1070 IFN_USB1_OVC,
1071 FN_MSIOF1_SS2_C,
1072 FN_SSI_WS1_A,
1073 FN_TS_SDAT0_E,
1074 FN_STP_ISD_0_E,
1075 FN_FMIN_B,
1076 FN_RIF2_SYNC_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1077 FN_REMOCON_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1078 FN_HCTS2x_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1079 IFN_USB30_PWEN,
1080 FN_AUDIO_CLKOUT_B,
1081 FN_SSI_SCK2_B,
1082 FN_TS_SDEN1_D,
1083 FN_STP_ISEN_1_D,
1084 FN_STP_OPWM_0_E,
1085 FN_RIF3_D0_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1086 FN_TCLK2_B,
1087 FN_TPU0TO0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1088 FN_BPFCLK_C,
1089 FN_HRTS2x_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1090 IFN_USB30_OVC,
1091 FN_AUDIO_CLKOUT1_B,
1092 FN_SSI_WS2_B,
1093 FN_TS_SPSYNC1_D,
1094 FN_STP_ISSYNC_1_D,
1095 FN_STP_IVCXO27_0_E,
1096 FN_RIF3_D1_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1097 FN_FSO_TOEx,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1098 FN_TPU0TO1,
1099
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1100 /* IPSR18 */
1101 IFN_USB3_PWEN,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1102 FN_AUDIO_CLKOUT2_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1103 FN_SSI_SCK9_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1104 FN_TS_SDEN0_E,
1105 FN_STP_ISEN_0_E,
1106 FN_RIF2_D0_B,
1107 FN_TPU0TO2,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1108 FN_FMCLK_C,
1109 FN_FMCLK_D,
1110 IFN_USB3_OVC,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1111 FN_AUDIO_CLKOUT3_B,
1112 FN_SSI_WS9_B,
1113 FN_TS_SPSYNC0_E,
1114 FN_STP_ISSYNC_0_E,
1115 FN_RIF2_D1_B,
1116 FN_TPU0TO3,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1117 FN_FMIN_C,
1118 FN_FMIN_D,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1119
1120 /* MOD_SEL0 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1121 /* sel_msiof3[3](0,1,2,3,4) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1122 FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,
1123 FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1124 FN_SEL_MSIOF3_4,
1125 /* sel_msiof2[2](0,1,2,3) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1126 FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,
1127 FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1128 /* sel_msiof1[3](0,1,2,3,4,5,6) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1129 FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,
1130 FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,
1131 FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,
1132 FN_SEL_MSIOF1_6,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1133 /* sel_lbsc[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1134 FN_SEL_LBSC_0, FN_SEL_LBSC_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1135 /* sel_iebus[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1136 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1137 /* sel_i2c2[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1138 FN_SEL_I2C2_0, FN_SEL_I2C2_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1139 /* sel_i2c1[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1140 FN_SEL_I2C1_0, FN_SEL_I2C1_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1141 /* sel_hscif4[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1142 FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1143 /* sel_hscif3[2](0,1,2,3) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1144 FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,
1145 FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1146 /* sel_hscif1[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1147 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1148 /* reserved[1] */
1149 /* sel_hscif2[2](0,1,2) */
1150 FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
1151 FN_SEL_HSCIF2_2,
1152 /* sel_etheravb[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1153 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1154 /* sel_drif3[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1155 FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1156 /* sel_drif2[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1157 FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1158 /* sel_drif1[2](0,1,2) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1159 FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,
1160 FN_SEL_DRIF1_2,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1161 /* sel_drif0[2](0,1,2) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1162 FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,
1163 FN_SEL_DRIF0_2,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1164 /* sel_canfd0[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1165 FN_SEL_CANFD_0, FN_SEL_CANFD_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1166 /* sel_adg_a[2](0,1,2) */
1167 FN_SEL_ADG_A_0, FN_SEL_ADG_A_1,
1168 FN_SEL_ADG_A_2,
1169 /* reserved[3]*/
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1170
1171 /* MOD_SEL1 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1172 /* sel_tsif1[2](0,1,2,3) */
1173 FN_SEL_TSIF1_0, FN_SEL_TSIF1_1,
1174 FN_SEL_TSIF1_2, FN_SEL_TSIF1_3,
1175 /* sel_tsif0[3](0,1,2,3,4) */
1176 FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,
1177 FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1178 FN_SEL_TSIF0_4,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1179 /* sel_timer_tmu1[1](0,1) */
1180 FN_SEL_TIMER_TMU1_0, FN_SEL_TIMER_TMU1_1,
1181 /* sel_ssp1_1[2](0,1,2,3) */
1182 FN_SEL_SSP1_1_0, FN_SEL_SSP1_1_1,
1183 FN_SEL_SSP1_1_2, FN_SEL_SSP1_1_3,
1184 /* sel_ssp1_0[3](0,1,2,3,4) */
1185 FN_SEL_SSP1_0_0, FN_SEL_SSP1_0_1,
1186 FN_SEL_SSP1_0_2, FN_SEL_SSP1_0_3,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1187 FN_SEL_SSP1_0_4,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1188 /* sel_ssi1[1](0,1) */
1189 FN_SEL_SSI_0, FN_SEL_SSI_1,
1190 /* sel_speed_pulse_if[1](0,1) */
1191 FN_SEL_SPEED_PULSE_IF_0, FN_SEL_SPEED_PULSE_IF_1,
1192 /* sel_simcard[2](0,1,2,3) */
1193 FN_SEL_SIMCARD_0, FN_SEL_SIMCARD_1,
1194 FN_SEL_SIMCARD_2, FN_SEL_SIMCARD_3,
1195 /* sel_sdhi2[1](0,1) */
1196 FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,
1197 /* sel_scif4[2](0,1,2) */
1198 FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1199 FN_SEL_SCIF4_2,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1200 /* sel_scif3[1](0,1) */
1201 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,
1202 /* sel_scif2[1](0,1) */
1203 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1,
1204 /* sel_scif1[1](0,1) */
1205 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1,
1206 /* sel_scif[1](0,1) */
1207 FN_SEL_SCIF_0, FN_SEL_SCIF_1,
1208 /* sel_remocon[1](0,1) */
1209 FN_SEL_REMOCON_0, FN_SEL_REMOCON_1,
1210 /* reserved[8..7] */
1211 /* sel_rcan0[1](0,1) */
1212 FN_SEL_RCAN_0, FN_SEL_RCAN_1,
1213 /* sel_pwm6[1](0,1) */
1214 FN_SEL_PWM6_0, FN_SEL_PWM6_1,
1215 /* sel_pwm5[1](0,1) */
1216 FN_SEL_PWM5_0, FN_SEL_PWM5_1,
1217 /* sel_pwm4[1](0,1) */
1218 FN_SEL_PWM4_0, FN_SEL_PWM4_1,
1219 /* sel_pwm3[1](0,1) */
1220 FN_SEL_PWM3_0, FN_SEL_PWM3_1,
1221 /* sel_pwm2[1](0,1) */
1222 FN_SEL_PWM2_0, FN_SEL_PWM2_1,
1223 /* sel_pwm1[1](0,1) */
1224 FN_SEL_PWM1_0, FN_SEL_PWM1_1,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1225
1226 /* MOD_SEL2 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1227 /* i2c_sel_5[1](0,1) */
1228 FN_I2C_SEL_5_0, FN_I2C_SEL_5_1,
1229 /* i2c_sel_3[1](0,1) */
1230 FN_I2C_SEL_3_0, FN_I2C_SEL_3_1,
1231 /* i2c_sel_0[1](0,1) */
1232 FN_I2C_SEL_0_0, FN_I2C_SEL_0_1,
1233 /* sel_fm[2](0,1,2,3) */
1234 FN_SEL_FM_0, FN_SEL_FM_1,
1235 FN_SEL_FM_2, FN_SEL_FM_3,
1236 /* sel_scif5[1](0,1) */
1237 FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
1238 /* sel_i2c6[3](0,1,2) */
1239 FN_SEL_I2C6_0, FN_SEL_I2C6_1,
1240 FN_SEL_I2C6_2,
1241 /* sel_ndfc[1](0,1) */
1242 FN_SEL_NDFC_0, FN_SEL_NDFC_1,
1243 /* sel_ssi2[1](0,1) */
1244 FN_SEL_SSI2_0, FN_SEL_SSI2_1,
1245 /* sel_ssi9[1](0,1) */
1246 FN_SEL_SSI9_0, FN_SEL_SSI9_1,
1247 /* sel_timer_tmu2[1](0,1) */
1248 FN_SEL_TIMER_TMU2_0, FN_SEL_TIMER_TMU2_1,
1249 /* sel_adg_b[1](0,1) */
1250 FN_SEL_ADG_B_0, FN_SEL_ADG_B_1,
1251 /* sel_adg_c[1](0,1) */
1252 FN_SEL_ADG_C_0, FN_SEL_ADG_C_1,
1253 /* reserved[16..16] */
1254 /* reserved[15..8] */
1255 /* reserved[7..1] */
1256 /* sel_vin4[1](0,1) */
1257 FN_SEL_VIN4_0, FN_SEL_VIN4_1,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1258
1259 PINMUX_FUNCTION_END,
1260
1261 PINMUX_MARK_BEGIN,
1262
1263 /* GPSR0 */
1264 D15_GMARK,
1265 D14_GMARK,
1266 D13_GMARK,
1267 D12_GMARK,
1268 D11_GMARK,
1269 D10_GMARK,
1270 D9_GMARK,
1271 D8_GMARK,
1272 D7_GMARK,
1273 D6_GMARK,
1274 D5_GMARK,
1275 D4_GMARK,
1276 D3_GMARK,
1277 D2_GMARK,
1278 D1_GMARK,
1279 D0_GMARK,
1280
1281 /* GPSR1 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1282 CLKOUT_GMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1283 EX_WAIT0_A_GMARK,
1284 WE1x_GMARK,
1285 WE0x_GMARK,
1286 RD_WRx_GMARK,
1287 RDx_GMARK,
1288 BSx_GMARK,
1289 CS1x_A26_GMARK,
1290 CS0x_GMARK,
1291 A19_GMARK,
1292 A18_GMARK,
1293 A17_GMARK,
1294 A16_GMARK,
1295 A15_GMARK,
1296 A14_GMARK,
1297 A13_GMARK,
1298 A12_GMARK,
1299 A11_GMARK,
1300 A10_GMARK,
1301 A9_GMARK,
1302 A8_GMARK,
1303 A7_GMARK,
1304 A6_GMARK,
1305 A5_GMARK,
1306 A4_GMARK,
1307 A3_GMARK,
1308 A2_GMARK,
1309 A1_GMARK,
1310 A0_GMARK,
1311
1312 /* GPSR2 */
1313 AVB_AVTP_CAPTURE_A_GMARK,
1314 AVB_AVTP_MATCH_A_GMARK,
1315 AVB_LINK_GMARK,
1316 AVB_PHY_INT_GMARK,
1317 AVB_MAGIC_GMARK,
1318 AVB_MDC_GMARK,
1319 PWM2_A_GMARK,
1320 PWM1_A_GMARK,
1321 PWM0_GMARK,
1322 IRQ5_GMARK,
1323 IRQ4_GMARK,
1324 IRQ3_GMARK,
1325 IRQ2_GMARK,
1326 IRQ1_GMARK,
1327 IRQ0_GMARK,
1328
1329 /* GPSR3 */
1330 SD1_WP_GMARK,
1331 SD1_CD_GMARK,
1332 SD0_WP_GMARK,
1333 SD0_CD_GMARK,
1334 SD1_DAT3_GMARK,
1335 SD1_DAT2_GMARK,
1336 SD1_DAT1_GMARK,
1337 SD1_DAT0_GMARK,
1338 SD1_CMD_GMARK,
1339 SD1_CLK_GMARK,
1340 SD0_DAT3_GMARK,
1341 SD0_DAT2_GMARK,
1342 SD0_DAT1_GMARK,
1343 SD0_DAT0_GMARK,
1344 SD0_CMD_GMARK,
1345 SD0_CLK_GMARK,
1346
1347 /* GPSR4 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1348 SD3_DS_GMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1349 SD3_DAT7_GMARK,
1350 SD3_DAT6_GMARK,
1351 SD3_DAT5_GMARK,
1352 SD3_DAT4_GMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1353 SD3_DAT3_GMARK,
1354 SD3_DAT2_GMARK,
1355 SD3_DAT1_GMARK,
1356 SD3_DAT0_GMARK,
1357 SD3_CMD_GMARK,
1358 SD3_CLK_GMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1359 SD2_DS_GMARK,
1360 SD2_DAT3_GMARK,
1361 SD2_DAT2_GMARK,
1362 SD2_DAT1_GMARK,
1363 SD2_DAT0_GMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1364 SD2_CMD_GMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1365 SD2_CLK_GMARK,
1366
1367 /* GPSR5 */
1368 MLB_DAT_GMARK,
1369 MLB_SIG_GMARK,
1370 MLB_CLK_GMARK,
1371 MSIOF0_RXD_MARK,
1372 MSIOF0_SS2_GMARK,
1373 MSIOF0_TXD_MARK,
1374 MSIOF0_SS1_GMARK,
1375 MSIOF0_SYNC_GMARK,
1376 MSIOF0_SCK_MARK,
1377 HRTS0x_GMARK,
1378 HCTS0x_GMARK,
1379 HTX0_GMARK,
1380 HRX0_GMARK,
1381 HSCK0_GMARK,
1382 RX2_A_GMARK,
1383 TX2_A_GMARK,
1384 SCK2_GMARK,
1385 RTS1x_TANS_GMARK,
1386 CTS1x_GMARK,
1387 TX1_A_GMARK,
1388 RX1_A_GMARK,
1389 RTS0x_TANS_GMARK,
1390 CTS0x_GMARK,
1391 TX0_GMARK,
1392 RX0_GMARK,
1393 SCK0_GMARK,
1394
1395 /* GPSR6 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1396 USB3_OVC_GMARK,
1397 USB3_PWEN_GMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1398 USB30_OVC_GMARK,
1399 USB30_PWEN_GMARK,
1400 USB1_OVC_GMARK,
1401 USB1_PWEN_GMARK,
1402 USB0_OVC_GMARK,
1403 USB0_PWEN_GMARK,
1404 AUDIO_CLKB_B_GMARK,
1405 AUDIO_CLKA_A_GMARK,
1406 SSI_SDATA9_A_GMARK,
1407 SSI_SDATA8_GMARK,
1408 SSI_SDATA7_GMARK,
1409 SSI_WS78_GMARK,
1410 SSI_SCK78_GMARK,
1411 SSI_SDATA6_GMARK,
1412 SSI_WS6_GMARK,
1413 SSI_SCK6_GMARK,
1414 SSI_SDATA5_MARK,
1415 SSI_WS5_MARK,
1416 SSI_SCK5_MARK,
1417 SSI_SDATA4_GMARK,
1418 SSI_WS4_GMARK,
1419 SSI_SCK4_GMARK,
1420 SSI_SDATA3_GMARK,
1421 SSI_WS34_GMARK,
1422 SSI_SCK34_GMARK,
1423 SSI_SDATA2_A_GMARK,
1424 SSI_SDATA1_A_GMARK,
1425 SSI_SDATA0_GMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1426 SSI_WS01239_GMARK,
1427 SSI_SCK01239_GMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1428
1429 /* GPSR7 */
1430 HDMI1_CEC_MARK,
1431 HDMI0_CEC_MARK,
1432 AVS2_MARK,
1433 AVS1_MARK,
1434
1435 /* IPSR0 */
1436 AVB_MDC_IMARK,
1437 MSIOF2_SS2_C_MARK,
1438 AVB_MAGIC_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1439 MSIOF2_SS1_C_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1440 SCK4_A_MARK,
1441 AVB_PHY_INT_IMARK,
1442 MSIOF2_SYNC_C_MARK,
1443 RX4_A_MARK,
1444 AVB_LINK_IMARK,
1445 MSIOF2_SCK_C_MARK,
1446 TX4_A_MARK,
1447 AVB_AVTP_MATCH_A_IMARK,
1448 MSIOF2_RXD_C_MARK,
1449 CTS4x_A_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1450 FSCLKST2x_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1451 AVB_AVTP_CAPTURE_A_IMARK,
1452 MSIOF2_TXD_C_MARK,
1453 RTS4x_TANS_A_MARK,
1454 IRQ0_IMARK,
1455 QPOLB_MARK,
1456 DU_CDE_MARK,
1457 VI4_DATA0_B_MARK,
1458 CAN0_TX_B_MARK,
1459 CANFD0_TX_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1460 MSIOF3_SS2_E_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1461 IRQ1_IMARK,
1462 QPOLA_MARK,
1463 DU_DISP_MARK,
1464 VI4_DATA1_B_MARK,
1465 CAN0_RX_B_MARK,
1466 CANFD0_RX_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1467 MSIOF3_SS1_E_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1468
1469 /* IPSR1 */
1470 IRQ2_IMARK,
1471 QCPV_QDE_MARK,
1472 DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
1473 VI4_DATA2_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1474 MSIOF3_SYNC_E_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1475 PWM3_B_MARK,
1476 IRQ3_IMARK,
1477 QSTVB_QVE_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1478 DU_DOTCLKOUT1_MARK,
1479 VI4_DATA3_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1480 MSIOF3_SCK_E_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1481 PWM4_B_MARK,
1482 IRQ4_IMARK,
1483 QSTH_QHS_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1484 DU_EXHSYNC_DU_HSYNC_MARK,
1485 VI4_DATA4_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1486 MSIOF3_RXD_E_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1487 PWM5_B_MARK,
1488 IRQ5_IMARK,
1489 QSTB_QHE_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1490 DU_EXVSYNC_DU_VSYNC_MARK,
1491 VI4_DATA5_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1492 FSCLKST2x_B_MARK,
1493 MSIOF3_TXD_E_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1494 PWM6_B_MARK,
1495 PWM0_IMARK,
1496 AVB_AVTP_PPS_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1497 VI4_DATA6_B_MARK,
1498 IECLK_B_MARK,
1499 PWM1_A_IMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1500 HRX3_D_MARK,
1501 VI4_DATA7_B_MARK,
1502 IERX_B_MARK,
1503 PWM2_A_IMARK,
1504 PWMFSW0_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1505 HTX3_D_MARK,
1506 IETX_B_MARK,
1507 A0_IMARK,
1508 LCDOUT16_MARK,
1509 MSIOF3_SYNC_B_MARK,
1510 VI4_DATA8_MARK,
1511 DU_DB0_MARK,
1512 PWM3_A_MARK,
1513
1514 /* IPSR2 */
1515 A1_IMARK,
1516 LCDOUT17_MARK,
1517 MSIOF3_TXD_B_MARK,
1518 VI4_DATA9_MARK,
1519 DU_DB1_MARK,
1520 PWM4_A_MARK,
1521 A2_IMARK,
1522 LCDOUT18_MARK,
1523 MSIOF3_SCK_B_MARK,
1524 VI4_DATA10_MARK,
1525 DU_DB2_MARK,
1526 PWM5_A_MARK,
1527 A3_IMARK,
1528 LCDOUT19_MARK,
1529 MSIOF3_RXD_B_MARK,
1530 VI4_DATA11_MARK,
1531 DU_DB3_MARK,
1532 PWM6_A_MARK,
1533 A4_IMARK,
1534 LCDOUT20_MARK,
1535 MSIOF3_SS1_B_MARK,
1536 VI4_DATA12_MARK,
1537 VI5_DATA12_MARK,
1538 DU_DB4_MARK,
1539 A5_IMARK,
1540 LCDOUT21_MARK,
1541 MSIOF3_SS2_B_MARK,
1542 SCK4_B_MARK,
1543 VI4_DATA13_MARK,
1544 VI5_DATA13_MARK,
1545 DU_DB5_MARK,
1546 A6_IMARK,
1547 LCDOUT22_MARK,
1548 MSIOF2_SS1_A_MARK,
1549 RX4_B_MARK,
1550 VI4_DATA14_MARK,
1551 VI5_DATA14_MARK,
1552 DU_DB6_MARK,
1553 A7_IMARK,
1554 LCDOUT23_MARK,
1555 MSIOF2_SS2_A_MARK,
1556 TX4_B_MARK,
1557 VI4_DATA15_MARK,
1558 V15_DATA15_MARK,
1559 DU_DB7_MARK,
1560 A8_IMARK,
1561 RX3_B_MARK,
1562 MSIOF2_SYNC_A_MARK,
1563 HRX4_B_MARK,
1564 SDA6_A_MARK,
1565 AVB_AVTP_MATCH_B_MARK,
1566 PWM1_B_MARK,
1567
1568 /* IPSR3 */
1569 A9_IMARK,
1570 MSIOF2_SCK_A_MARK,
1571 CTS4x_B_MARK,
1572 VI5_VSYNCx_MARK,
1573 A10_IMARK,
1574 MSIOF2_RXD_A_MARK,
1575 RTS4n_TANS_B_MARK,
1576 VI5_HSYNCx_MARK,
1577 A11_IMARK,
1578 TX3_B_MARK,
1579 MSIOF2_TXD_A_MARK,
1580 HTX4_B_MARK,
1581 HSCK4_MARK,
1582 VI5_FIELD_MARK,
1583 SCL6_A_MARK,
1584 AVB_AVTP_CAPTURE_B_MARK,
1585 PWM2_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1586 A12_IMARK,
1587 LCDOUT12_MARK,
1588 MSIOF3_SCK_C_MARK,
1589 HRX4_A_MARK,
1590 VI5_DATA8_MARK,
1591 DU_DG4_MARK,
1592 A13_IMARK,
1593 LCDOUT13_MARK,
1594 MSIOF3_SYNC_C_MARK,
1595 HTX4_A_MARK,
1596 VI5_DATA9_MARK,
1597 DU_DG5_MARK,
1598 A14_IMARK,
1599 LCDOUT14_MARK,
1600 MSIOF3_RXD_C_MARK,
1601 HCTS4x_MARK,
1602 VI5_DATA10_MARK,
1603 DU_DG6_MARK,
1604 A15_IMARK,
1605 LCDOUT15_MARK,
1606 MSIOF3_TXD_C_MARK,
1607 HRTS4x_MARK,
1608 VI5_DATA11_MARK,
1609 DU_DG7_MARK,
1610 A16_IMARK,
1611 LCDOUT8_MARK,
1612 VI4_FIELD_MARK,
1613 DU_DG0_MARK,
1614
1615 /* IPSR4 */
1616 A17_IMARK,
1617 LCDOUT9_MARK,
1618 VI4_VSYNCx_MARK,
1619 DU_DG1_MARK,
1620 A18_IMARK,
1621 LCDOUT10_MARK,
1622 VI4_HSYNCx_MARK,
1623 DU_DG2_MARK,
1624 A19_IMARK,
1625 LCDOUT11_MARK,
1626 VI4_CLKENB_MARK,
1627 DU_DG3_MARK,
1628 CS0x_IMARK,
1629 VI5_CLKENB_MARK,
1630 CS1x_A26_IMARK,
1631 VI5_CLK_MARK,
1632 EX_WAIT0_B_MARK,
1633 BSx_IMARK,
1634 QSTVA_QVS_MARK,
1635 MSIOF3_SCK_D_MARK,
1636 SCK3_MARK,
1637 HSCK3_MARK,
1638 CAN1_TX_MARK,
1639 CANFD1_TX_MARK,
1640 IETX_A_MARK,
1641 RDx_IMARK,
1642 MSIOF3_SYNC_D_MARK,
1643 RX3_A_MARK,
1644 HRX3_A_MARK,
1645 CAN0_TX_A_MARK,
1646 CANFD0_TX_A_MARK,
1647 RD_WRx_IMARK,
1648 MSIOF3_RXD_D_MARK,
1649 TX3_A_MARK,
1650 HTX3_A_MARK,
1651 CAN0_RX_A_MARK,
1652 CANFD0_RX_A_MARK,
1653
1654 /* IPSR5 */
1655 WE0x_IMARK,
1656 MSIIOF3_TXD_D_MARK,
1657 CTS3x_MARK,
1658 HCTS3x_MARK,
1659 SCL6_B_MARK,
1660 CAN_CLK_MARK,
1661 IECLK_A_MARK,
1662 WE1x_IMARK,
1663 MSIOF3_SS1_D_MARK,
1664 RTS3x_TANS_MARK,
1665 HRTS3x_MARK,
1666 SDA6_B_MARK,
1667 CAN1_RX_MARK,
1668 CANFD1_RX_MARK,
1669 IERX_A_MARK,
1670 EX_WAIT0_A_IMARK,
1671 QCLK_MARK,
1672 VI4_CLK_MARK,
1673 DU_DOTCLKOUT0_MARK,
1674 D0_IMARK,
1675 MSIOF2_SS1_B_MARK,
1676 MSIOF3_SCK_A_MARK,
1677 VI4_DATA16_MARK,
1678 VI5_DATA0_MARK,
1679 D1_IMARK,
1680 MSIOF2_SS2_B_MARK,
1681 MSIOF3_SYNC_A_MARK,
1682 VI4_DATA17_MARK,
1683 VI5_DATA1_MARK,
1684 D2_IMARK,
1685 MSIOF3_RXD_A_MARK,
1686 VI4_DATA18_MARK,
1687 VI5_DATA2_MARK,
1688 D3_IMARK,
1689 MSIOF3_TXD_A_MARK,
1690 VI4_DATA19_MARK,
1691 VI5_DATA3_MARK,
1692 D4_IMARK,
1693 MSIOF2_SCK_B_MARK,
1694 VI4_DATA20_MARK,
1695 VI5_DATA4_MARK,
1696
1697 /* IPSR6 */
1698 D5_IMARK,
1699 MSIOF2_SYNC_B_MARK,
1700 VI4_DATA21_MARK,
1701 VI5_DATA5_MARK,
1702 D6_IMARK,
1703 MSIOF2_RXD_B_MARK,
1704 VI4_DATA22_MARK,
1705 VI5_DATA6_MARK,
1706 D7_IMARK,
1707 MSIOF2_TXD_B_MARK,
1708 VI4_DATA23_MARK,
1709 VI5_DATA7_MARK,
1710 D8_IMARK,
1711 LCDOUT0_MARK,
1712 MSIOF2_SCK_D_MARK,
1713 SCK4_C_MARK,
1714 VI4_DATA0_A_MARK,
1715 DU_DR0_MARK,
1716 D9_IMARK,
1717 LCDOUT1_MARK,
1718 MSIOF2_SYNC_D_MARK,
1719 VI4_DATA1_A_MARK,
1720 DU_DR1_MARK,
1721 D10_IMARK,
1722 LCDOUT2_MARK,
1723 MSIOF2_RXD_D_MARK,
1724 HRX3_B_MARK,
1725 VI4_DATA2_A_MARK,
1726 CTS4x_C_MARK,
1727 DU_DR2_MARK,
1728 D11_IMARK,
1729 LCDOUT3_MARK,
1730 MSIOF2_TXD_D_MARK,
1731 HTX3_B_MARK,
1732 VI4_DATA3_A_MARK,
1733 RTS4x_TANS_C_MARK,
1734 DU_DR3_MARK,
1735 D12_IMARK,
1736 LCDOUT4_MARK,
1737 MSIOF2_SS1_D_MARK,
1738 RX4_C_MARK,
1739 VI4_DATA4_A_MARK,
1740 DU_DR4_MARK,
1741
1742 /* IPSR7 */
1743 D13_IMARK,
1744 LCDOUT5_MARK,
1745 MSIOF2_SS2_D_MARK,
1746 TX4_C_MARK,
1747 VI4_DATA5_A_MARK,
1748 DU_DR5_MARK,
1749 D14_IMARK,
1750 LCDOUT6_MARK,
1751 MSIOF3_SS1_A_MARK,
1752 HRX3_C_MARK,
1753 VI4_DATA6_A_MARK,
1754 DU_DR6_MARK,
1755 SCL6_C_MARK,
1756 D15_IMARK,
1757 LCDOUT7_MARK,
1758 MSIOF3_SS2_A_MARK,
1759 HTX3_C_MARK,
1760 VI4_DATA7_A_MARK,
1761 DU_DR7_MARK,
1762 SDA6_C_MARK,
1763 FSCLKST_MARK,
1764 SD0_CLK_IMARK,
1765 MSIOF1_SCK_E_MARK,
1766 STP_OPWM_0_B_MARK,
1767 SD0_CMD_IMARK,
1768 MSIOF1_SYNC_E_MARK,
1769 STP_IVCXO27_0_B_MARK,
1770 SD0_DAT0_IMARK,
1771 MSIOF1_RXD_E_MARK,
1772 TS_SCK0_B_MARK,
1773 STP_ISCLK_0_B_MARK,
1774 SD0_DAT1_IMARK,
1775 MSIOF1_TXD_E_MARK,
1776 TS_SPSYNC0_B_MARK,
1777 STP_ISSYNC_0_B_MARK,
1778
1779 /* IPSR8 */
1780 SD0_DAT2_IMARK,
1781 MSIOF1_SS1_E_MARK,
1782 TS_SDAT0_B_MARK,
1783 STP_ISD_0_B_MARK,
1784 SD0_DAT3_IMARK,
1785 MSIOF1_SS2_E_MARK,
1786 TS_SDEN0_B_MARK,
1787 STP_ISEN_0_B_MARK,
1788 SD1_CLK_IMARK,
1789 MSIOF1_SCK_G_MARK,
1790 SIM0_CLK_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1791 SD1_CMD_IMARK,
1792 MSIOF1_SYNC_G_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1793 NFCEx_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1794 SIM0_D_A_MARK,
1795 STP_IVCXO27_1_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1796 SD1_DAT0_IMARK,
1797 SD2_DAT4_MARK,
1798 MSIOF1_RXD_G_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1799 NFWPx_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1800 TS_SCK1_B_MARK,
1801 STP_ISCLK_1_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1802 SD1_DAT1_IMARK,
1803 SD2_DAT5_MARK,
1804 MSIOF1_TXD_G_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1805 NFDATA14_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1806 TS_SPSYNC1_B_MARK,
1807 STP_ISSYNC_1_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1808 SD1_DAT2_IMARK,
1809 SD2_DAT6_MARK,
1810 MSIOF1_SS1_G_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1811 NFDATA15_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1812 TS_SDAT1_B_MARK,
1813 STP_IOD_1_B_MARK,
1814 SD1_DAT3_IMARK,
1815 SD2_DAT7_MARK,
1816 MSIOF1_SS2_G_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1817 NFRBx_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1818 TS_SDEN1_B_MARK,
1819 STP_ISEN_1_B_MARK,
1820
1821 /* IPSR9 */
1822 SD2_CLK_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1823 NFDATA8_MARK,
1824 SD2_CMD_IMARK,
1825 NFDATA9_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1826 SD2_DAT0_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1827 NFDATA10_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1828 SD2_DAT1_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1829 NFDATA11_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1830 SD2_DAT2_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1831 NFDATA12_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1832 SD2_DAT3_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1833 NFDATA13_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1834 SD2_DS_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1835 NFALE_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1836 SATA_DEVSLP_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1837 SD3_CLK_IMARK,
1838 NFWEx_MARK,
1839
1840 /* IPSR10 */
1841 SD3_CMD_IMARK,
1842 NFREx_MARK,
1843 SD3_DAT0_IMARK,
1844 NFDATA0_MARK,
1845 SD3_DAT1_IMARK,
1846 NFDATA1_MARK,
1847 SD3_DAT2_IMARK,
1848 NFDATA2_MARK,
1849 SD3_DAT3_IMARK,
1850 NFDATA3_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1851 SD3_DAT4_IMARK,
1852 SD2_CD_A_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1853 NFDATA4_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1854 SD3_DAT5_IMARK,
1855 SD2_WP_A_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1856 NFDATA5_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1857 SD3_DAT6_IMARK,
1858 SD3_CD_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1859 NFDATA6_MARK,
1860
1861 /* IPSR11 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1862 SD3_DAT7_IMARK,
1863 SD3_WP_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1864 NFDATA7_MARK,
1865 SD3_DS_IMARK,
1866 NFCLE_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1867 SD0_CD_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1868 NFDATA14_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1869 SCL2_B_MARK,
1870 SIM0_RST_A_MARK,
1871 SD0_WP_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1872 NFDATA15_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1873 SDA2_B_MARK,
1874 SD1_CD_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1875 NFRBx_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1876 SIM0_CLK_B_MARK,
1877 SD1_WP_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1878 NFCEx_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1879 SIM0_D_B_MARK,
1880 SCK0_IMARK,
1881 HSCK1_B_MARK,
1882 MSIOF1_SS2_B_MARK,
1883 AUDIO_CLKC_B_MARK,
1884 SDA2_A_MARK,
1885 SIM0_RST_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1886 STP_OPWM_0_C_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1887 RIF0_CLK_B_MARK,
1888 ADICHS2_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1889 SCK5_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1890 RX0_IMARK,
1891 HRX1_B_MARK,
1892 TS_SCK0_C_MARK,
1893 STP_ISCLK_0_C_MARK,
1894 RIF0_D0_B_MARK,
1895
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1896 /* IPSR12 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1897 TX0_IMARK,
1898 HTX1_B_MARK,
1899 TS_SPSYNC0_C_MARK,
1900 STP_ISSYNC_0_C_MARK,
1901 RIF0_D1_B_MARK,
1902 CTS0x_IMARK,
1903 HCTS1x_B_MARK,
1904 MSIOF1_SYNC_B_MARK,
1905 TS_SPSYNC1_C_MARK,
1906 STP_ISSYNC_1_C_MARK,
1907 RIF1_SYNC_B_MARK,
1908 AUDIO_CLKOUT_C_MARK,
1909 ADICS_SAMP_MARK,
1910 RTS0x_TANS_IMARK,
1911 HRTS1x_B_MARK,
1912 MSIOF1_SS1_B_MARK,
1913 AUDIO_CLKA_B_MARK,
1914 SCL2_A_MARK,
1915 STP_IVCXO27_1_C_MARK,
1916 RIF0_SYNC_B_MARK,
1917 ADICHS1_MARK,
1918 RX1_A_IMARK,
1919 HRX1_A_MARK,
1920 TS_SDAT0_C_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1921 STP_ISD_0_C_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1922 RIF1_CLK_C_MARK,
1923 TX1_A_IMARK,
1924 HTX1_A_MARK,
1925 TS_SDEN0_C_MARK,
1926 STP_ISEN_0_C_MARK,
1927 RIF1_D0_C_MARK,
1928 CTS1x_IMARK,
1929 HCTS1x_A_MARK,
1930 MSIOF1_RXD_B_MARK,
1931 TS_SDEN1_C_MARK,
1932 STP_ISEN_1_C_MARK,
1933 RIF1_D0_B_MARK,
1934 ADIDATA_MARK,
1935 RTS1x_TANS_IMARK,
1936 HRTS1x_A_MARK,
1937 MSIOF1_TXD_B_MARK,
1938 TS_SDAT1_C_MARK,
1939 STP_ISD_1_C_MARK,
1940 RIF1_D1_B_MARK,
1941 ADICHS0_MARK,
1942 SCK2_IMARK,
1943 SCIF_CLK_B_MARK,
1944 MSIOF1_SCK_B_MARK,
1945 TS_SCK1_C_MARK,
1946 STP_ISCLK_1_C_MARK,
1947 RIF1_CLK_B_MARK,
1948 ADICLK_MARK,
1949
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1950 /* IPSR13 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1951 TX2_A_IMARK,
1952 SD2_CD_B_MARK,
1953 SCL1_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1954 FMCLK_A_MARK,
1955 RIF1_D1_C_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1956 FSO_CFE_0x_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1957 RX2_A_IMARK,
1958 SD2_WP_B_MARK,
1959 SDA1_A_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1960 FMIN_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1961 RIF1_SYNC_C_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1962 FSO_CFE_1x_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1963 HSCK0_IMARK,
1964 MSIOF1_SCK_D_MARK,
1965 AUDIO_CLKB_A_MARK,
1966 SSI_SDATA1_B_MARK,
1967 TS_SCK0_D_MARK,
1968 STP_ISCLK_0_D_MARK,
1969 RIF0_CLK_C_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1970 RX5_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1971 HRX0_IMARK,
1972 MSIOF1_RXD_D_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]1973 SSI_SDATA2_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1974 TS_SDEN0_D_MARK,
1975 STP_ISEN_0_D_MARK,
1976 RIF0_D0_C_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1977 HTX0_IMARK,
1978 MSIOF1_TXD_D_MARK,
1979 SSI_SDATA9_B_MARK,
1980 TS_SDAT0_D_MARK,
1981 STP_ISD_0_D_MARK,
1982 RIF0_D1_C_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1983 HCTS0x_IMARK,
1984 RX2_B_MARK,
1985 MSIOF1_SYNC_D_MARK,
1986 SSI_SCK9_A_MARK,
1987 TS_SPSYNC0_D_MARK,
1988 STP_ISSYNC_0_D_MARK,
1989 RIF0_SYNC_C_MARK,
1990 AUDIO_CLKOUT1_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]1991 HRTS0x_IMARK,
1992 TX2_B_MARK,
1993 MSIOF1_SS1_D_MARK,
1994 SSI_WS9_A_MARK,
1995 STP_IVCXO27_0_D_MARK,
1996 BPFCLK_A_MARK,
1997 AUDIO_CLKOUT2_A_MARK,
1998 MSIOF0_SYNC_IMARK,
1999 AUDIO_CLKOUT_A_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2000 TX5_B_MARK,
2001 BPFCLK_D_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2002
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2003 /* IPSR14 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2004 MSIOF0_SS1_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2005 RX5_A_MARK,
2006 NFWPx_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2007 AUDIO_CLKA_C_MARK,
2008 SSI_SCK2_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2009 STP_IVCXO27_0_C_MARK,
2010 AUDIO_CLKOUT3_A_MARK,
2011 TCLK1_B_MARK,
2012 MSIOF0_SS2_IMARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2013 TX5_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2014 MSIOF1_SS2_D_MARK,
2015 AUDIO_CLKC_A_MARK,
2016 SSI_WS2_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2017 STP_OPWM_0_D_MARK,
2018 AUDIO_CLKOUT_D_MARK,
2019 SPEEDIN_B_MARK,
2020 MLB_CLK_IMARK,
2021 MSIOF1_SCK_F_MARK,
2022 SCL1_B_MARK,
2023 MLB_SIG_IMARK,
2024 RX1_B_MARK,
2025 MSIOF1_SYNC_F_MARK,
2026 SDA1_B_MARK,
2027 MLB_DAT_IMARK,
2028 TX1_B_MARK,
2029 MSIOF1_RXD_F_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2030 SSI_SCK01239_IMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2031 MSIOF1_TXD_F_MARK,
2032 MOUT0_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2033 SSI_WS01239_IMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2034 MSIOF1_SS1_F_MARK,
2035 MOUT1_MARK,
2036 SSI_SDATA0_IMARK,
2037 MSIOF1_SS2_F_MARK,
2038 MOUT2_MARK,
2039
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2040 /* IPSR15 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2041 SSI_SDATA1_A_IMARK,
2042 MOUT5_MARK,
2043 SSI_SDATA2_A_IMARK,
2044 SSI_SCK1_B_MARK,
2045 MOUT6_MARK,
2046 SSI_SCK34_IMARK,
2047 MSIOF1_SS1_A_MARK,
2048 STP_OPWM_0_A_MARK,
2049 SSI_WS34_IMARK,
2050 HCTS2x_A_MARK,
2051 MSIOF1_SS2_A_MARK,
2052 STP_IVCXO27_0_A_MARK,
2053 SSI_SDATA3_IMARK,
2054 HRTS2x_A_MARK,
2055 MSIOF1_TXD_A_MARK,
2056 TS_SCK0_A_MARK,
2057 STP_ISCLK_0_A_MARK,
2058 RIF0_D1_A_MARK,
2059 RIF2_D0_A_MARK,
2060 SSI_SCK4_IMARK,
2061 HRX2_A_MARK,
2062 MSIOF1_SCK_A_MARK,
2063 TS_SDAT0_A_MARK,
2064 STP_ISD_0_A_MARK,
2065 RIF0_CLK_A_MARK,
2066 RIF2_CLK_A_MARK,
2067 SSI_WS4_IMARK,
2068 HTX2_A_MARK,
2069 MSIOF1_SYNC_A_MARK,
2070 TS_SDEN0_A_MARK,
2071 STP_ISEN_0_A_MARK,
2072 RIF0_SYNC_A_MARK,
2073 RIF2_SYNC_A_MARK,
2074 SSI_SDATA4_IMARK,
2075 HSCK2_A_MARK,
2076 MSIOF1_RXD_A_MARK,
2077 TS_SPSYNC0_A_MARK,
2078 STP_ISSYNC_0_A_MARK,
2079 RIF0_D0_A_MARK,
2080 RIF2_D1_A_MARK,
2081
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2082 /* IPSR16 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2083 SSI_SCK6_IMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2084 SIM0_RST_D_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2085 SSI_WS6_IMARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2086 SIM0_D_D_MARK,
2087 SSI_SDATA6_IMARK,
2088 SIM0_CLK_D_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2089 SATA_DEVSLP_A_MARK,
2090 SSI_SCK78_IMARK,
2091 HRX2_B_MARK,
2092 MSIOF1_SCK_C_MARK,
2093 TS_SCK1_A_MARK,
2094 STP_ISCLK_1_A_MARK,
2095 RIF1_CLK_A_MARK,
2096 RIF3_CLK_A_MARK,
2097 SSI_WS78_IMARK,
2098 HTX2_B_MARK,
2099 MSIOF1_SYNC_C_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2100 TS_SDAT1_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2101 STP_ISD_1_A_MARK,
2102 RIF1_SYNC_A_MARK,
2103 RIF3_SYNC_A_MARK,
2104 SSI_SDATA7_IMARK,
2105 HCTS2x_B_MARK,
2106 MSIOF1_RXD_C_MARK,
2107 TS_SDEN1_A_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2108 STP_ISEN_1_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2109 RIF1_D0_A_MARK,
2110 RIF3_D0_A_MARK,
2111 TCLK2_A_MARK,
2112 SSI_SDATA8_IMARK,
2113 HRTS2x_B_MARK,
2114 MSIOF1_TXD_C_MARK,
2115 TS_SPSYNC1_A_MARK,
2116 STP_ISSYNC_1_A_MARK,
2117 RIF1_D1_A_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2118 RIF3_D1_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2119 SSI_SDATA9_A_IMARK,
2120 HSCK2_B_MARK,
2121 MSIOF1_SS1_C_MARK,
2122 HSCK1_A_MARK,
2123 SSI_WS1_B_MARK,
2124 SCK1_MARK,
2125 STP_IVCXO27_1_A_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2126 SCK5_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2127
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2128 /* IPSR17 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2129 AUDIO_CLKA_A_IMARK,
2130 CC5_OSCOUT_MARK,
2131 AUDIO_CLKB_B_IMARK,
2132 SCIF_CLK_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2133 STP_IVCXO27_1_D_MARK,
2134 REMOCON_A_MARK,
2135 TCLK1_A_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2136 USB0_PWEN_IMARK,
2137 SIM0_RST_C_MARK,
2138 TS_SCK1_D_MARK,
2139 STP_ISCLK_1_D_MARK,
2140 BPFCLK_B_MARK,
2141 RIF3_CLK_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2142 HSCK2_C_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2143 USB0_OVC_IMARK,
2144 SIM0_D_C_MARK,
2145 TS_SDAT1_D_MARK,
2146 STP_ISD_1_D_MARK,
2147 RIF3_SYNC_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2148 HRX2_C_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2149 USB1_PWEN_IMARK,
2150 SIM0_CLK_C_MARK,
2151 SSI_SCK1_A_MARK,
2152 TS_SCK0_E_MARK,
2153 STP_ISCLK_0_E_MARK,
2154 FMCLK_B_MARK,
2155 RIF2_CLK_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2156 SPEEDIN_A_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2157 HTX2_C_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2158 USB1_OVC_IMARK,
2159 MSIOF1_SS2_C_MARK,
2160 SSI_WS1_A_MARK,
2161 TS_SDAT0_E_MARK,
2162 STP_ISD_0_E_MARK,
2163 FMIN_B_MARK,
2164 RIF2_SYNC_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2165 REMOCON_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2166 HCTS2x_C_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2167 USB30_PWEN_IMARK,
2168 AUDIO_CLKOUT_B_MARK,
2169 SSI_SCK2_B_MARK,
2170 TS_SDEN1_D_MARK,
2171 STP_ISEN_1_D_MARK,
2172 STP_OPWM_0_E_MARK,
2173 RIF3_D0_B_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2174 TCLK2_B_MARK,
2175 TPU0TO0_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2176 BPFCLK_C_MARK,
2177 HRTS2x_C_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2178 USB30_OVC_IMARK,
2179 AUDIO_CLKOUT1_B_MARK,
2180 SSI_WS2_B_MARK,
2181 TS_SPSYNC1_D_MARK,
2182 STP_ISSYNC_1_D_MARK,
2183 STP_IVCXO27_0_E_MARK,
2184 RIF3_D1_B_MARK,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2185 FSO_TOEx_MARK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2186 TPU0TO1_MARK,
2187
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2188 PINMUX_MARK_END,
2189};
2190
2191static pinmux_enum_t pinmux_data[] = {
2192 PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
2193
2194 /* GPSR0 */
2195 PINMUX_DATA(D15_GMARK, GFN_D15),
2196 PINMUX_DATA(D14_GMARK, GFN_D14),
2197 PINMUX_DATA(D13_GMARK, GFN_D13),
2198 PINMUX_DATA(D12_GMARK, GFN_D12),
2199 PINMUX_DATA(D11_GMARK, GFN_D11),
2200 PINMUX_DATA(D10_GMARK, GFN_D10),
2201 PINMUX_DATA(D9_GMARK, GFN_D9),
2202 PINMUX_DATA(D8_GMARK, GFN_D8),
2203 PINMUX_DATA(D7_GMARK, GFN_D7),
2204 PINMUX_DATA(D6_GMARK, GFN_D6),
2205 PINMUX_DATA(D5_GMARK, GFN_D5),
2206 PINMUX_DATA(D4_GMARK, GFN_D4),
2207 PINMUX_DATA(D3_GMARK, GFN_D3),
2208 PINMUX_DATA(D2_GMARK, GFN_D2),
2209 PINMUX_DATA(D1_GMARK, GFN_D1),
2210 PINMUX_DATA(D0_GMARK, GFN_D0),
2211
2212 /* GPSR1 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2213 PINMUX_DATA(CLKOUT_GMARK, GFN_CLKOUT),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2214 PINMUX_DATA(EX_WAIT0_A_GMARK, GFN_EX_WAIT0_A),
2215 PINMUX_DATA(WE1x_GMARK, GFN_WE1x),
2216 PINMUX_DATA(WE0x_GMARK, GFN_WE0x),
2217 PINMUX_DATA(RD_WRx_GMARK, GFN_RD_WRx),
2218 PINMUX_DATA(RDx_GMARK, GFN_RDx),
2219 PINMUX_DATA(BSx_GMARK, GFN_BSx),
2220 PINMUX_DATA(CS1x_A26_GMARK, GFN_CS1x_A26),
2221 PINMUX_DATA(CS0x_GMARK, GFN_CS0x),
2222 PINMUX_DATA(A19_GMARK, GFN_A19),
2223 PINMUX_DATA(A18_GMARK, GFN_A18),
2224 PINMUX_DATA(A17_GMARK, GFN_A17),
2225 PINMUX_DATA(A16_GMARK, GFN_A16),
2226 PINMUX_DATA(A15_GMARK, GFN_A15),
2227 PINMUX_DATA(A14_GMARK, GFN_A14),
2228 PINMUX_DATA(A13_GMARK, GFN_A13),
2229 PINMUX_DATA(A12_GMARK, GFN_A12),
2230 PINMUX_DATA(A11_GMARK, GFN_A11),
2231 PINMUX_DATA(A10_GMARK, GFN_A10),
2232 PINMUX_DATA(A9_GMARK, GFN_A9),
2233 PINMUX_DATA(A8_GMARK, GFN_A8),
2234 PINMUX_DATA(A7_GMARK, GFN_A7),
2235 PINMUX_DATA(A6_GMARK, GFN_A6),
2236 PINMUX_DATA(A5_GMARK, GFN_A5),
2237 PINMUX_DATA(A4_GMARK, GFN_A4),
2238 PINMUX_DATA(A3_GMARK, GFN_A3),
2239 PINMUX_DATA(A2_GMARK, GFN_A2),
2240 PINMUX_DATA(A1_GMARK, GFN_A1),
2241 PINMUX_DATA(A0_GMARK, GFN_A0),
2242
2243 /* GPSR2 */
2244 PINMUX_DATA(AVB_AVTP_CAPTURE_A_GMARK, GFN_AVB_AVTP_CAPTURE_A),
2245 PINMUX_DATA(AVB_AVTP_MATCH_A_GMARK, GFN_AVB_AVTP_MATCH_A),
2246 PINMUX_DATA(AVB_LINK_GMARK, GFN_AVB_LINK),
2247 PINMUX_DATA(AVB_PHY_INT_GMARK, GFN_AVB_PHY_INT),
2248 PINMUX_DATA(AVB_MAGIC_GMARK, GFN_AVB_MAGIC),
2249 PINMUX_DATA(AVB_MDC_GMARK, GFN_AVB_MDC),
2250 PINMUX_DATA(PWM2_A_GMARK, GFN_PWM2_A),
2251 PINMUX_DATA(PWM1_A_GMARK, GFN_PWM1_A),
2252 PINMUX_DATA(PWM0_GMARK, GFN_PWM0),
2253 PINMUX_DATA(IRQ5_GMARK, GFN_IRQ5),
2254 PINMUX_DATA(IRQ4_GMARK, GFN_IRQ4),
2255 PINMUX_DATA(IRQ3_GMARK, GFN_IRQ3),
2256 PINMUX_DATA(IRQ2_GMARK, GFN_IRQ2),
2257 PINMUX_DATA(IRQ1_GMARK, GFN_IRQ1),
2258 PINMUX_DATA(IRQ0_GMARK, GFN_IRQ0),
2259
2260 /* GPSR3 */
2261 PINMUX_DATA(SD1_WP_GMARK, GFN_SD1_WP),
2262 PINMUX_DATA(SD1_CD_GMARK, GFN_SD1_CD),
2263 PINMUX_DATA(SD0_WP_GMARK, GFN_SD0_WP),
2264 PINMUX_DATA(SD0_CD_GMARK, GFN_SD0_CD),
2265 PINMUX_DATA(SD1_DAT3_GMARK, GFN_SD1_DAT3),
2266 PINMUX_DATA(SD1_DAT2_GMARK, GFN_SD1_DAT2),
2267 PINMUX_DATA(SD1_DAT1_GMARK, GFN_SD1_DAT1),
2268 PINMUX_DATA(SD1_DAT0_GMARK, GFN_SD1_DAT0),
2269 PINMUX_DATA(SD1_CMD_GMARK, GFN_SD1_CMD),
2270 PINMUX_DATA(SD1_CLK_GMARK, GFN_SD1_CLK),
2271 PINMUX_DATA(SD0_DAT3_GMARK, GFN_SD0_DAT3),
2272 PINMUX_DATA(SD0_DAT2_GMARK, GFN_SD0_DAT2),
2273 PINMUX_DATA(SD0_DAT1_GMARK, GFN_SD0_DAT1),
2274 PINMUX_DATA(SD0_DAT0_GMARK, GFN_SD0_DAT0),
2275 PINMUX_DATA(SD0_CMD_GMARK, GFN_SD0_CMD),
2276 PINMUX_DATA(SD0_CLK_GMARK, GFN_SD0_CLK),
2277
2278 /* GPSR4 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2279 PINMUX_DATA(SD3_DS_GMARK, GFN_SD3_DS),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2280 PINMUX_DATA(SD3_DAT7_GMARK, GFN_SD3_DAT7),
2281 PINMUX_DATA(SD3_DAT6_GMARK, GFN_SD3_DAT6),
2282 PINMUX_DATA(SD3_DAT5_GMARK, GFN_SD3_DAT5),
2283 PINMUX_DATA(SD3_DAT4_GMARK, GFN_SD3_DAT4),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2284 PINMUX_DATA(SD3_DAT3_GMARK, GFN_SD3_DAT3),
2285 PINMUX_DATA(SD3_DAT2_GMARK, GFN_SD3_DAT2),
2286 PINMUX_DATA(SD3_DAT1_GMARK, GFN_SD3_DAT1),
2287 PINMUX_DATA(SD3_DAT0_GMARK, GFN_SD3_DAT0),
2288 PINMUX_DATA(SD3_CMD_GMARK, GFN_SD3_CMD),
2289 PINMUX_DATA(SD3_CLK_GMARK, GFN_SD3_CLK),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2290 PINMUX_DATA(SD2_DS_GMARK, GFN_SD2_DS),
2291 PINMUX_DATA(SD2_DAT3_GMARK, GFN_SD2_DAT3),
2292 PINMUX_DATA(SD2_DAT2_GMARK, GFN_SD2_DAT2),
2293 PINMUX_DATA(SD2_DAT1_GMARK, GFN_SD2_DAT1),
2294 PINMUX_DATA(SD2_DAT0_GMARK, GFN_SD2_DAT0),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2295 PINMUX_DATA(SD2_CMD_GMARK, GFN_SD2_CMD),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2296 PINMUX_DATA(SD2_CLK_GMARK, GFN_SD2_CLK),
2297
2298 /* GPSR5 */
2299 PINMUX_DATA(MLB_DAT_GMARK, GFN_MLB_DAT),
2300 PINMUX_DATA(MLB_SIG_GMARK, GFN_MLB_SIG),
2301 PINMUX_DATA(MLB_CLK_GMARK, GFN_MLB_CLK),
2302 PINMUX_DATA(MSIOF0_RXD_MARK, FN_MSIOF0_RXD),
2303 PINMUX_DATA(MSIOF0_SS2_GMARK, GFN_MSIOF0_SS2),
2304 PINMUX_DATA(MSIOF0_TXD_MARK, FN_MSIOF0_TXD),
2305 PINMUX_DATA(MSIOF0_SS1_GMARK, GFN_MSIOF0_SS1),
2306 PINMUX_DATA(MSIOF0_SYNC_GMARK, GFN_MSIOF0_SYNC),
2307 PINMUX_DATA(MSIOF0_SCK_MARK, FN_MSIOF0_SCK),
2308 PINMUX_DATA(HRTS0x_GMARK, GFN_HRTS0x),
2309 PINMUX_DATA(HCTS0x_GMARK, GFN_HCTS0x),
2310 PINMUX_DATA(HTX0_GMARK, GFN_HTX0),
2311 PINMUX_DATA(HRX0_GMARK, GFN_HRX0),
2312 PINMUX_DATA(HSCK0_GMARK, GFN_HSCK0),
2313 PINMUX_DATA(RX2_A_GMARK, GFN_RX2_A),
2314 PINMUX_DATA(TX2_A_GMARK, GFN_TX2_A),
2315 PINMUX_DATA(SCK2_GMARK, GFN_SCK2),
2316 PINMUX_DATA(RTS1x_TANS_GMARK, GFN_RTS1x_TANS),
2317 PINMUX_DATA(CTS1x_GMARK, GFN_CTS1x),
2318 PINMUX_DATA(TX1_A_GMARK, GFN_TX1_A),
2319 PINMUX_DATA(RX1_A_GMARK, GFN_RX1_A),
2320 PINMUX_DATA(RTS0x_TANS_GMARK, GFN_RTS0x_TANS),
2321 PINMUX_DATA(CTS0x_GMARK, GFN_CTS0x),
2322 PINMUX_DATA(TX0_GMARK, GFN_TX0),
2323 PINMUX_DATA(RX0_GMARK, GFN_RX0),
2324 PINMUX_DATA(SCK0_GMARK, GFN_SCK0),
2325
2326 /* GPSR6 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2327 PINMUX_DATA(USB3_OVC_GMARK, GFN_USB3_OVC),
2328 PINMUX_DATA(USB3_PWEN_GMARK, GFN_USB3_PWEN),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2329 PINMUX_DATA(USB30_OVC_GMARK, GFN_USB30_OVC),
2330 PINMUX_DATA(USB30_PWEN_GMARK, GFN_USB30_PWEN),
2331 PINMUX_DATA(USB1_OVC_GMARK, GFN_USB1_OVC),
2332 PINMUX_DATA(USB1_PWEN_GMARK, GFN_USB1_PWEN),
2333 PINMUX_DATA(USB0_OVC_GMARK, GFN_USB0_OVC),
2334 PINMUX_DATA(USB0_PWEN_GMARK, GFN_USB0_PWEN),
2335 PINMUX_DATA(AUDIO_CLKB_B_GMARK, GFN_AUDIO_CLKB_B),
2336 PINMUX_DATA(AUDIO_CLKA_A_GMARK, GFN_AUDIO_CLKA_A),
2337 PINMUX_DATA(SSI_SDATA9_A_GMARK, GFN_SSI_SDATA9_A),
2338 PINMUX_DATA(SSI_SDATA8_GMARK, GFN_SSI_SDATA8),
2339 PINMUX_DATA(SSI_SDATA7_GMARK, GFN_SSI_SDATA7),
2340 PINMUX_DATA(SSI_WS78_GMARK, GFN_SSI_WS78),
2341 PINMUX_DATA(SSI_SCK78_GMARK, GFN_SSI_SCK78),
2342 PINMUX_DATA(SSI_SDATA6_GMARK, GFN_SSI_SDATA6),
2343 PINMUX_DATA(SSI_WS6_GMARK, GFN_SSI_WS6),
2344 PINMUX_DATA(SSI_SCK6_GMARK, GFN_SSI_SCK6),
2345 PINMUX_DATA(SSI_SDATA5_MARK, FN_SSI_SDATA5),
2346 PINMUX_DATA(SSI_WS5_MARK, FN_SSI_WS5),
2347 PINMUX_DATA(SSI_SCK5_MARK, FN_SSI_SCK5),
2348 PINMUX_DATA(SSI_SDATA4_GMARK, GFN_SSI_SDATA4),
2349 PINMUX_DATA(SSI_WS4_GMARK, GFN_SSI_WS4),
2350 PINMUX_DATA(SSI_SCK4_GMARK, GFN_SSI_SCK4),
2351 PINMUX_DATA(SSI_SDATA3_GMARK, GFN_SSI_SDATA3),
2352 PINMUX_DATA(SSI_WS34_GMARK, GFN_SSI_WS34),
2353 PINMUX_DATA(SSI_SCK34_GMARK, GFN_SSI_SCK34),
2354 PINMUX_DATA(SSI_SDATA2_A_GMARK, GFN_SSI_SDATA2_A),
2355 PINMUX_DATA(SSI_SDATA1_A_GMARK, GFN_SSI_SDATA1_A),
2356 PINMUX_DATA(SSI_SDATA0_GMARK, GFN_SSI_SDATA0),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2357 PINMUX_DATA(SSI_WS01239_GMARK, GFN_SSI_WS01239),
2358 PINMUX_DATA(SSI_SCK01239_GMARK, GFN_SSI_SCK01239),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2359
2360 /* GPSR7 */
2361 PINMUX_DATA(HDMI1_CEC_MARK, FN_HDMI1_CEC),
2362 PINMUX_DATA(HDMI0_CEC_MARK, FN_HDMI0_CEC),
2363 PINMUX_DATA(AVS2_MARK, FN_AVS2),
2364 PINMUX_DATA(AVS1_MARK, FN_AVS1),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2365};
2366
2367static struct pinmux_gpio pinmux_gpios[] = {
2368 PINMUX_GPIO_GP_ALL(),
2369 /* GPSR0 */
2370 GPIO_GFN(D15),
2371 GPIO_GFN(D14),
2372 GPIO_GFN(D13),
2373 GPIO_GFN(D12),
2374 GPIO_GFN(D11),
2375 GPIO_GFN(D10),
2376 GPIO_GFN(D9),
2377 GPIO_GFN(D8),
2378 GPIO_GFN(D7),
2379 GPIO_GFN(D6),
2380 GPIO_GFN(D5),
2381 GPIO_GFN(D4),
2382 GPIO_GFN(D3),
2383 GPIO_GFN(D2),
2384 GPIO_GFN(D1),
2385 GPIO_GFN(D0),
2386 /* GPSR1 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2387 GPIO_GFN(CLKOUT),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2388 GPIO_GFN(EX_WAIT0_A),
2389 GPIO_GFN(WE1x),
2390 GPIO_GFN(WE0x),
2391 GPIO_GFN(RD_WRx),
2392 GPIO_GFN(RDx),
2393 GPIO_GFN(BSx),
2394 GPIO_GFN(CS1x_A26),
2395 GPIO_GFN(CS0x),
2396 GPIO_GFN(A19),
2397 GPIO_GFN(A18),
2398 GPIO_GFN(A17),
2399 GPIO_GFN(A16),
2400 GPIO_GFN(A15),
2401 GPIO_GFN(A14),
2402 GPIO_GFN(A13),
2403 GPIO_GFN(A12),
2404 GPIO_GFN(A11),
2405 GPIO_GFN(A10),
2406 GPIO_GFN(A9),
2407 GPIO_GFN(A8),
2408 GPIO_GFN(A7),
2409 GPIO_GFN(A6),
2410 GPIO_GFN(A5),
2411 GPIO_GFN(A4),
2412 GPIO_GFN(A3),
2413 GPIO_GFN(A2),
2414 GPIO_GFN(A1),
2415 GPIO_GFN(A0),
2416
2417 /* GPSR2 */
2418 GPIO_GFN(AVB_AVTP_CAPTURE_A),
2419 GPIO_GFN(AVB_AVTP_MATCH_A),
2420 GPIO_GFN(AVB_LINK),
2421 GPIO_GFN(AVB_PHY_INT),
2422 GPIO_GFN(AVB_MAGIC),
2423 GPIO_GFN(AVB_MDC),
2424 GPIO_GFN(PWM2_A),
2425 GPIO_GFN(PWM1_A),
2426 GPIO_GFN(PWM0),
2427 GPIO_GFN(IRQ5),
2428 GPIO_GFN(IRQ4),
2429 GPIO_GFN(IRQ3),
2430 GPIO_GFN(IRQ2),
2431 GPIO_GFN(IRQ1),
2432 GPIO_GFN(IRQ0),
2433
2434 /* GPSR3 */
2435 GPIO_GFN(SD1_WP),
2436 GPIO_GFN(SD1_CD),
2437 GPIO_GFN(SD0_WP),
2438 GPIO_GFN(SD0_CD),
2439 GPIO_GFN(SD1_DAT3),
2440 GPIO_GFN(SD1_DAT2),
2441 GPIO_GFN(SD1_DAT1),
2442 GPIO_GFN(SD1_DAT0),
2443 GPIO_GFN(SD1_CMD),
2444 GPIO_GFN(SD1_CLK),
2445 GPIO_GFN(SD0_DAT3),
2446 GPIO_GFN(SD0_DAT2),
2447 GPIO_GFN(SD0_DAT1),
2448 GPIO_GFN(SD0_DAT0),
2449 GPIO_GFN(SD0_CMD),
2450 GPIO_GFN(SD0_CLK),
2451
2452 /* GPSR4 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2453 GPIO_GFN(SD3_DS),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2454 GPIO_GFN(SD3_DAT7),
2455 GPIO_GFN(SD3_DAT6),
2456 GPIO_GFN(SD3_DAT5),
2457 GPIO_GFN(SD3_DAT4),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2458 GPIO_GFN(SD3_DAT3),
2459 GPIO_GFN(SD3_DAT2),
2460 GPIO_GFN(SD3_DAT1),
2461 GPIO_GFN(SD3_DAT0),
2462 GPIO_GFN(SD3_CMD),
2463 GPIO_GFN(SD3_CLK),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2464 GPIO_GFN(SD2_DS),
2465 GPIO_GFN(SD2_DAT3),
2466 GPIO_GFN(SD2_DAT2),
2467 GPIO_GFN(SD2_DAT1),
2468 GPIO_GFN(SD2_DAT0),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2469 GPIO_GFN(SD2_CMD),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2470 GPIO_GFN(SD2_CLK),
2471
2472 /* GPSR5 */
2473 GPIO_GFN(MLB_DAT),
2474 GPIO_GFN(MLB_SIG),
2475 GPIO_GFN(MLB_CLK),
2476 GPIO_FN(MSIOF0_RXD),
2477 GPIO_GFN(MSIOF0_SS2),
2478 GPIO_FN(MSIOF0_TXD),
2479 GPIO_GFN(MSIOF0_SS1),
2480 GPIO_GFN(MSIOF0_SYNC),
2481 GPIO_FN(MSIOF0_SCK),
2482 GPIO_GFN(HRTS0x),
2483 GPIO_GFN(HCTS0x),
2484 GPIO_GFN(HTX0),
2485 GPIO_GFN(HRX0),
2486 GPIO_GFN(HSCK0),
2487 GPIO_GFN(RX2_A),
2488 GPIO_GFN(TX2_A),
2489 GPIO_GFN(SCK2),
2490 GPIO_GFN(RTS1x_TANS),
2491 GPIO_GFN(CTS1x),
2492 GPIO_GFN(TX1_A),
2493 GPIO_GFN(RX1_A),
2494 GPIO_GFN(RTS0x_TANS),
2495 GPIO_GFN(CTS0x),
2496 GPIO_GFN(TX0),
2497 GPIO_GFN(RX0),
2498 GPIO_GFN(SCK0),
2499
2500 /* GPSR6 */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2501 GPIO_GFN(USB3_OVC),
2502 GPIO_GFN(USB3_PWEN),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2503 GPIO_GFN(USB30_OVC),
2504 GPIO_GFN(USB30_PWEN),
2505 GPIO_GFN(USB1_OVC),
2506 GPIO_GFN(USB1_PWEN),
2507 GPIO_GFN(USB0_OVC),
2508 GPIO_GFN(USB0_PWEN),
2509 GPIO_GFN(AUDIO_CLKB_B),
2510 GPIO_GFN(AUDIO_CLKA_A),
2511 GPIO_GFN(SSI_SDATA9_A),
2512 GPIO_GFN(SSI_SDATA8),
2513 GPIO_GFN(SSI_SDATA7),
2514 GPIO_GFN(SSI_WS78),
2515 GPIO_GFN(SSI_SCK78),
2516 GPIO_GFN(SSI_SDATA6),
2517 GPIO_GFN(SSI_WS6),
2518 GPIO_GFN(SSI_SCK6),
2519 GPIO_FN(SSI_SDATA5),
2520 GPIO_FN(SSI_WS5),
2521 GPIO_FN(SSI_SCK5),
2522 GPIO_GFN(SSI_SDATA4),
2523 GPIO_GFN(SSI_WS4),
2524 GPIO_GFN(SSI_SCK4),
2525 GPIO_GFN(SSI_SDATA3),
2526 GPIO_GFN(SSI_WS34),
2527 GPIO_GFN(SSI_SCK34),
2528 GPIO_GFN(SSI_SDATA2_A),
2529 GPIO_GFN(SSI_SDATA1_A),
2530 GPIO_GFN(SSI_SDATA0),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2531 GPIO_GFN(SSI_WS01239),
2532 GPIO_GFN(SSI_SCK01239),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2533
2534 /* GPSR7 */
2535 GPIO_FN(HDMI1_CEC),
2536 GPIO_FN(HDMI0_CEC),
2537 GPIO_FN(AVS2),
2538 GPIO_FN(AVS1),
2539
2540 /* IPSR0 */
2541 GPIO_IFN(AVB_MDC),
2542 GPIO_FN(MSIOF2_SS2_C),
2543 GPIO_IFN(AVB_MAGIC),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2544 GPIO_FN(MSIOF2_SS1_C),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2545 GPIO_FN(SCK4_A),
2546 GPIO_IFN(AVB_PHY_INT),
2547 GPIO_FN(MSIOF2_SYNC_C),
2548 GPIO_FN(RX4_A),
2549 GPIO_IFN(AVB_LINK),
2550 GPIO_FN(MSIOF2_SCK_C),
2551 GPIO_FN(TX4_A),
2552 GPIO_IFN(AVB_AVTP_MATCH_A),
2553 GPIO_FN(MSIOF2_RXD_C),
2554 GPIO_FN(CTS4x_A),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2555 GPIO_FN(FSCLKST2x_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2556 GPIO_IFN(AVB_AVTP_CAPTURE_A),
2557 GPIO_FN(MSIOF2_TXD_C),
2558 GPIO_FN(RTS4x_TANS_A),
2559 GPIO_IFN(IRQ0),
2560 GPIO_FN(QPOLB),
2561 GPIO_FN(DU_CDE),
2562 GPIO_FN(VI4_DATA0_B),
2563 GPIO_FN(CAN0_TX_B),
2564 GPIO_FN(CANFD0_TX_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2565 GPIO_FN(MSIOF3_SS2_E),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2566 GPIO_IFN(IRQ1),
2567 GPIO_FN(QPOLA),
2568 GPIO_FN(DU_DISP),
2569 GPIO_FN(VI4_DATA1_B),
2570 GPIO_FN(CAN0_RX_B),
2571 GPIO_FN(CANFD0_RX_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2572 GPIO_FN(MSIOF3_SS1_E),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2573
2574 /* IPSR1 */
2575 GPIO_IFN(IRQ2),
2576 GPIO_FN(QCPV_QDE),
2577 GPIO_FN(DU_EXODDF_DU_ODDF_DISP_CDE),
2578 GPIO_FN(VI4_DATA2_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2579 GPIO_FN(MSIOF3_SYNC_E),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2580 GPIO_FN(PWM3_B),
2581 GPIO_IFN(IRQ3),
2582 GPIO_FN(QSTVB_QVE),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2583 GPIO_FN(DU_DOTCLKOUT1),
2584 GPIO_FN(VI4_DATA3_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2585 GPIO_FN(MSIOF3_SCK_E),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2586 GPIO_FN(PWM4_B),
2587 GPIO_IFN(IRQ4),
2588 GPIO_FN(QSTH_QHS),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2589 GPIO_FN(DU_EXHSYNC_DU_HSYNC),
2590 GPIO_FN(VI4_DATA4_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2591 GPIO_FN(MSIOF3_RXD_E),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2592 GPIO_FN(PWM5_B),
2593 GPIO_IFN(IRQ5),
2594 GPIO_FN(QSTB_QHE),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2595 GPIO_FN(DU_EXVSYNC_DU_VSYNC),
2596 GPIO_FN(VI4_DATA5_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2597 GPIO_FN(FSCLKST2x_B),
2598 GPIO_FN(MSIOF3_TXD_E),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2599 GPIO_FN(PWM6_B),
2600 GPIO_IFN(PWM0),
2601 GPIO_FN(AVB_AVTP_PPS),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2602 GPIO_FN(VI4_DATA6_B),
2603 GPIO_FN(IECLK_B),
2604 GPIO_IFN(PWM1_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2605 GPIO_FN(HRX3_D),
2606 GPIO_FN(VI4_DATA7_B),
2607 GPIO_FN(IERX_B),
2608 GPIO_IFN(PWM2_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2609 GPIO_FN(HTX3_D),
2610 GPIO_FN(IETX_B),
2611 GPIO_IFN(A0),
2612 GPIO_FN(LCDOUT16),
2613 GPIO_FN(MSIOF3_SYNC_B),
2614 GPIO_FN(VI4_DATA8),
2615 GPIO_FN(DU_DB0),
2616 GPIO_FN(PWM3_A),
2617
2618 /* IPSR2 */
2619 GPIO_IFN(A1),
2620 GPIO_FN(LCDOUT17),
2621 GPIO_FN(MSIOF3_TXD_B),
2622 GPIO_FN(VI4_DATA9),
2623 GPIO_FN(DU_DB1),
2624 GPIO_FN(PWM4_A),
2625 GPIO_IFN(A2),
2626 GPIO_FN(LCDOUT18),
2627 GPIO_FN(MSIOF3_SCK_B),
2628 GPIO_FN(VI4_DATA10),
2629 GPIO_FN(DU_DB2),
2630 GPIO_FN(PWM5_A),
2631 GPIO_IFN(A3),
2632 GPIO_FN(LCDOUT19),
2633 GPIO_FN(MSIOF3_RXD_B),
2634 GPIO_FN(VI4_DATA11),
2635 GPIO_FN(DU_DB3),
2636 GPIO_FN(PWM6_A),
2637 GPIO_IFN(A4),
2638 GPIO_FN(LCDOUT20),
2639 GPIO_FN(MSIOF3_SS1_B),
2640 GPIO_FN(VI4_DATA12),
2641 GPIO_FN(VI5_DATA12),
2642 GPIO_FN(DU_DB4),
2643 GPIO_IFN(A5),
2644 GPIO_FN(LCDOUT21),
2645 GPIO_FN(MSIOF3_SS2_B),
2646 GPIO_FN(SCK4_B),
2647 GPIO_FN(VI4_DATA13),
2648 GPIO_FN(VI5_DATA13),
2649 GPIO_FN(DU_DB5),
2650 GPIO_IFN(A6),
2651 GPIO_FN(LCDOUT22),
2652 GPIO_FN(MSIOF2_SS1_A),
2653 GPIO_FN(RX4_B),
2654 GPIO_FN(VI4_DATA14),
2655 GPIO_FN(VI5_DATA14),
2656 GPIO_FN(DU_DB6),
2657 GPIO_IFN(A7),
2658 GPIO_FN(LCDOUT23),
2659 GPIO_FN(MSIOF2_SS2_A),
2660 GPIO_FN(TX4_B),
2661 GPIO_FN(VI4_DATA15),
2662 GPIO_FN(V15_DATA15),
2663 GPIO_FN(DU_DB7),
2664 GPIO_IFN(A8),
2665 GPIO_FN(RX3_B),
2666 GPIO_FN(MSIOF2_SYNC_A),
2667 GPIO_FN(HRX4_B),
2668 GPIO_FN(SDA6_A),
2669 GPIO_FN(AVB_AVTP_MATCH_B),
2670 GPIO_FN(PWM1_B),
2671
2672 /* IPSR3 */
2673 GPIO_IFN(A9),
2674 GPIO_FN(MSIOF2_SCK_A),
2675 GPIO_FN(CTS4x_B),
2676 GPIO_FN(VI5_VSYNCx),
2677 GPIO_IFN(A10),
2678 GPIO_FN(MSIOF2_RXD_A),
2679 GPIO_FN(RTS4n_TANS_B),
2680 GPIO_FN(VI5_HSYNCx),
2681 GPIO_IFN(A11),
2682 GPIO_FN(TX3_B),
2683 GPIO_FN(MSIOF2_TXD_A),
2684 GPIO_FN(HTX4_B),
2685 GPIO_FN(HSCK4),
2686 GPIO_FN(VI5_FIELD),
2687 GPIO_FN(SCL6_A),
2688 GPIO_FN(AVB_AVTP_CAPTURE_B),
2689 GPIO_FN(PWM2_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2690 GPIO_IFN(A12),
2691 GPIO_FN(LCDOUT12),
2692 GPIO_FN(MSIOF3_SCK_C),
2693 GPIO_FN(HRX4_A),
2694 GPIO_FN(VI5_DATA8),
2695 GPIO_FN(DU_DG4),
2696 GPIO_IFN(A13),
2697 GPIO_FN(LCDOUT13),
2698 GPIO_FN(MSIOF3_SYNC_C),
2699 GPIO_FN(HTX4_A),
2700 GPIO_FN(VI5_DATA9),
2701 GPIO_FN(DU_DG5),
2702 GPIO_IFN(A14),
2703 GPIO_FN(LCDOUT14),
2704 GPIO_FN(MSIOF3_RXD_C),
2705 GPIO_FN(HCTS4x),
2706 GPIO_FN(VI5_DATA10),
2707 GPIO_FN(DU_DG6),
2708 GPIO_IFN(A15),
2709 GPIO_FN(LCDOUT15),
2710 GPIO_FN(MSIOF3_TXD_C),
2711 GPIO_FN(HRTS4x),
2712 GPIO_FN(VI5_DATA11),
2713 GPIO_FN(DU_DG7),
2714 GPIO_IFN(A16),
2715 GPIO_FN(LCDOUT8),
2716 GPIO_FN(VI4_FIELD),
2717 GPIO_FN(DU_DG0),
2718
2719 /* IPSR4 */
2720 GPIO_IFN(A17),
2721 GPIO_FN(LCDOUT9),
2722 GPIO_FN(VI4_VSYNCx),
2723 GPIO_FN(DU_DG1),
2724 GPIO_IFN(A18),
2725 GPIO_FN(LCDOUT10),
2726 GPIO_FN(VI4_HSYNCx),
2727 GPIO_FN(DU_DG2),
2728 GPIO_IFN(A19),
2729 GPIO_FN(LCDOUT11),
2730 GPIO_FN(VI4_CLKENB),
2731 GPIO_FN(DU_DG3),
2732 GPIO_IFN(CS0x),
2733 GPIO_FN(VI5_CLKENB),
2734 GPIO_IFN(CS1x_A26),
2735 GPIO_FN(VI5_CLK),
2736 GPIO_FN(EX_WAIT0_B),
2737 GPIO_IFN(BSx),
2738 GPIO_FN(QSTVA_QVS),
2739 GPIO_FN(MSIOF3_SCK_D),
2740 GPIO_FN(SCK3),
2741 GPIO_FN(HSCK3),
2742 GPIO_FN(CAN1_TX),
2743 GPIO_FN(CANFD1_TX),
2744 GPIO_FN(IETX_A),
2745 GPIO_IFN(RDx),
2746 GPIO_FN(MSIOF3_SYNC_D),
2747 GPIO_FN(RX3_A),
2748 GPIO_FN(HRX3_A),
2749 GPIO_FN(CAN0_TX_A),
2750 GPIO_FN(CANFD0_TX_A),
2751 GPIO_IFN(RD_WRx),
2752 GPIO_FN(MSIOF3_RXD_D),
2753 GPIO_FN(TX3_A),
2754 GPIO_FN(HTX3_A),
2755 GPIO_FN(CAN0_RX_A),
2756 GPIO_FN(CANFD0_RX_A),
2757
2758 /* IPSR5 */
2759 GPIO_IFN(WE0x),
2760 GPIO_FN(MSIIOF3_TXD_D),
2761 GPIO_FN(CTS3x),
2762 GPIO_FN(HCTS3x),
2763 GPIO_FN(SCL6_B),
2764 GPIO_FN(CAN_CLK),
2765 GPIO_FN(IECLK_A),
2766 GPIO_IFN(WE1x),
2767 GPIO_FN(MSIOF3_SS1_D),
2768 GPIO_FN(RTS3x_TANS),
2769 GPIO_FN(HRTS3x),
2770 GPIO_FN(SDA6_B),
2771 GPIO_FN(CAN1_RX),
2772 GPIO_FN(CANFD1_RX),
2773 GPIO_FN(IERX_A),
2774 GPIO_IFN(EX_WAIT0_A),
2775 GPIO_FN(QCLK),
2776 GPIO_FN(VI4_CLK),
2777 GPIO_FN(DU_DOTCLKOUT0),
2778 GPIO_IFN(D0),
2779 GPIO_FN(MSIOF2_SS1_B),
2780 GPIO_FN(MSIOF3_SCK_A),
2781 GPIO_FN(VI4_DATA16),
2782 GPIO_FN(VI5_DATA0),
2783 GPIO_IFN(D1),
2784 GPIO_FN(MSIOF2_SS2_B),
2785 GPIO_FN(MSIOF3_SYNC_A),
2786 GPIO_FN(VI4_DATA17),
2787 GPIO_FN(VI5_DATA1),
2788 GPIO_IFN(D2),
2789 GPIO_FN(MSIOF3_RXD_A),
2790 GPIO_FN(VI4_DATA18),
2791 GPIO_FN(VI5_DATA2),
2792 GPIO_IFN(D3),
2793 GPIO_FN(MSIOF3_TXD_A),
2794 GPIO_FN(VI4_DATA19),
2795 GPIO_FN(VI5_DATA3),
2796 GPIO_IFN(D4),
2797 GPIO_FN(MSIOF2_SCK_B),
2798 GPIO_FN(VI4_DATA20),
2799 GPIO_FN(VI5_DATA4),
2800
2801 /* IPSR6 */
2802 GPIO_IFN(D5),
2803 GPIO_FN(MSIOF2_SYNC_B),
2804 GPIO_FN(VI4_DATA21),
2805 GPIO_FN(VI5_DATA5),
2806 GPIO_IFN(D6),
2807 GPIO_FN(MSIOF2_RXD_B),
2808 GPIO_FN(VI4_DATA22),
2809 GPIO_FN(VI5_DATA6),
2810 GPIO_IFN(D7),
2811 GPIO_FN(MSIOF2_TXD_B),
2812 GPIO_FN(VI4_DATA23),
2813 GPIO_FN(VI5_DATA7),
2814 GPIO_IFN(D8),
2815 GPIO_FN(LCDOUT0),
2816 GPIO_FN(MSIOF2_SCK_D),
2817 GPIO_FN(SCK4_C),
2818 GPIO_FN(VI4_DATA0_A),
2819 GPIO_FN(DU_DR0),
2820 GPIO_IFN(D9),
2821 GPIO_FN(LCDOUT1),
2822 GPIO_FN(MSIOF2_SYNC_D),
2823 GPIO_FN(VI4_DATA1_A),
2824 GPIO_FN(DU_DR1),
2825 GPIO_IFN(D10),
2826 GPIO_FN(LCDOUT2),
2827 GPIO_FN(MSIOF2_RXD_D),
2828 GPIO_FN(HRX3_B),
2829 GPIO_FN(VI4_DATA2_A),
2830 GPIO_FN(CTS4x_C),
2831 GPIO_FN(DU_DR2),
2832 GPIO_IFN(D11),
2833 GPIO_FN(LCDOUT3),
2834 GPIO_FN(MSIOF2_TXD_D),
2835 GPIO_FN(HTX3_B),
2836 GPIO_FN(VI4_DATA3_A),
2837 GPIO_FN(RTS4x_TANS_C),
2838 GPIO_FN(DU_DR3),
2839 GPIO_IFN(D12),
2840 GPIO_FN(LCDOUT4),
2841 GPIO_FN(MSIOF2_SS1_D),
2842 GPIO_FN(RX4_C),
2843 GPIO_FN(VI4_DATA4_A),
2844 GPIO_FN(DU_DR4),
2845
2846 /* IPSR7 */
2847 GPIO_IFN(D13),
2848 GPIO_FN(LCDOUT5),
2849 GPIO_FN(MSIOF2_SS2_D),
2850 GPIO_FN(TX4_C),
2851 GPIO_FN(VI4_DATA5_A),
2852 GPIO_FN(DU_DR5),
2853 GPIO_IFN(D14),
2854 GPIO_FN(LCDOUT6),
2855 GPIO_FN(MSIOF3_SS1_A),
2856 GPIO_FN(HRX3_C),
2857 GPIO_FN(VI4_DATA6_A),
2858 GPIO_FN(DU_DR6),
2859 GPIO_FN(SCL6_C),
2860 GPIO_IFN(D15),
2861 GPIO_FN(LCDOUT7),
2862 GPIO_FN(MSIOF3_SS2_A),
2863 GPIO_FN(HTX3_C),
2864 GPIO_FN(VI4_DATA7_A),
2865 GPIO_FN(DU_DR7),
2866 GPIO_FN(SDA6_C),
2867 GPIO_FN(FSCLKST),
2868 GPIO_IFN(SD0_CLK),
2869 GPIO_FN(MSIOF1_SCK_E),
2870 GPIO_FN(STP_OPWM_0_B),
2871 GPIO_IFN(SD0_CMD),
2872 GPIO_FN(MSIOF1_SYNC_E),
2873 GPIO_FN(STP_IVCXO27_0_B),
2874 GPIO_IFN(SD0_DAT0),
2875 GPIO_FN(MSIOF1_RXD_E),
2876 GPIO_FN(TS_SCK0_B),
2877 GPIO_FN(STP_ISCLK_0_B),
2878 GPIO_IFN(SD0_DAT1),
2879 GPIO_FN(MSIOF1_TXD_E),
2880 GPIO_FN(TS_SPSYNC0_B),
2881 GPIO_FN(STP_ISSYNC_0_B),
2882
2883 /* IPSR8 */
2884 GPIO_IFN(SD0_DAT2),
2885 GPIO_FN(MSIOF1_SS1_E),
2886 GPIO_FN(TS_SDAT0_B),
2887 GPIO_FN(STP_ISD_0_B),
2888 GPIO_IFN(SD0_DAT3),
2889 GPIO_FN(MSIOF1_SS2_E),
2890 GPIO_FN(TS_SDEN0_B),
2891 GPIO_FN(STP_ISEN_0_B),
2892 GPIO_IFN(SD1_CLK),
2893 GPIO_FN(MSIOF1_SCK_G),
2894 GPIO_FN(SIM0_CLK_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2895 GPIO_IFN(SD1_CMD),
2896 GPIO_FN(MSIOF1_SYNC_G),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2897 GPIO_FN(NFCEx_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2898 GPIO_FN(SIM0_D_A),
2899 GPIO_FN(STP_IVCXO27_1_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2900 GPIO_IFN(SD1_DAT0),
2901 GPIO_FN(SD2_DAT4),
2902 GPIO_FN(MSIOF1_RXD_G),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2903 GPIO_FN(NFWPx_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2904 GPIO_FN(TS_SCK1_B),
2905 GPIO_FN(STP_ISCLK_1_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2906 GPIO_IFN(SD1_DAT1),
2907 GPIO_FN(SD2_DAT5),
2908 GPIO_FN(MSIOF1_TXD_G),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2909 GPIO_FN(NFDATA14_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2910 GPIO_FN(TS_SPSYNC1_B),
2911 GPIO_FN(STP_ISSYNC_1_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2912 GPIO_IFN(SD1_DAT2),
2913 GPIO_FN(SD2_DAT6),
2914 GPIO_FN(MSIOF1_SS1_G),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2915 GPIO_FN(NFDATA15_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2916 GPIO_FN(TS_SDAT1_B),
2917 GPIO_FN(STP_IOD_1_B),
2918 GPIO_IFN(SD1_DAT3),
2919 GPIO_FN(SD2_DAT7),
2920 GPIO_FN(MSIOF1_SS2_G),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2921 GPIO_FN(NFRBx_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2922 GPIO_FN(TS_SDEN1_B),
2923 GPIO_FN(STP_ISEN_1_B),
2924
2925 /* IPSR9 */
2926 GPIO_IFN(SD2_CLK),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2927 GPIO_FN(NFDATA8),
2928 GPIO_IFN(SD2_CMD),
2929 GPIO_FN(NFDATA9),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2930 GPIO_IFN(SD2_DAT0),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2931 GPIO_FN(NFDATA10),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2932 GPIO_IFN(SD2_DAT1),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2933 GPIO_FN(NFDATA11),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2934 GPIO_IFN(SD2_DAT2),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2935 GPIO_FN(NFDATA12),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2936 GPIO_IFN(SD2_DAT3),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2937 GPIO_FN(NFDATA13),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2938 GPIO_IFN(SD2_DS),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2939 GPIO_FN(NFALE),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2940 GPIO_FN(SATA_DEVSLP_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2941 GPIO_IFN(SD3_CLK),
2942 GPIO_FN(NFWEx),
2943
2944 /* IPSR10 */
2945 GPIO_IFN(SD3_CMD),
2946 GPIO_FN(NFREx),
2947 GPIO_IFN(SD3_DAT0),
2948 GPIO_FN(NFDATA0),
2949 GPIO_IFN(SD3_DAT1),
2950 GPIO_FN(NFDATA1),
2951 GPIO_IFN(SD3_DAT2),
2952 GPIO_FN(NFDATA2),
2953 GPIO_IFN(SD3_DAT3),
2954 GPIO_FN(NFDATA3),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2955 GPIO_IFN(SD3_DAT4),
2956 GPIO_FN(SD2_CD_A),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2957 GPIO_FN(NFDATA4),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2958 GPIO_IFN(SD3_DAT5),
2959 GPIO_FN(SD2_WP_A),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2960 GPIO_FN(NFDATA5),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2961 GPIO_IFN(SD3_DAT6),
2962 GPIO_FN(SD3_CD),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2963 GPIO_FN(NFDATA6),
2964
2965 /* IPSR11 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2966 GPIO_IFN(SD3_DAT7),
2967 GPIO_FN(SD3_WP),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2968 GPIO_FN(NFDATA7),
2969 GPIO_IFN(SD3_DS),
2970 GPIO_FN(NFCLE),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2971 GPIO_IFN(SD0_CD),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2972 GPIO_FN(NFDATA14_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2973 GPIO_FN(SCL2_B),
2974 GPIO_FN(SIM0_RST_A),
2975 GPIO_IFN(SD0_WP),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2976 GPIO_FN(NFDATA15_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2977 GPIO_FN(SDA2_B),
2978 GPIO_IFN(SD1_CD),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2979 GPIO_FN(NFRBx_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2980 GPIO_FN(SIM0_CLK_B),
2981 GPIO_IFN(SD1_WP),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2982 GPIO_FN(NFCEx_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2983 GPIO_FN(SIM0_D_B),
2984 GPIO_IFN(SCK0),
2985 GPIO_FN(HSCK1_B),
2986 GPIO_FN(MSIOF1_SS2_B),
2987 GPIO_FN(AUDIO_CLKC_B),
2988 GPIO_FN(SDA2_A),
2989 GPIO_FN(SIM0_RST_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2990 GPIO_FN(STP_OPWM_0_C),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2991 GPIO_FN(RIF0_CLK_B),
2992 GPIO_FN(ADICHS2),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]2993 GPIO_FN(SCK5_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]2994 GPIO_IFN(RX0),
2995 GPIO_FN(HRX1_B),
2996 GPIO_FN(TS_SCK0_C),
2997 GPIO_FN(STP_ISCLK_0_C),
2998 GPIO_FN(RIF0_D0_B),
2999
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3000 /* IPSR12 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3001 GPIO_IFN(TX0),
3002 GPIO_FN(HTX1_B),
3003 GPIO_FN(TS_SPSYNC0_C),
3004 GPIO_FN(STP_ISSYNC_0_C),
3005 GPIO_FN(RIF0_D1_B),
3006 GPIO_IFN(CTS0x),
3007 GPIO_FN(HCTS1x_B),
3008 GPIO_FN(MSIOF1_SYNC_B),
3009 GPIO_FN(TS_SPSYNC1_C),
3010 GPIO_FN(STP_ISSYNC_1_C),
3011 GPIO_FN(RIF1_SYNC_B),
3012 GPIO_FN(AUDIO_CLKOUT_C),
3013 GPIO_FN(ADICS_SAMP),
3014 GPIO_IFN(RTS0x_TANS),
3015 GPIO_FN(HRTS1x_B),
3016 GPIO_FN(MSIOF1_SS1_B),
3017 GPIO_FN(AUDIO_CLKA_B),
3018 GPIO_FN(SCL2_A),
3019 GPIO_FN(STP_IVCXO27_1_C),
3020 GPIO_FN(RIF0_SYNC_B),
3021 GPIO_FN(ADICHS1),
3022 GPIO_IFN(RX1_A),
3023 GPIO_FN(HRX1_A),
3024 GPIO_FN(TS_SDAT0_C),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3025 GPIO_FN(STP_ISD_0_C),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3026 GPIO_FN(RIF1_CLK_C),
3027 GPIO_IFN(TX1_A),
3028 GPIO_FN(HTX1_A),
3029 GPIO_FN(TS_SDEN0_C),
3030 GPIO_FN(STP_ISEN_0_C),
3031 GPIO_FN(RIF1_D0_C),
3032 GPIO_IFN(CTS1x),
3033 GPIO_FN(HCTS1x_A),
3034 GPIO_FN(MSIOF1_RXD_B),
3035 GPIO_FN(TS_SDEN1_C),
3036 GPIO_FN(STP_ISEN_1_C),
3037 GPIO_FN(RIF1_D0_B),
3038 GPIO_FN(ADIDATA),
3039 GPIO_IFN(RTS1x_TANS),
3040 GPIO_FN(HRTS1x_A),
3041 GPIO_FN(MSIOF1_TXD_B),
3042 GPIO_FN(TS_SDAT1_C),
3043 GPIO_FN(STP_ISD_1_C),
3044 GPIO_FN(RIF1_D1_B),
3045 GPIO_FN(ADICHS0),
3046 GPIO_IFN(SCK2),
3047 GPIO_FN(SCIF_CLK_B),
3048 GPIO_FN(MSIOF1_SCK_B),
3049 GPIO_FN(TS_SCK1_C),
3050 GPIO_FN(STP_ISCLK_1_C),
3051 GPIO_FN(RIF1_CLK_B),
3052 GPIO_FN(ADICLK),
3053
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3054 /* IPSR13 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3055 GPIO_IFN(TX2_A),
3056 GPIO_FN(SD2_CD_B),
3057 GPIO_FN(SCL1_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3058 GPIO_FN(FMCLK_A),
3059 GPIO_FN(RIF1_D1_C),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3060 GPIO_FN(FSO_CFE_0x),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3061 GPIO_IFN(RX2_A),
3062 GPIO_FN(SD2_WP_B),
3063 GPIO_FN(SDA1_A),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3064 GPIO_FN(FMIN_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3065 GPIO_FN(RIF1_SYNC_C),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3066 GPIO_FN(FSO_CFE_1x),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3067 GPIO_IFN(HSCK0),
3068 GPIO_FN(MSIOF1_SCK_D),
3069 GPIO_FN(AUDIO_CLKB_A),
3070 GPIO_FN(SSI_SDATA1_B),
3071 GPIO_FN(TS_SCK0_D),
3072 GPIO_FN(STP_ISCLK_0_D),
3073 GPIO_FN(RIF0_CLK_C),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3074 GPIO_FN(RX5_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3075 GPIO_IFN(HRX0),
3076 GPIO_FN(MSIOF1_RXD_D),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3077 GPIO_FN(SSI_SDATA2_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3078 GPIO_FN(TS_SDEN0_D),
3079 GPIO_FN(STP_ISEN_0_D),
3080 GPIO_FN(RIF0_D0_C),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3081 GPIO_IFN(HTX0),
3082 GPIO_FN(MSIOF1_TXD_D),
3083 GPIO_FN(SSI_SDATA9_B),
3084 GPIO_FN(TS_SDAT0_D),
3085 GPIO_FN(STP_ISD_0_D),
3086 GPIO_FN(RIF0_D1_C),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3087 GPIO_IFN(HCTS0x),
3088 GPIO_FN(RX2_B),
3089 GPIO_FN(MSIOF1_SYNC_D),
3090 GPIO_FN(SSI_SCK9_A),
3091 GPIO_FN(TS_SPSYNC0_D),
3092 GPIO_FN(STP_ISSYNC_0_D),
3093 GPIO_FN(RIF0_SYNC_C),
3094 GPIO_FN(AUDIO_CLKOUT1_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3095 GPIO_IFN(HRTS0x),
3096 GPIO_FN(TX2_B),
3097 GPIO_FN(MSIOF1_SS1_D),
3098 GPIO_FN(SSI_WS9_A),
3099 GPIO_FN(STP_IVCXO27_0_D),
3100 GPIO_FN(BPFCLK_A),
3101 GPIO_FN(AUDIO_CLKOUT2_A),
3102 GPIO_IFN(MSIOF0_SYNC),
3103 GPIO_FN(AUDIO_CLKOUT_A),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3104 GPIO_FN(TX5_B),
3105 GPIO_FN(BPFCLK_D),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3106
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3107 /* IPSR14 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3108 GPIO_IFN(MSIOF0_SS1),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3109 GPIO_FN(RX5_A),
3110 GPIO_FN(NFWPx_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3111 GPIO_FN(AUDIO_CLKA_C),
3112 GPIO_FN(SSI_SCK2_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3113 GPIO_FN(STP_IVCXO27_0_C),
3114 GPIO_FN(AUDIO_CLKOUT3_A),
3115 GPIO_FN(TCLK1_B),
3116 GPIO_IFN(MSIOF0_SS2),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3117 GPIO_FN(TX5_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3118 GPIO_FN(MSIOF1_SS2_D),
3119 GPIO_FN(AUDIO_CLKC_A),
3120 GPIO_FN(SSI_WS2_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3121 GPIO_FN(STP_OPWM_0_D),
3122 GPIO_FN(AUDIO_CLKOUT_D),
3123 GPIO_FN(SPEEDIN_B),
3124 GPIO_IFN(MLB_CLK),
3125 GPIO_FN(MSIOF1_SCK_F),
3126 GPIO_FN(SCL1_B),
3127 GPIO_IFN(MLB_SIG),
3128 GPIO_FN(RX1_B),
3129 GPIO_FN(MSIOF1_SYNC_F),
3130 GPIO_FN(SDA1_B),
3131 GPIO_IFN(MLB_DAT),
3132 GPIO_FN(TX1_B),
3133 GPIO_FN(MSIOF1_RXD_F),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3134 GPIO_IFN(SSI_SCK01239),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3135 GPIO_FN(MSIOF1_TXD_F),
3136 GPIO_FN(MOUT0),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3137 GPIO_IFN(SSI_WS01239),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3138 GPIO_FN(MSIOF1_SS1_F),
3139 GPIO_FN(MOUT1),
3140 GPIO_IFN(SSI_SDATA0),
3141 GPIO_FN(MSIOF1_SS2_F),
3142 GPIO_FN(MOUT2),
3143
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3144 /* IPSR15 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3145 GPIO_IFN(SSI_SDATA1_A),
3146 GPIO_FN(MOUT5),
3147 GPIO_IFN(SSI_SDATA2_A),
3148 GPIO_FN(SSI_SCK1_B),
3149 GPIO_FN(MOUT6),
3150 GPIO_IFN(SSI_SCK34),
3151 GPIO_FN(MSIOF1_SS1_A),
3152 GPIO_FN(STP_OPWM_0_A),
3153 GPIO_IFN(SSI_WS34),
3154 GPIO_FN(HCTS2x_A),
3155 GPIO_FN(MSIOF1_SS2_A),
3156 GPIO_FN(STP_IVCXO27_0_A),
3157 GPIO_IFN(SSI_SDATA3),
3158 GPIO_FN(HRTS2x_A),
3159 GPIO_FN(MSIOF1_TXD_A),
3160 GPIO_FN(TS_SCK0_A),
3161 GPIO_FN(STP_ISCLK_0_A),
3162 GPIO_FN(RIF0_D1_A),
3163 GPIO_FN(RIF2_D0_A),
3164 GPIO_IFN(SSI_SCK4),
3165 GPIO_FN(HRX2_A),
3166 GPIO_FN(MSIOF1_SCK_A),
3167 GPIO_FN(TS_SDAT0_A),
3168 GPIO_FN(STP_ISD_0_A),
3169 GPIO_FN(RIF0_CLK_A),
3170 GPIO_FN(RIF2_CLK_A),
3171 GPIO_IFN(SSI_WS4),
3172 GPIO_FN(HTX2_A),
3173 GPIO_FN(MSIOF1_SYNC_A),
3174 GPIO_FN(TS_SDEN0_A),
3175 GPIO_FN(STP_ISEN_0_A),
3176 GPIO_FN(RIF0_SYNC_A),
3177 GPIO_FN(RIF2_SYNC_A),
3178 GPIO_IFN(SSI_SDATA4),
3179 GPIO_FN(HSCK2_A),
3180 GPIO_FN(MSIOF1_RXD_A),
3181 GPIO_FN(TS_SPSYNC0_A),
3182 GPIO_FN(STP_ISSYNC_0_A),
3183 GPIO_FN(RIF0_D0_A),
3184 GPIO_FN(RIF2_D1_A),
3185
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3186 /* IPSR16 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3187 GPIO_IFN(SSI_SCK6),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3188 GPIO_FN(SIM0_RST_D),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3189 GPIO_IFN(SSI_WS6),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3190 GPIO_FN(SIM0_D_D),
3191 GPIO_IFN(SSI_SDATA6),
3192 GPIO_FN(SIM0_CLK_D),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3193 GPIO_FN(SATA_DEVSLP_A),
3194 GPIO_IFN(SSI_SCK78),
3195 GPIO_FN(HRX2_B),
3196 GPIO_FN(MSIOF1_SCK_C),
3197 GPIO_FN(TS_SCK1_A),
3198 GPIO_FN(STP_ISCLK_1_A),
3199 GPIO_FN(RIF1_CLK_A),
3200 GPIO_FN(RIF3_CLK_A),
3201 GPIO_IFN(SSI_WS78),
3202 GPIO_FN(HTX2_B),
3203 GPIO_FN(MSIOF1_SYNC_C),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3204 GPIO_FN(TS_SDAT1_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3205 GPIO_FN(STP_ISD_1_A),
3206 GPIO_FN(RIF1_SYNC_A),
3207 GPIO_FN(RIF3_SYNC_A),
3208 GPIO_IFN(SSI_SDATA7),
3209 GPIO_FN(HCTS2x_B),
3210 GPIO_FN(MSIOF1_RXD_C),
3211 GPIO_FN(TS_SDEN1_A),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3212 GPIO_FN(STP_ISEN_1_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3213 GPIO_FN(RIF1_D0_A),
3214 GPIO_FN(RIF3_D0_A),
3215 GPIO_FN(TCLK2_A),
3216 GPIO_IFN(SSI_SDATA8),
3217 GPIO_FN(HRTS2x_B),
3218 GPIO_FN(MSIOF1_TXD_C),
3219 GPIO_FN(TS_SPSYNC1_A),
3220 GPIO_FN(STP_ISSYNC_1_A),
3221 GPIO_FN(RIF1_D1_A),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3222 GPIO_FN(RIF3_D1_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3223 GPIO_IFN(SSI_SDATA9_A),
3224 GPIO_FN(HSCK2_B),
3225 GPIO_FN(MSIOF1_SS1_C),
3226 GPIO_FN(HSCK1_A),
3227 GPIO_FN(SSI_WS1_B),
3228 GPIO_FN(SCK1),
3229 GPIO_FN(STP_IVCXO27_1_A),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3230 GPIO_FN(SCK5_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3231
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3232 /* IPSR17 */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3233 GPIO_IFN(AUDIO_CLKA_A),
3234 GPIO_FN(CC5_OSCOUT),
3235 GPIO_IFN(AUDIO_CLKB_B),
3236 GPIO_FN(SCIF_CLK_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3237 GPIO_FN(STP_IVCXO27_1_D),
3238 GPIO_FN(REMOCON_A),
3239 GPIO_FN(TCLK1_A),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3240 GPIO_IFN(USB0_PWEN),
3241 GPIO_FN(SIM0_RST_C),
3242 GPIO_FN(TS_SCK1_D),
3243 GPIO_FN(STP_ISCLK_1_D),
3244 GPIO_FN(BPFCLK_B),
3245 GPIO_FN(RIF3_CLK_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3246 GPIO_FN(HSCK2_C),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3247 GPIO_IFN(USB0_OVC),
3248 GPIO_FN(SIM0_D_C),
3249 GPIO_FN(TS_SDAT1_D),
3250 GPIO_FN(STP_ISD_1_D),
3251 GPIO_FN(RIF3_SYNC_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3252 GPIO_FN(HRX2_C),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3253 GPIO_IFN(USB1_PWEN),
3254 GPIO_FN(SIM0_CLK_C),
3255 GPIO_FN(SSI_SCK1_A),
3256 GPIO_FN(TS_SCK0_E),
3257 GPIO_FN(STP_ISCLK_0_E),
3258 GPIO_FN(FMCLK_B),
3259 GPIO_FN(RIF2_CLK_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3260 GPIO_FN(SPEEDIN_A),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3261 GPIO_FN(HTX2_C),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3262 GPIO_IFN(USB1_OVC),
3263 GPIO_FN(MSIOF1_SS2_C),
3264 GPIO_FN(SSI_WS1_A),
3265 GPIO_FN(TS_SDAT0_E),
3266 GPIO_FN(STP_ISD_0_E),
3267 GPIO_FN(FMIN_B),
3268 GPIO_FN(RIF2_SYNC_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3269 GPIO_FN(REMOCON_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3270 GPIO_FN(HCTS2x_C),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3271 GPIO_IFN(USB30_PWEN),
3272 GPIO_FN(AUDIO_CLKOUT_B),
3273 GPIO_FN(SSI_SCK2_B),
3274 GPIO_FN(TS_SDEN1_D),
3275 GPIO_FN(STP_ISEN_1_D),
3276 GPIO_FN(STP_OPWM_0_E),
3277 GPIO_FN(RIF3_D0_B),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3278 GPIO_FN(TCLK2_B),
3279 GPIO_FN(TPU0TO0),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3280 GPIO_FN(BPFCLK_C),
3281 GPIO_FN(HRTS2x_C),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3282 GPIO_IFN(USB30_OVC),
3283 GPIO_FN(AUDIO_CLKOUT1_B),
3284 GPIO_FN(SSI_WS2_B),
3285 GPIO_FN(TS_SPSYNC1_D),
3286 GPIO_FN(STP_ISSYNC_1_D),
3287 GPIO_FN(STP_IVCXO27_0_E),
3288 GPIO_FN(RIF3_D1_B),
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3289 GPIO_FN(FSO_TOEx),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3290 GPIO_FN(TPU0TO1),
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3291};
3292
3293static struct pinmux_cfg_reg pinmux_config_regs[] = {
3294 /* GPSR0(0xE6060100) md[3:1] controls initial value */
3295 /* md[3:1] .. 0 : 0x0000FFFF */
3296 /* .. other : 0x00000000 */
3297 { PINMUX_CFG_REG("GPSR0", 0xE6060100, 32, 1) {
3298 0, 0,
3299 0, 0,
3300 0, 0,
3301 0, 0,
3302 0, 0,
3303 0, 0,
3304 0, 0,
3305 0, 0,
3306
3307 0, 0,
3308 0, 0,
3309 0, 0,
3310 0, 0,
3311 0, 0,
3312 0, 0,
3313 0, 0,
3314 0, 0,
3315
3316 GP_0_15_FN, GFN_D15,
3317 GP_0_14_FN, GFN_D14,
3318 GP_0_13_FN, GFN_D13,
3319 GP_0_12_FN, GFN_D12,
3320 GP_0_11_FN, GFN_D11,
3321 GP_0_10_FN, GFN_D10,
3322 GP_0_9_FN, GFN_D9,
3323 GP_0_8_FN, GFN_D8,
3324 GP_0_7_FN, GFN_D7,
3325 GP_0_6_FN, GFN_D6,
3326 GP_0_5_FN, GFN_D5,
3327 GP_0_4_FN, GFN_D4,
3328 GP_0_3_FN, GFN_D3,
3329 GP_0_2_FN, GFN_D2,
3330 GP_0_1_FN, GFN_D1,
3331 GP_0_0_FN, GFN_D0 }
3332 },
3333 /* GPSR1(0xE6060104) is md[3:1] controls initial value */
3334 /* md[3:1] .. 0 : 0x0EFFFFFF */
3335 /* .. other : 0x00000000 */
3336 { PINMUX_CFG_REG("GPSR1", 0xE6060104, 32, 1) {
3337 0, 0,
3338 0, 0,
3339 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3340 GP_1_28_FN, GFN_CLKOUT,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3341 GP_1_27_FN, GFN_EX_WAIT0_A,
3342 GP_1_26_FN, GFN_WE1x,
3343 GP_1_25_FN, GFN_WE0x,
3344 GP_1_24_FN, GFN_RD_WRx,
3345 GP_1_23_FN, GFN_RDx,
3346 GP_1_22_FN, GFN_BSx,
3347 GP_1_21_FN, GFN_CS1x_A26,
3348 GP_1_20_FN, GFN_CS0x,
3349 GP_1_19_FN, GFN_A19,
3350 GP_1_18_FN, GFN_A18,
3351 GP_1_17_FN, GFN_A17,
3352 GP_1_16_FN, GFN_A16,
3353 GP_1_15_FN, GFN_A15,
3354 GP_1_14_FN, GFN_A14,
3355 GP_1_13_FN, GFN_A13,
3356 GP_1_12_FN, GFN_A12,
3357 GP_1_11_FN, GFN_A11,
3358 GP_1_10_FN, GFN_A10,
3359 GP_1_9_FN, GFN_A9,
3360 GP_1_8_FN, GFN_A8,
3361 GP_1_7_FN, GFN_A7,
3362 GP_1_6_FN, GFN_A6,
3363 GP_1_5_FN, GFN_A5,
3364 GP_1_4_FN, GFN_A4,
3365 GP_1_3_FN, GFN_A3,
3366 GP_1_2_FN, GFN_A2,
3367 GP_1_1_FN, GFN_A1,
3368 GP_1_0_FN, GFN_A0 }
3369 },
3370 /* GPSR2(0xE6060108) is md[3:1] controls */
3371 /* md[3:1] .. 0 : 0x000003C0 */
3372 /* .. other : 0x00000200 */
3373 { PINMUX_CFG_REG("GPSR2", 0xE6060108, 32, 1) {
3374 0, 0,
3375 0, 0,
3376 0, 0,
3377 0, 0,
3378 0, 0,
3379 0, 0,
3380 0, 0,
3381 0, 0,
3382
3383 0, 0,
3384 0, 0,
3385 0, 0,
3386 0, 0,
3387 0, 0,
3388 0, 0,
3389 0, 0,
3390 0, 0,
3391
3392 0, 0,
3393 GP_2_14_FN, GFN_AVB_AVTP_CAPTURE_A,
3394 GP_2_13_FN, GFN_AVB_AVTP_MATCH_A,
3395 GP_2_12_FN, GFN_AVB_LINK,
3396 GP_2_11_FN, GFN_AVB_PHY_INT,
3397 GP_2_10_FN, GFN_AVB_MAGIC,
3398 GP_2_9_FN, GFN_AVB_MDC,
3399 GP_2_8_FN, GFN_PWM2_A,
3400 GP_2_7_FN, GFN_PWM1_A,
3401 GP_2_6_FN, GFN_PWM0,
3402 GP_2_5_FN, GFN_IRQ5,
3403 GP_2_4_FN, GFN_IRQ4,
3404 GP_2_3_FN, GFN_IRQ3,
3405 GP_2_2_FN, GFN_IRQ2,
3406 GP_2_1_FN, GFN_IRQ1,
3407 GP_2_0_FN, GFN_IRQ0 }
3408 },
3409
3410 /* GPSR3 */
3411 { PINMUX_CFG_REG("GPSR3", 0xE606010C, 32, 1) {
3412 0, 0,
3413 0, 0,
3414 0, 0,
3415 0, 0,
3416 0, 0,
3417 0, 0,
3418 0, 0,
3419 0, 0,
3420
3421 0, 0,
3422 0, 0,
3423 0, 0,
3424 0, 0,
3425 0, 0,
3426 0, 0,
3427 0, 0,
3428 0, 0,
3429
3430 GP_3_15_FN, GFN_SD1_WP,
3431 GP_3_14_FN, GFN_SD1_CD,
3432 GP_3_13_FN, GFN_SD0_WP,
3433 GP_3_12_FN, GFN_SD0_CD,
3434 GP_3_11_FN, GFN_SD1_DAT3,
3435 GP_3_10_FN, GFN_SD1_DAT2,
3436 GP_3_9_FN, GFN_SD1_DAT1,
3437 GP_3_8_FN, GFN_SD1_DAT0,
3438 GP_3_7_FN, GFN_SD1_CMD,
3439 GP_3_6_FN, GFN_SD1_CLK,
3440 GP_3_5_FN, GFN_SD0_DAT3,
3441 GP_3_4_FN, GFN_SD0_DAT2,
3442 GP_3_3_FN, GFN_SD0_DAT1,
3443 GP_3_2_FN, GFN_SD0_DAT0,
3444 GP_3_1_FN, GFN_SD0_CMD,
3445 GP_3_0_FN, GFN_SD0_CLK }
3446 },
3447 /* GPSR4 */
3448 { PINMUX_CFG_REG("GPSR4", 0xE6060110, 32, 1) {
3449 0, 0,
3450 0, 0,
3451 0, 0,
3452 0, 0,
3453 0, 0,
3454 0, 0,
3455 0, 0,
3456 0, 0,
3457
3458 0, 0,
3459 0, 0,
3460 0, 0,
3461 0, 0,
3462 0, 0,
3463 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3464 GP_4_17_FN, GFN_SD3_DS,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3465 GP_4_16_FN, GFN_SD3_DAT7,
3466
3467 GP_4_15_FN, GFN_SD3_DAT6,
3468 GP_4_14_FN, GFN_SD3_DAT5,
3469 GP_4_13_FN, GFN_SD3_DAT4,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3470 GP_4_12_FN, GFN_SD3_DAT3,
3471 GP_4_11_FN, GFN_SD3_DAT2,
3472 GP_4_10_FN, GFN_SD3_DAT1,
3473 GP_4_9_FN, GFN_SD3_DAT0,
3474 GP_4_8_FN, GFN_SD3_CMD,
3475 GP_4_7_FN, GFN_SD3_CLK,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3476 GP_4_6_FN, GFN_SD2_DS,
3477 GP_4_5_FN, GFN_SD2_DAT3,
3478 GP_4_4_FN, GFN_SD2_DAT2,
3479 GP_4_3_FN, GFN_SD2_DAT1,
3480 GP_4_2_FN, GFN_SD2_DAT0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3481 GP_4_1_FN, GFN_SD2_CMD,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3482 GP_4_0_FN, GFN_SD2_CLK }
3483 },
3484 /* GPSR5 */
3485 { PINMUX_CFG_REG("GPSR5", 0xE6060114, 32, 1) {
3486 0, 0,
3487 0, 0,
3488 0, 0,
3489 0, 0,
3490 0, 0,
3491 0, 0,
3492 GP_5_25_FN, GFN_MLB_DAT,
3493 GP_5_24_FN, GFN_MLB_SIG,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3494 GP_5_23_FN, GFN_MLB_CLK,
3495 GP_5_22_FN, FN_MSIOF0_RXD,
3496 GP_5_21_FN, GFN_MSIOF0_SS2,
3497 GP_5_20_FN, FN_MSIOF0_TXD,
3498 GP_5_19_FN, GFN_MSIOF0_SS1,
3499 GP_5_18_FN, GFN_MSIOF0_SYNC,
3500 GP_5_17_FN, FN_MSIOF0_SCK,
3501 GP_5_16_FN, GFN_HRTS0x,
3502 GP_5_15_FN, GFN_HCTS0x,
3503 GP_5_14_FN, GFN_HTX0,
3504 GP_5_13_FN, GFN_HRX0,
3505 GP_5_12_FN, GFN_HSCK0,
3506 GP_5_11_FN, GFN_RX2_A,
3507 GP_5_10_FN, GFN_TX2_A,
3508 GP_5_9_FN, GFN_SCK2,
3509 GP_5_8_FN, GFN_RTS1x_TANS,
3510 GP_5_7_FN, GFN_CTS1x,
3511 GP_5_6_FN, GFN_TX1_A,
3512 GP_5_5_FN, GFN_RX1_A,
3513 GP_5_4_FN, GFN_RTS0x_TANS,
3514 GP_5_3_FN, GFN_CTS0x,
3515 GP_5_2_FN, GFN_TX0,
3516 GP_5_1_FN, GFN_RX0,
3517 GP_5_0_FN, GFN_SCK0 }
3518 },
3519 /* GPSR6 */
3520 { PINMUX_CFG_REG("GPSR6", 0xE6060118, 32, 1) {
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3521 GP_6_31_FN, GFN_USB3_OVC,
3522 GP_6_30_FN, GFN_USB3_PWEN,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3523 GP_6_29_FN, GFN_USB30_OVC,
3524 GP_6_28_FN, GFN_USB30_PWEN,
3525 GP_6_27_FN, GFN_USB1_OVC,
3526 GP_6_26_FN, GFN_USB1_PWEN,
3527 GP_6_25_FN, GFN_USB0_OVC,
3528 GP_6_24_FN, GFN_USB0_PWEN,
3529 GP_6_23_FN, GFN_AUDIO_CLKB_B,
3530 GP_6_22_FN, GFN_AUDIO_CLKA_A,
3531 GP_6_21_FN, GFN_SSI_SDATA9_A,
3532 GP_6_20_FN, GFN_SSI_SDATA8,
3533 GP_6_19_FN, GFN_SSI_SDATA7,
3534 GP_6_18_FN, GFN_SSI_WS78,
3535 GP_6_17_FN, GFN_SSI_SCK78,
3536 GP_6_16_FN, GFN_SSI_SDATA6,
3537 GP_6_15_FN, GFN_SSI_WS6,
3538 GP_6_14_FN, GFN_SSI_SCK6,
3539 GP_6_13_FN, FN_SSI_SDATA5,
3540 GP_6_12_FN, FN_SSI_WS5,
3541 GP_6_11_FN, FN_SSI_SCK5,
3542 GP_6_10_FN, GFN_SSI_SDATA4,
3543 GP_6_9_FN, GFN_SSI_WS4,
3544 GP_6_8_FN, GFN_SSI_SCK4,
3545 GP_6_7_FN, GFN_SSI_SDATA3,
3546 GP_6_6_FN, GFN_SSI_WS34,
3547 GP_6_5_FN, GFN_SSI_SCK34,
3548 GP_6_4_FN, GFN_SSI_SDATA2_A,
3549 GP_6_3_FN, GFN_SSI_SDATA1_A,
3550 GP_6_2_FN, GFN_SSI_SDATA0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3551 GP_6_1_FN, GFN_SSI_WS01239,
3552 GP_6_0_FN, GFN_SSI_SCK01239 }
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3553 },
3554 /* GPSR7 */
3555 { PINMUX_CFG_REG("GPSR7", 0xE606011C, 32, 1) {
3556 0, 0,
3557 0, 0,
3558 0, 0,
3559 0, 0,
3560 0, 0,
3561 0, 0,
3562 0, 0,
3563 0, 0,
3564
3565 0, 0,
3566 0, 0,
3567 0, 0,
3568 0, 0,
3569 0, 0,
3570 0, 0,
3571 0, 0,
3572 0, 0,
3573
3574 0, 0,
3575 0, 0,
3576 0, 0,
3577 0, 0,
3578 0, 0,
3579 0, 0,
3580 0, 0,
3581 0, 0,
3582
3583 0, 0,
3584 0, 0,
3585 0, 0,
3586 0, 0,
3587 GP_7_3_FN, FN_HDMI1_CEC,
3588 GP_7_2_FN, FN_HDMI0_CEC,
3589 GP_7_1_FN, FN_AVS2,
3590 GP_7_0_FN, FN_AVS1 }
3591 },
3592 { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060200, 32,
3593 4, 4, 4, 4, 4, 4, 4, 4) {
3594 /* IPSR0_31_28 [4] */
3595 IFN_IRQ1, FN_QPOLA, 0, FN_DU_DISP,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3596 FN_VI4_DATA1_B, FN_CAN0_RX_B, FN_CANFD0_RX_B, FN_MSIOF3_SS1_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3597 0, 0, 0, 0,
3598 0, 0, 0, 0,
3599 /* IPSR0_27_24 [4] */
3600 IFN_IRQ0, FN_QPOLB, 0, FN_DU_CDE,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3601 FN_VI4_DATA0_B, FN_CAN0_TX_B, FN_CANFD0_TX_B, FN_MSIOF3_SS2_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3602 0, 0, 0, 0,
3603 0, 0, 0, 0,
3604 /* IPSR0_23_20 [4] */
3605 IFN_AVB_AVTP_CAPTURE_A, 0, FN_MSIOF2_TXD_C, FN_RTS4x_TANS_A,
3606 0, 0, 0, 0,
3607 0, 0, 0, 0,
3608 0, 0, 0, 0,
3609 /* IPSR0_19_16 [4] */
3610 IFN_AVB_AVTP_MATCH_A, 0, FN_MSIOF2_RXD_C, FN_CTS4x_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3611 0, FN_FSCLKST2x_A, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3612 0, 0, 0, 0,
3613 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3614 /* IPSR0_15_12 [4] */
3615 IFN_AVB_LINK, 0, FN_MSIOF2_SCK_C, FN_TX4_A,
3616 0, 0, 0, 0,
3617 0, 0, 0, 0,
3618 0, 0, 0, 0,
3619 /* IPSR0_11_8 [4] */
3620 IFN_AVB_PHY_INT, 0, FN_MSIOF2_SYNC_C, FN_RX4_A,
3621 0, 0, 0, 0,
3622 0, 0, 0, 0,
3623 0, 0, 0, 0,
3624 /* IPSR0_7_4 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3625 IFN_AVB_MAGIC, 0, FN_MSIOF2_SS1_C, FN_SCK4_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3626 0, 0, 0, 0,
3627 0, 0, 0, 0,
3628 0, 0, 0, 0,
3629 /* IPSR0_3_0 [4] */
3630 IFN_AVB_MDC, 0, FN_MSIOF2_SS2_C, 0,
3631 0, 0, 0, 0,
3632 0, 0, 0, 0,
3633 0, 0, 0, 0,
3634 }
3635 },
3636 { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060204, 32,
3637 4, 4, 4, 4, 4, 4, 4, 4) {
3638 /* IPSR1_31_28 [4] */
3639 IFN_A0, FN_LCDOUT16, FN_MSIOF3_SYNC_B, 0,
3640 FN_VI4_DATA8, 0, FN_DU_DB0, 0,
3641 0, FN_PWM3_A, 0, 0,
3642 0, 0, 0, 0,
3643 /* IPSR1_27_24 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3644 IFN_PWM2_A, 0, 0, FN_HTX3_D,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3645 0, 0, 0, 0,
3646 0, FN_IETX_B, 0, 0,
3647 0, 0, 0, 0,
3648 /* IPSR1_23_20 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3649 IFN_PWM1_A, 0, 0, FN_HRX3_D,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3650 FN_VI4_DATA7_B, 0, 0, 0,
3651 0, FN_IERX_B, 0, 0,
3652 0, 0, 0, 0,
3653 /* IPSR1_19_16 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3654 IFN_PWM0, FN_AVB_AVTP_PPS, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3655 FN_VI4_DATA6_B, 0, 0, 0,
3656 0, FN_IECLK_B, 0, 0,
3657 0, 0, 0, 0,
3658 /* IPSR1_15_12 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3659 IFN_IRQ5, FN_QSTB_QHE, 0, FN_DU_EXVSYNC_DU_VSYNC,
3660 FN_VI4_DATA5_B, FN_FSCLKST2x_B, 0, FN_MSIOF3_TXD_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3661 0, FN_PWM6_B, 0, 0,
3662 0, 0, 0, 0,
3663 /* IPSR1_11_8 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3664 IFN_IRQ4, FN_QSTH_QHS, 0, FN_DU_EXHSYNC_DU_HSYNC,
3665 FN_VI4_DATA4_B, 0, 0, FN_MSIOF3_RXD_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3666 0, FN_PWM5_B, 0, 0,
3667 0, 0, 0, 0,
3668 /* IPSR1_7_4 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3669 IFN_IRQ3, FN_QSTVB_QVE, 0, FN_DU_DOTCLKOUT1,
3670 FN_VI4_DATA3_B, 0, 0, FN_MSIOF3_SCK_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3671 0, FN_PWM4_B, 0, 0,
3672 0, 0, 0, 0,
3673 /* IPSR1_3_0 [4] */
3674 IFN_IRQ2, FN_QCPV_QDE, 0, FN_DU_EXODDF_DU_ODDF_DISP_CDE,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3675 FN_VI4_DATA2_B, 0, 0, FN_MSIOF3_SYNC_E,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3676 0, FN_PWM3_B, 0, 0,
3677 0, 0, 0, 0
3678 }
3679 },
3680 { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060208, 32,
3681 4, 4, 4, 4, 4, 4, 4, 4) {
3682 /* IPSR2_31_28 [4] */
3683 IFN_A8, FN_RX3_B, FN_MSIOF2_SYNC_A, FN_HRX4_B,
3684 0, 0, 0, FN_SDA6_A,
3685 FN_AVB_AVTP_MATCH_B, FN_PWM1_B, 0, 0,
3686 0, 0, 0, 0,
3687 /* IPSR2_27_24 [4] */
3688 IFN_A7, FN_LCDOUT23, FN_MSIOF2_SS2_A, FN_TX4_B,
3689 FN_VI4_DATA15, FN_V15_DATA15, FN_DU_DB7, 0,
3690 0, 0, 0, 0,
3691 0, 0, 0, 0,
3692 /* IPSR2_23_20 [4] */
3693 IFN_A6, FN_LCDOUT22, FN_MSIOF2_SS1_A, FN_RX4_B,
3694 FN_VI4_DATA14, FN_VI5_DATA14, FN_DU_DB6, 0,
3695 0, 0, 0, 0,
3696 0, 0, 0, 0,
3697 /* IPSR2_19_16 [4] */
3698 IFN_A5, FN_LCDOUT21, FN_MSIOF3_SS2_B, FN_SCK4_B,
3699 FN_VI4_DATA13, FN_VI5_DATA13, FN_DU_DB5, 0,
3700 0, 0, 0, 0,
3701 0, 0, 0, 0,
3702 /* IPSR2_15_12 [4] */
3703 IFN_A4, FN_LCDOUT20, FN_MSIOF3_SS1_B, 0,
3704 FN_VI4_DATA12, FN_VI5_DATA12, FN_DU_DB4, 0,
3705 0, 0, 0, 0,
3706 0, 0, 0, 0,
3707 /* IPSR2_11_8 [4] */
3708 IFN_A3, FN_LCDOUT19, FN_MSIOF3_RXD_B, 0,
3709 FN_VI4_DATA11, 0, FN_DU_DB3, 0,
3710 0, FN_PWM6_A, 0, 0,
3711 0, 0, 0, 0,
3712 /* IPSR2_7_4 [4] */
3713 IFN_A2, FN_LCDOUT18, FN_MSIOF3_SCK_B, 0,
3714 FN_VI4_DATA10, 0, FN_DU_DB2, 0,
3715 0, FN_PWM5_A, 0, 0,
3716 0, 0, 0, 0,
3717 /* IPSR2_3_0 [4] */
3718 IFN_A1, FN_LCDOUT17, FN_MSIOF3_TXD_B, 0,
3719 FN_VI4_DATA9, 0, FN_DU_DB1, 0,
3720 0, FN_PWM4_A, 0, 0,
3721 0, 0, 0, 0,
3722 }
3723 },
3724 { PINMUX_CFG_REG_VAR("IPSR3", 0xE606020C, 32,
3725 4, 4, 4, 4, 4, 4, 4, 4) {
3726 /* IPSR3_31_28 [4] */
3727 IFN_A16, FN_LCDOUT8, 0, 0,
3728 FN_VI4_FIELD, 0, FN_DU_DG0, 0,
3729 0, 0, 0, 0,
3730 0, 0, 0, 0,
3731 /* IPSR3_27_24 [4] */
3732 IFN_A15, FN_LCDOUT15, FN_MSIOF3_TXD_C, 0,
3733 FN_HRTS4x, FN_VI5_DATA11, FN_DU_DG7, 0,
3734 0, 0, 0, 0,
3735 0, 0, 0, 0,
3736 /* IPSR3_23_20 [4] */
3737 IFN_A14, FN_LCDOUT14, FN_MSIOF3_RXD_C, 0,
3738 FN_HCTS4x, FN_VI5_DATA10, FN_DU_DG6, 0,
3739 0, 0, 0, 0,
3740 0, 0, 0, 0,
3741 /* IPSR3_19_16 [4] */
3742 IFN_A13, FN_LCDOUT13, FN_MSIOF3_SYNC_C, 0,
3743 FN_HTX4_A, FN_VI5_DATA9, FN_DU_DG5, 0,
3744 0, 0, 0, 0,
3745 0, 0, 0, 0,
3746 /* IPSR3_15_12 [4] */
3747 IFN_A12, FN_LCDOUT12, FN_MSIOF3_SCK_C, 0,
3748 FN_HRX4_A, FN_VI5_DATA8, FN_DU_DG4, 0,
3749 0, 0, 0, 0,
3750 0, 0, 0, 0,
3751 /* IPSR3_11_8 [4] */
3752 IFN_A11, FN_TX3_B, FN_MSIOF2_TXD_A, FN_HTX4_B,
3753 FN_HSCK4, FN_VI5_FIELD, 0, FN_SCL6_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3754 FN_AVB_AVTP_CAPTURE_B, FN_PWM2_B, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3755 0, 0, 0, 0,
3756 /* IPSR3_7_4 [4] */
3757 IFN_A10, 0, FN_MSIOF2_RXD_A, FN_RTS4n_TANS_B,
3758 0, FN_VI5_HSYNCx, 0, 0,
3759 0, 0, 0, 0,
3760 0, 0, 0, 0,
3761 /* IPSR3_3_0 [4] */
3762 IFN_A9, 0, FN_MSIOF2_SCK_A, FN_CTS4x_B,
3763 0, FN_VI5_VSYNCx, 0, 0,
3764 0, 0, 0, 0,
3765 0, 0, 0, 0,
3766 }
3767 },
3768 { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060210, 32,
3769 4, 4, 4, 4, 4, 4, 4, 4) {
3770 /* IPSR4_31_28 [4] */
3771 IFN_RD_WRx, 0, FN_MSIOF3_RXD_D, FN_TX3_A,
3772 FN_HTX3_A, 0, 0, 0,
3773 FN_CAN0_RX_A, FN_CANFD0_RX_A, 0, 0,
3774 0, 0, 0, 0,
3775 /* IPSR4_27_24 [4] */
3776 IFN_RDx, 0, FN_MSIOF3_SYNC_D, FN_RX3_A,
3777 FN_HRX3_A, 0, 0, 0,
3778 FN_CAN0_TX_A, FN_CANFD0_TX_A, 0, 0,
3779 0, 0, 0, 0,
3780 /* IPSR4_23_20 [4] */
3781 IFN_BSx, FN_QSTVA_QVS, FN_MSIOF3_SCK_D, FN_SCK3,
3782 FN_HSCK3, 0, 0, 0,
3783 FN_CAN1_TX, FN_CANFD1_TX, FN_IETX_A, 0,
3784 0, 0, 0, 0,
3785 /* IPSR4_19_16 [4] */
3786 IFN_CS1x_A26, 0, 0, 0,
3787 0, FN_VI5_CLK, 0, FN_EX_WAIT0_B,
3788 0, 0, 0, 0,
3789 0, 0, 0, 0,
3790 /* IPSR4_15_12 [4] */
3791 IFN_CS0x, 0, 0, 0,
3792 0, FN_VI5_CLKENB, 0, 0,
3793 0, 0, 0, 0,
3794 0, 0, 0, 0,
3795 /* IPSR4_11_8 [4] */
3796 IFN_A19, FN_LCDOUT11, 0, 0,
3797 FN_VI4_CLKENB, 0, FN_DU_DG3, 0,
3798 0, 0, 0, 0,
3799 0, 0, 0, 0,
3800 /* IPSR4_7_4 [4] */
3801 IFN_A18, FN_LCDOUT10, 0, 0,
3802 FN_VI4_HSYNCx, 0, FN_DU_DG2, 0,
3803 0, 0, 0, 0,
3804 0, 0, 0, 0,
3805 /* IPSR4_3_0 [4] */
3806 IFN_A17, FN_LCDOUT9, 0, 0,
3807 FN_VI4_VSYNCx, 0, FN_DU_DG1, 0,
3808 0, 0, 0, 0,
3809 0, 0, 0, 0,
3810 }
3811 },
3812 { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060214, 32,
3813 4, 4, 4, 4, 4, 4, 4, 4) {
3814 /* IPSR5_31_28 [4] */
3815 IFN_D4, FN_MSIOF2_SCK_B, 0, 0,
3816 FN_VI4_DATA20, FN_VI5_DATA4, 0, 0,
3817 0, 0, 0, 0,
3818 0, 0, 0, 0,
3819 /* IPSR5_27_24 [4] */
3820 IFN_D3, 0, FN_MSIOF3_TXD_A, 0,
3821 FN_VI4_DATA19, FN_VI5_DATA3, 0, 0,
3822 0, 0, 0, 0,
3823 0, 0, 0, 0,
3824 /* IPSR5_23_20 [4] */
3825 IFN_D2, 0, FN_MSIOF3_RXD_A, 0,
3826 FN_VI4_DATA18, FN_VI5_DATA2, 0, 0,
3827 0, 0, 0, 0,
3828 0, 0, 0, 0,
3829 /* IPSR5_19_16 [4] */
3830 IFN_D1, FN_MSIOF2_SS2_B, FN_MSIOF3_SYNC_A, 0,
3831 FN_VI4_DATA17, FN_VI5_DATA1, 0, 0,
3832 0, 0, 0, 0,
3833 0, 0, 0, 0,
3834 /* IPSR5_15_12 [4] */
3835 IFN_D0, FN_MSIOF2_SS1_B, FN_MSIOF3_SCK_A, 0,
3836 FN_VI4_DATA16, FN_VI5_DATA0, 0, 0,
3837 0, 0, 0, 0,
3838 0, 0, 0, 0,
3839 /* IPSR5_11_8 [4] */
3840 IFN_EX_WAIT0_A, FN_QCLK, 0, 0,
3841 FN_VI4_CLK, 0, FN_DU_DOTCLKOUT0, 0,
3842 0, 0, 0, 0,
3843 0, 0, 0, 0,
3844 /* IPSR5_7_4 [4] */
3845 IFN_WE1x, 0, FN_MSIOF3_SS1_D, FN_RTS3x_TANS,
3846 FN_HRTS3x, 0, 0, FN_SDA6_B,
3847 FN_CAN1_RX, FN_CANFD1_RX, FN_IERX_A, 0,
3848 0, 0, 0, 0,
3849 /* IPSR5_3_0 [4] */
3850 IFN_WE0x, 0, FN_MSIIOF3_TXD_D, FN_CTS3x,
3851 FN_HCTS3x, 0, 0, FN_SCL6_B,
3852 FN_CAN_CLK, 0, FN_IECLK_A, 0,
3853 0, 0, 0, 0,
3854 }
3855 },
3856 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060218, 32,
3857 4, 4, 4, 4, 4, 4, 4, 4) {
3858 /* IPSR6_31_28 [4] */
3859 IFN_D12, FN_LCDOUT4, FN_MSIOF2_SS1_D, FN_RX4_C,
3860 FN_VI4_DATA4_A, 0, FN_DU_DR4, 0,
3861 0, 0, 0, 0,
3862 0, 0, 0, 0,
3863 /* IPSR6_27_24 [4] */
3864 IFN_D11, FN_LCDOUT3, FN_MSIOF2_TXD_D, FN_HTX3_B,
3865 FN_VI4_DATA3_A, FN_RTS4x_TANS_C, FN_DU_DR3, 0,
3866 0, 0, 0, 0,
3867 0, 0, 0, 0,
3868 /* IPSR6_23_20 [4] */
3869 IFN_D10, FN_LCDOUT2, FN_MSIOF2_RXD_D, FN_HRX3_B,
3870 FN_VI4_DATA2_A, FN_CTS4x_C, FN_DU_DR2, 0,
3871 0, 0, 0, 0,
3872 0, 0, 0, 0,
3873 /* IPSR6_19_16 [4] */
3874 IFN_D9, FN_LCDOUT1, FN_MSIOF2_SYNC_D, 0,
3875 FN_VI4_DATA1_A, 0, FN_DU_DR1, 0,
3876 0, 0, 0, 0,
3877 0, 0, 0, 0,
3878 /* IPSR6_15_12 [4] */
3879 IFN_D8, FN_LCDOUT0, FN_MSIOF2_SCK_D, FN_SCK4_C,
3880 FN_VI4_DATA0_A, 0, FN_DU_DR0, 0,
3881 0, 0, 0, 0,
3882 0, 0, 0, 0,
3883 /* IPSR6_11_8 [4] */
3884 IFN_D7, FN_MSIOF2_TXD_B, 0, 0,
3885 FN_VI4_DATA23, FN_VI5_DATA7, 0, 0,
3886 0, 0, 0, 0,
3887 0, 0, 0, 0,
3888 /* IPSR6_7_4 [4] */
3889 IFN_D6, FN_MSIOF2_RXD_B, 0, 0,
3890 FN_VI4_DATA22, FN_VI5_DATA6, 0, 0,
3891 0, 0, 0, 0,
3892 0, 0, 0, 0,
3893 /* IPSR6_3_0 [4] */
3894 IFN_D5, FN_MSIOF2_SYNC_B, 0, 0,
3895 FN_VI4_DATA21, FN_VI5_DATA5, 0, 0,
3896 0, 0, 0, 0,
3897 0, 0, 0, 0,
3898 }
3899 },
3900 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606021C, 32,
3901 4, 4, 4, 4, 4, 4, 4, 4) {
3902 /* IPSR7_31_28 [4] */
3903 IFN_SD0_DAT1, 0, FN_MSIOF1_TXD_E, 0,
3904 0, FN_TS_SPSYNC0_B, FN_STP_ISSYNC_0_B, 0,
3905 0, 0, 0, 0,
3906 0, 0, 0, 0,
3907 /* IPSR7_27_24 [4] */
3908 IFN_SD0_DAT0, 0, FN_MSIOF1_RXD_E, 0,
3909 0, FN_TS_SCK0_B, FN_STP_ISCLK_0_B, 0,
3910 0, 0, 0, 0,
3911 0, 0, 0, 0,
3912 /* IPSR7_23_20 [4] */
3913 IFN_SD0_CMD, 0, FN_MSIOF1_SYNC_E, 0,
3914 0, 0, FN_STP_IVCXO27_0_B, 0,
3915 0, 0, 0, 0,
3916 0, 0, 0, 0,
3917 /* IPSR7_19_16 [4] */
3918 IFN_SD0_CLK, 0, FN_MSIOF1_SCK_E, 0,
3919 0, 0, FN_STP_OPWM_0_B, 0,
3920 0, 0, 0, 0,
3921 0, 0, 0, 0,
3922 /* IPSR7_15_12 [4] */
3923 FN_FSCLKST, 0, 0, 0,
3924 0, 0, 0, 0,
3925 0, 0, 0, 0,
3926 0, 0, 0, 0,
3927 /* IPSR7_11_8 [4] */
3928 IFN_D15, FN_LCDOUT7, FN_MSIOF3_SS2_A, FN_HTX3_C,
3929 FN_VI4_DATA7_A, 0, FN_DU_DR7, FN_SDA6_C,
3930 0, 0, 0, 0,
3931 0, 0, 0, 0,
3932 /* IPSR7_7_4 [4] */
3933 IFN_D14, FN_LCDOUT6, FN_MSIOF3_SS1_A, FN_HRX3_C,
3934 FN_VI4_DATA6_A, 0, FN_DU_DR6, FN_SCL6_C,
3935 0, 0, 0, 0,
3936 0, 0, 0, 0,
3937 /* IPSR7_3_0 [4] */
3938 IFN_D13, FN_LCDOUT5, FN_MSIOF2_SS2_D, FN_TX4_C,
3939 FN_VI4_DATA5_A, 0, FN_DU_DR5, 0,
3940 0, 0, 0, 0,
3941 0, 0, 0, 0,
3942 }
3943 },
3944 { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060220, 32,
3945 4, 4, 4, 4, 4, 4, 4, 4) {
3946 /* IPSR8_31_28 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3947 IFN_SD1_DAT3, FN_SD2_DAT7, FN_MSIOF1_SS2_G, FN_NFRBx_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3948 0, FN_TS_SDEN1_B, FN_STP_ISEN_1_B, 0,
3949 0, 0, 0, 0,
3950 0, 0, 0, 0,
3951 /* IPSR8_27_24 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3952 IFN_SD1_DAT2, FN_SD2_DAT6, FN_MSIOF1_SS1_G, FN_NFDATA15_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3953 0, FN_TS_SDAT1_B, FN_STP_IOD_1_B, 0,
3954 0, 0, 0, 0,
3955 0, 0, 0, 0,
3956 /* IPSR8_23_20 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3957 IFN_SD1_DAT1, FN_SD2_DAT5, FN_MSIOF1_TXD_G, FN_NFDATA14_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3958 0, FN_TS_SPSYNC1_B, FN_STP_ISSYNC_1_B, 0,
3959 0, 0, 0, 0,
3960 0, 0, 0, 0,
3961 /* IPSR8_19_16 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3962 IFN_SD1_DAT0, FN_SD2_DAT4, FN_MSIOF1_RXD_G, FN_NFWPx_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3963 0, FN_TS_SCK1_B, FN_STP_ISCLK_1_B, 0,
3964 0, 0, 0, 0,
3965 0, 0, 0, 0,
3966 /* IPSR8_15_12 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3967 IFN_SD1_CMD, 0, FN_MSIOF1_SYNC_G, FN_NFCEx_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3968 0, FN_SIM0_D_A, FN_STP_IVCXO27_1_B, 0,
3969 0, 0, 0, 0,
3970 0, 0, 0, 0,
3971 /* IPSR8_11_8 [4] */
3972 IFN_SD1_CLK, 0, FN_MSIOF1_SCK_G, 0,
3973 0, FN_SIM0_CLK_A, 0, 0,
3974 0, 0, 0, 0,
3975 0, 0, 0, 0,
3976 /* IPSR8_7_4 [4] */
3977 IFN_SD0_DAT3, 0, FN_MSIOF1_SS2_E, 0,
3978 0, FN_TS_SDEN0_B, FN_STP_ISEN_0_B, 0,
3979 0, 0, 0, 0,
3980 0, 0, 0, 0,
3981 /* IPSR8_3_0 [4] */
3982 IFN_SD0_DAT2, 0, FN_MSIOF1_SS1_E, 0,
3983 0, FN_TS_SDAT0_B, FN_STP_ISD_0_B, 0,
3984 0, 0, 0, 0,
3985 0, 0, 0, 0,
3986 }
3987 },
3988 { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060224, 32,
3989 4, 4, 4, 4, 4, 4, 4, 4) {
3990 /* IPSR9_31_28 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3991 IFN_SD3_CLK, 0, FN_NFWEx, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3992 0, 0, 0, 0,
3993 0, 0, 0, 0,
3994 0, 0, 0, 0,
3995 /* IPSR9_27_24 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3996 IFN_SD2_DS, 0, FN_NFALE, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3997 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]3998 FN_SATA_DEVSLP_B, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]3999 0, 0, 0, 0,
4000 /* IPSR9_23_20 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4001 IFN_SD2_DAT3, 0, FN_NFDATA13, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4002 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4003 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4004 0, 0, 0, 0,
4005 /* IPSR9_19_16 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4006 IFN_SD2_DAT2, 0, FN_NFDATA12, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4007 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4008 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4009 0, 0, 0, 0,
4010 /* IPSR9_15_12 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4011 IFN_SD2_DAT1, 0, FN_NFDATA11, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4012 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4013 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4014 0, 0, 0, 0,
4015 /* IPSR9_11_8 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4016 IFN_SD2_DAT0, 0, FN_NFDATA10, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4017 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4018 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4019 0, 0, 0, 0,
4020 /* IPSR9_7_4 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4021 IFN_SD2_CMD, 0, FN_NFDATA9, 0,
4022 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4023 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4024 0, 0, 0, 0,
4025 /* IPSR9_3_0 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4026 IFN_SD2_CLK, 0, FN_NFDATA8, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4027 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4028 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4029 0, 0, 0, 0,
4030 }
4031 },
4032 { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060228, 32,
4033 4, 4, 4, 4, 4, 4, 4, 4) {
4034 /* IPSR10_31_28 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4035 IFN_SD3_DAT6, FN_SD3_CD, FN_NFDATA6, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4036 0, 0, 0, 0,
4037 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4038 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4039 /* IPSR10_27_24 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4040 IFN_SD3_DAT5, FN_SD2_WP_A, FN_NFDATA5, 0,
4041 0, 0, 0, 0,
4042 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4043 0, 0, 0, 0,
4044 /* IPSR10_23_20 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4045 IFN_SD3_DAT4, FN_SD2_CD_A, FN_NFDATA4, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4046 0, 0, 0, 0,
4047 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4048 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4049 /* IPSR10_19_16 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4050 IFN_SD3_DAT3, 0, FN_NFDATA3, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4051 0, 0, 0, 0,
4052 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4053 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4054 /* IPSR10_15_12 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4055 IFN_SD3_DAT2, 0, FN_NFDATA2, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4056 0, 0, 0, 0,
4057 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4058 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4059 /* IPSR10_11_8 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4060 IFN_SD3_DAT1, 0, FN_NFDATA1, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4061 0, 0, 0, 0,
4062 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4063 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4064 /* IPSR10_7_4 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4065 IFN_SD3_DAT0, 0, FN_NFDATA0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4066 0, 0, 0, 0,
4067 0, 0, 0, 0,
4068 0, 0, 0, 0,
4069 /* IPSR10_3_0 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4070 IFN_SD3_CMD, 0, FN_NFREx, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4071 0, 0, 0, 0,
4072 0, 0, 0, 0,
4073 0, 0, 0, 0,
4074 }
4075 },
4076 { PINMUX_CFG_REG_VAR("IPSR11", 0xE606022C, 32,
4077 4, 4, 4, 4, 4, 4, 4, 4) {
4078 /* IPSR11_31_28 [4] */
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4079 IFN_RX0, FN_HRX1_B, 0, 0,
4080 0, FN_TS_SCK0_C, FN_STP_ISCLK_0_C, FN_RIF0_D0_B,
4081 0, 0, 0, 0,
4082 0, 0, 0, 0,
4083 /* IPSR11_27_24 [4] */
4084 IFN_SCK0, FN_HSCK1_B, FN_MSIOF1_SS2_B, FN_AUDIO_CLKC_B,
4085 FN_SDA2_A, FN_SIM0_RST_B, FN_STP_OPWM_0_C, FN_RIF0_CLK_B,
4086 FN_ADICHS2, FN_SCK5_B, 0, 0,
4087 0, 0, 0, 0,
4088 /* IPSR11_23_20 [4] */
4089 IFN_SD1_WP, 0, FN_NFCEx_A, 0,
4090 0, FN_SIM0_D_B, 0, 0,
4091 0, 0, 0, 0,
4092 0, 0, 0, 0,
4093 /* IPSR11_19_16 [4] */
4094 IFN_SD1_CD, 0, FN_NFRBx_A, 0,
4095 0, FN_SIM0_CLK_B, 0, 0,
4096 0, 0, 0, 0,
4097 0, 0, 0, 0,
4098 /* IPSR11_15_12 [4] */
4099 IFN_SD0_WP, 0, FN_NFDATA15_A, 0,
4100 FN_SDA2_B, 0, 0, 0,
4101 0, 0, 0, 0,
4102 0, 0, 0, 0,
4103 /* IPSR11_11_8 [4] */
4104 IFN_SD0_CD, 0, FN_NFDATA14_A, 0,
4105 FN_SCL2_B, FN_SIM0_RST_A, 0, 0,
4106 0, 0, 0, 0,
4107 0, 0, 0, 0,
4108 /* IPSR11_7_4 [4] */
4109 IFN_SD3_DS, 0, FN_NFCLE, 0,
4110 0, 0, 0, 0,
4111 0, 0, 0, 0,
4112 0, 0, 0, 0,
4113 /* IPSR11_3_0 [4] */
4114 IFN_SD3_DAT7, FN_SD3_WP, FN_NFDATA7, 0,
4115 0, 0, 0, 0,
4116 0, 0, 0, 0,
4117 0, 0, 0, 0,
4118 }
4119 },
4120 { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060230, 32,
4121 4, 4, 4, 4, 4, 4, 4, 4) {
4122 /* IPSR12_31_28 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4123 IFN_SCK2, FN_SCIF_CLK_B, FN_MSIOF1_SCK_B, 0,
4124 0, FN_TS_SCK1_C, FN_STP_ISCLK_1_C, FN_RIF1_CLK_B,
4125 0, FN_ADICLK, 0, 0,
4126 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4127 /* IPSR12_27_24 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4128 IFN_RTS1x_TANS, FN_HRTS1x_A, FN_MSIOF1_TXD_B, 0,
4129 0, FN_TS_SDAT1_C, FN_STP_ISD_1_C, FN_RIF1_D1_B,
4130 0, FN_ADICHS0, 0, 0,
4131 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4132 /* IPSR12_23_20 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4133 IFN_CTS1x, FN_HCTS1x_A, FN_MSIOF1_RXD_B, 0,
4134 0, FN_TS_SDEN1_C, FN_STP_ISEN_1_C, FN_RIF1_D0_B,
4135 0, FN_ADIDATA, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4136 0, 0, 0, 0,
4137 /* IPSR12_19_16 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4138 IFN_TX1_A, FN_HTX1_A, 0, 0,
4139 0, FN_TS_SDEN0_C, FN_STP_ISEN_0_C, FN_RIF1_D0_C,
4140 0, 0, 0, 0,
4141 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4142 /* IPSR12_15_12 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4143 IFN_RX1_A, FN_HRX1_A, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4144 0, FN_TS_SDAT0_C, FN_STP_ISD_0_C, FN_RIF1_CLK_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4145 0, 0, 0, 0,
4146 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4147 /* IPSR12_11_8 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4148 IFN_RTS0x_TANS, FN_HRTS1x_B, FN_MSIOF1_SS1_B, FN_AUDIO_CLKA_B,
4149 FN_SCL2_A, 0, FN_STP_IVCXO27_1_C, FN_RIF0_SYNC_B,
4150 0, FN_ADICHS1, 0, 0,
4151 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4152 /* IPSR12_7_4 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4153 IFN_CTS0x, FN_HCTS1x_B, FN_MSIOF1_SYNC_B, 0,
4154 0, FN_TS_SPSYNC1_C, FN_STP_ISSYNC_1_C, FN_RIF1_SYNC_B,
4155 FN_AUDIO_CLKOUT_C, FN_ADICS_SAMP, 0, 0,
4156 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4157 /* IPSR12_3_0 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4158 IFN_TX0, FN_HTX1_B, 0, 0,
4159 0, FN_TS_SPSYNC0_C, FN_STP_ISSYNC_0_C, FN_RIF0_D1_B,
4160 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4161 }
4162 },
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4163 { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060234, 32,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4164 4, 4, 4, 4, 4, 4, 4, 4) {
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4165 /* IPSR13_31_28 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4166 IFN_MSIOF0_SYNC, 0, 0, 0,
4167 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4168 FN_AUDIO_CLKOUT_A, 0, FN_TX5_B, 0,
4169 0, FN_BPFCLK_D, 0, 0,
4170 /* IPSR13_27_24 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4171 IFN_HRTS0x, FN_TX2_B, FN_MSIOF1_SS1_D, 0,
4172 FN_SSI_WS9_A, 0, FN_STP_IVCXO27_0_D, FN_BPFCLK_A,
4173 FN_AUDIO_CLKOUT2_A, 0, 0, 0,
4174 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4175 /* IPSR13_23_20 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4176 IFN_HCTS0x, FN_RX2_B, FN_MSIOF1_SYNC_D, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4177 FN_SSI_SCK9_A, FN_TS_SPSYNC0_D,
4178 FN_STP_ISSYNC_0_D, FN_RIF0_SYNC_C,
4179 FN_AUDIO_CLKOUT1_A, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4180 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4181 /* IPSR13_19_16 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4182 IFN_HTX0, 0, FN_MSIOF1_TXD_D, 0,
4183 FN_SSI_SDATA9_B, FN_TS_SDAT0_D, FN_STP_ISD_0_D, FN_RIF0_D1_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4184 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4185 0, 0, 0, 0,
4186 /* IPSR13_15_12 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4187 IFN_HRX0, 0, FN_MSIOF1_RXD_D, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4188 FN_SSI_SDATA2_B, FN_TS_SDEN0_D, FN_STP_ISEN_0_D, FN_RIF0_D0_C,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4189 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4190 0, 0, 0, 0,
4191 /* IPSR13_11_8 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4192 IFN_HSCK0, 0, FN_MSIOF1_SCK_D, FN_AUDIO_CLKB_A,
4193 FN_SSI_SDATA1_B, FN_TS_SCK0_D, FN_STP_ISCLK_0_D, FN_RIF0_CLK_C,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4194 0, 0, FN_RX5_B, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4195 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4196 /* IPSR13_7_4 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4197 IFN_RX2_A, 0, 0, FN_SD2_WP_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4198 FN_SDA1_A, 0, FN_FMIN_A, FN_RIF1_SYNC_C,
4199 0, FN_FSO_CFE_1x, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4200 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4201 /* IPSR13_3_0 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4202 IFN_TX2_A, 0, 0, FN_SD2_CD_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4203 FN_SCL1_A, 0, FN_FMCLK_A, FN_RIF1_D1_C,
4204 0, FN_FSO_CFE_0x, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4205 }
4206 },
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4207 { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060238, 32,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4208 4, 4, 4, 4, 4, 4, 4, 4) {
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4209 /* IPSR14_31_28 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4210 IFN_SSI_SDATA0, 0, FN_MSIOF1_SS2_F, 0,
4211 0, 0, 0, FN_MOUT2,
4212 0, 0, 0, 0,
4213 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4214 /* IPSR14_27_24 [4] */
4215 IFN_SSI_WS01239, 0, FN_MSIOF1_SS1_F, 0,
4216 0, 0, 0, 0, FN_MOUT1,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4217 0, 0, 0, 0,
4218 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4219 /* IPSR14_23_20 [4] */
4220 IFN_SSI_SCK01239, 0, FN_MSIOF1_TXD_F, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4221 0, 0, 0, FN_MOUT0,
4222 0, 0, 0, 0,
4223 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4224 /* IPSR14_19_16 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4225 IFN_MLB_DAT, FN_TX1_B, FN_MSIOF1_RXD_F, 0,
4226 0, 0, 0, 0,
4227 0, 0, 0, 0,
4228 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4229 /* IPSR14_15_12 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4230 IFN_MLB_SIG, FN_RX1_B, FN_MSIOF1_SYNC_F, 0,
4231 FN_SDA1_B, 0, 0, 0,
4232 0, 0, 0, 0,
4233 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4234 /* IPSR14_11_8 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4235 IFN_MLB_CLK, 0, FN_MSIOF1_SCK_F, 0,
4236 FN_SCL1_B, 0, 0, 0,
4237 0, 0, 0, 0,
4238 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4239 /* IPSR14_7_4 [4] */
4240 IFN_MSIOF0_SS2, FN_TX5_A, FN_MSIOF1_SS2_D, FN_AUDIO_CLKC_A,
4241 FN_SSI_WS2_A, 0, FN_STP_OPWM_0_D, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4242 FN_AUDIO_CLKOUT_D, 0, FN_SPEEDIN_B, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4243 0, 0, 0, 0,
4244 /* IPSR14_3_0 [4] */
4245 IFN_MSIOF0_SS1, FN_RX5_A, FN_NFWPx_A, FN_AUDIO_CLKA_C,
4246 FN_SSI_SCK2_A, 0, FN_STP_IVCXO27_0_C, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4247 FN_AUDIO_CLKOUT3_A, 0, FN_TCLK1_B, 0,
4248 0, 0, 0, 0,
4249 }
4250 },
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4251 { PINMUX_CFG_REG_VAR("IPSR15", 0xE606023C, 32,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4252 4, 4, 4, 4, 4, 4, 4, 4) {
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4253 /* IPSR15_31_28 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4254 IFN_SSI_SDATA4, FN_HSCK2_A, FN_MSIOF1_RXD_A, 0,
4255 0, FN_TS_SPSYNC0_A, FN_STP_ISSYNC_0_A, FN_RIF0_D0_A,
4256 FN_RIF2_D1_A, 0, 0, 0,
4257 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4258 /* IPSR15_27_24 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4259 IFN_SSI_WS4, FN_HTX2_A, FN_MSIOF1_SYNC_A, 0,
4260 0, FN_TS_SDEN0_A, FN_STP_ISEN_0_A, FN_RIF0_SYNC_A,
4261 FN_RIF2_SYNC_A, 0, 0, 0,
4262 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4263 /* IPSR15_23_20 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4264 IFN_SSI_SCK4, FN_HRX2_A, FN_MSIOF1_SCK_A, 0,
4265 0, FN_TS_SDAT0_A, FN_STP_ISD_0_A, FN_RIF0_CLK_A,
4266 FN_RIF2_CLK_A, 0, 0, 0,
4267 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4268 /* IPSR15_19_16 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4269 IFN_SSI_SDATA3, FN_HRTS2x_A, FN_MSIOF1_TXD_A, 0,
4270 0, FN_TS_SCK0_A, FN_STP_ISCLK_0_A, FN_RIF0_D1_A,
4271 FN_RIF2_D0_A, 0, 0, 0,
4272 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4273 /* IPSR15_15_12 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4274 IFN_SSI_WS34, FN_HCTS2x_A, FN_MSIOF1_SS2_A, 0,
4275 0, 0, FN_STP_IVCXO27_0_A, 0,
4276 0, 0, 0, 0,
4277 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4278 /* IPSR15_11_8 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4279 IFN_SSI_SCK34, 0, FN_MSIOF1_SS1_A, 0,
4280 0, 0, FN_STP_OPWM_0_A, 0,
4281 0, 0, 0, 0,
4282 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4283 /* IPSR15_7_4 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4284 IFN_SSI_SDATA2_A, 0, 0, 0,
4285 FN_SSI_SCK1_B, 0, 0, FN_MOUT6,
4286 0, 0, 0, 0,
4287 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4288 /* IPSR15_3_0 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4289 IFN_SSI_SDATA1_A, 0, 0, 0,
4290 0, 0, 0, FN_MOUT5,
4291 0, 0, 0, 0,
4292 0, 0, 0, 0,
4293 }
4294 },
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4295 { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060240, 32,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4296 4, 4, 4, 4, 4, 4, 4, 4) {
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4297 /* IPSR16_31_28 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4298 IFN_SSI_SDATA9_A, FN_HSCK2_B, FN_MSIOF1_SS1_C, FN_HSCK1_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4299 FN_SSI_WS1_B, FN_SCK1, FN_STP_IVCXO27_1_A, FN_SCK5_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4300 0, 0, 0, 0,
4301 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4302 /* IPSR16_27_24 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4303 IFN_SSI_SDATA8, FN_HRTS2x_B, FN_MSIOF1_TXD_C, 0,
4304 0, FN_TS_SPSYNC1_A, FN_STP_ISSYNC_1_A, FN_RIF1_D1_A,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4305 FN_RIF3_D1_A, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4306 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4307 /* IPSR16_23_20 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4308 IFN_SSI_SDATA7, FN_HCTS2x_B, FN_MSIOF1_RXD_C, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4309 0, FN_TS_SDEN1_A, FN_STP_ISEN_1_A, FN_RIF1_D0_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4310 FN_RIF3_D0_A, 0, FN_TCLK2_A, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4311 0, 0, 0, 0,
4312 /* IPSR16_19_16 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4313 IFN_SSI_WS78, FN_HTX2_B, FN_MSIOF1_SYNC_C, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4314 0, FN_TS_SDAT1_A, FN_STP_ISD_1_A, FN_RIF1_SYNC_A,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4315 FN_RIF3_SYNC_A, 0, 0, 0,
4316 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4317 /* IPSR16_15_12 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4318 IFN_SSI_SCK78, FN_HRX2_B, FN_MSIOF1_SCK_C, 0,
4319 0, FN_TS_SCK1_A, FN_STP_ISCLK_1_A, FN_RIF1_CLK_A,
4320 FN_RIF3_CLK_A, 0, 0, 0,
4321 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4322 /* IPSR16_11_8 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4323 IFN_SSI_SDATA6, 0, 0, FN_SIM0_CLK_D,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4324 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4325 FN_SATA_DEVSLP_A, 0, 0, 0,
4326 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4327 /* IPSR16_7_4 [4] */
4328 IFN_SSI_WS6, 0, 0, FN_SIM0_D_D,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4329 0, 0, 0, 0,
4330 0, 0, 0, 0,
4331 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4332 /* IPSR16_3_0 [4] */
4333 IFN_SSI_SCK6, 0, 0, FN_SIM0_RST_D,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4334 0, 0, 0, 0,
4335 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4336 0, 0, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4337 }
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4338 },
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4339 { PINMUX_CFG_REG_VAR("IPSR17", 0xE6060244, 32,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4340 4, 4, 4, 4, 4, 4, 4, 4) {
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4341 /* IPSR17_31_28 [4] */
4342 IFN_USB30_OVC, 0, 0, FN_AUDIO_CLKOUT1_B,
4343 FN_SSI_WS2_B, FN_TS_SPSYNC1_D, FN_STP_ISSYNC_1_D, FN_STP_IVCXO27_0_E,
4344 FN_RIF3_D1_B, 0, FN_FSO_TOEx, FN_TPU0TO1,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4345 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4346 /* IPSR17_27_24 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4347 IFN_USB30_PWEN, 0, 0, FN_AUDIO_CLKOUT_B,
4348 FN_SSI_SCK2_B, FN_TS_SDEN1_D, FN_STP_ISEN_1_D, FN_STP_OPWM_0_E,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4349 FN_RIF3_D0_B, 0, FN_TCLK2_B, FN_TPU0TO0,
4350 FN_BPFCLK_C, FN_HRTS2x_C, 0, 0,
4351 /* IPSR17_23_20 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4352 IFN_USB1_OVC, 0, FN_MSIOF1_SS2_C, 0,
4353 FN_SSI_WS1_A, FN_TS_SDAT0_E, FN_STP_ISD_0_E, FN_FMIN_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4354 FN_RIF2_SYNC_B, 0, FN_REMOCON_B, 0,
4355 0, FN_HCTS2x_C, 0, 0,
4356 /* IPSR17_19_16 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4357 IFN_USB1_PWEN, 0, 0, FN_SIM0_CLK_C,
4358 FN_SSI_SCK1_A, FN_TS_SCK0_E, FN_STP_ISCLK_0_E, FN_FMCLK_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4359 FN_RIF2_CLK_B, 0, FN_SPEEDIN_A, 0,
4360 0, FN_HTX2_C, 0, 0,
4361 /* IPSR17_15_12 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4362 IFN_USB0_OVC, 0, 0, FN_SIM0_D_C,
4363 0, FN_TS_SDAT1_D, FN_STP_ISD_1_D, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4364 FN_RIF3_SYNC_B, 0, 0, 0,
4365 0, FN_HRX2_C, 0, 0,
4366 /* IPSR17_11_8 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4367 IFN_USB0_PWEN, 0, 0, FN_SIM0_RST_C,
4368 0, FN_TS_SCK1_D, FN_STP_ISCLK_1_D, FN_BPFCLK_B,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4369 FN_RIF3_CLK_B, 0, 0, 0,
4370 0, FN_HSCK2_C, 0, 0,
4371 /* IPSR17_7_4 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4372 IFN_AUDIO_CLKB_B, FN_SCIF_CLK_A, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4373 0, 0, FN_STP_IVCXO27_1_D, FN_REMOCON_A,
4374 0, 0, FN_TCLK1_A, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4375 0, 0, 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4376 /* IPSR17_3_0 [4] */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4377 IFN_AUDIO_CLKA_A, 0, 0, 0,
4378 0, 0, 0, 0,
4379 0, 0, 0, FN_CC5_OSCOUT,
4380 0, 0, 0, 0,
4381 }
4382 },
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4383 { PINMUX_CFG_REG_VAR("IPSR18", 0xE6060248, 32,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4384 1, 1, 1, 1, 1, 1, 1, 1,
4385 1, 1, 1, 1, 1, 1, 1, 1,
4386 1, 1, 1, 1, 1, 1, 1, 1,
4387 4, 4) {
4388 /* reserved [31..24] */
4389 0, 0,
4390 0, 0,
4391 0, 0,
4392 0, 0,
4393 0, 0,
4394 0, 0,
4395 0, 0,
4396 0, 0,
4397 /* reserved [23..16] */
4398 0, 0,
4399 0, 0,
4400 0, 0,
4401 0, 0,
4402 0, 0,
4403 0, 0,
4404 0, 0,
4405 0, 0,
4406 /* reserved [15..8] */
4407 0, 0,
4408 0, 0,
4409 0, 0,
4410 0, 0,
4411 0, 0,
4412 0, 0,
4413 0, 0,
4414 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4415 /* IPSR18_7_4 [4] */
4416 IFN_USB3_OVC, 0, 0, FN_AUDIO_CLKOUT3_B,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4417 FN_SSI_WS9_B, FN_TS_SPSYNC0_E, FN_STP_ISSYNC_0_E, 0,
4418 FN_RIF2_D1_B, 0, 0, FN_TPU0TO3,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4419 FN_FMIN_C, FN_FMIN_D, 0, 0,
4420 /* IPSR18_3_0 [4] */
4421 IFN_USB3_PWEN, 0, 0, FN_AUDIO_CLKOUT2_B,
4422 FN_SSI_SCK9_B, FN_TS_SDEN0_E, FN_STP_ISEN_0_E, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4423 FN_RIF2_D0_B, 0, 0, FN_TPU0TO2,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4424 FN_FMCLK_C, FN_FMCLK_D, 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4425 }
4426 },
4427 { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xE6060500, 32,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4428 3, 2, 3, 1, 1, 1, 1, 1, 2, 1,
4429 1, 2, 1, 1, 1, 2, 2, 1, 2, 1, 1, 1) {
4430 /* MOD_SEL0 */
4431 /* sel_msiof3[3](0,1,2,3,4) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4432 FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,
4433 FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4434 FN_SEL_MSIOF3_4, 0,
4435 0, 0,
4436 /* sel_msiof2[2](0,1,2,3) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4437 FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,
4438 FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4439 /* sel_msiof1[3](0,1,2,3,4,5,6) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4440 FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,
4441 FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,
4442 FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,
4443 FN_SEL_MSIOF1_6, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4444 /* sel_lbsc[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4445 FN_SEL_LBSC_0, FN_SEL_LBSC_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4446 /* sel_iebus[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4447 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4448 /* sel_i2c2[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4449 FN_SEL_I2C2_0, FN_SEL_I2C2_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4450 /* sel_i2c1[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4451 FN_SEL_I2C1_0, FN_SEL_I2C1_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4452 /* sel_hscif4[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4453 FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4454 /* sel_hscif3[2](0,1,2,3) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4455 FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,
4456 FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4457 /* sel_hscif1[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4458 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4459 /* reserved[1] */
4460 0, 0,
4461 /* sel_hscif2[2](0,1,2) */
4462 FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
4463 FN_SEL_HSCIF2_2, 0,
4464 /* sel_etheravb[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4465 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4466 /* sel_drif3[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4467 FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4468 /* sel_drif2[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4469 FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4470 /* sel_drif1[2](0,1,2) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4471 FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,
4472 FN_SEL_DRIF1_2, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4473 /* sel_drif0[2](0,1,2) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4474 FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,
4475 FN_SEL_DRIF0_2, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4476 /* sel_canfd0[1](0,1) */
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4477 FN_SEL_CANFD_0, FN_SEL_CANFD_1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4478 /* sel_adg_a[2](0,1,2) */
4479 FN_SEL_ADG_A_0, FN_SEL_ADG_A_1,
4480 FN_SEL_ADG_A_2, 0,
4481 /* reserved[3]*/
4482 0, 0,
4483 0, 0,
4484 0, 0,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4485 }
4486 },
4487 { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xE6060504, 32,
4488 2, 3, 1, 2,
4489 3, 1, 1, 2, 1,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4490 2, 1, 1, 1, 1, 1, 1,
4491 1, 1, 1, 1, 1, 1, 1, 1) {
4492 /* sel_tsif1[2](0,1,2,3) */
4493 FN_SEL_TSIF1_0, FN_SEL_TSIF1_1,
4494 FN_SEL_TSIF1_2, FN_SEL_TSIF1_3,
4495 /* sel_tsif0[3](0,1,2,3,4) */
4496 FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,
4497 FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
4498 FN_SEL_TSIF0_4, 0,
4499 0, 0,
4500 /* sel_timer_tmu1[1](0,1) */
4501 FN_SEL_TIMER_TMU1_0, FN_SEL_TIMER_TMU1_1,
4502 /* sel_ssp1_1[2](0,1,2,3) */
4503 FN_SEL_SSP1_1_0, FN_SEL_SSP1_1_1,
4504 FN_SEL_SSP1_1_2, FN_SEL_SSP1_1_3,
4505 /* sel_ssp1_0[3](0,1,2,3,4) */
4506 FN_SEL_SSP1_0_0, FN_SEL_SSP1_0_1,
4507 FN_SEL_SSP1_0_2, FN_SEL_SSP1_0_3,
4508 FN_SEL_SSP1_0_4, 0,
4509 0, 0,
4510 /* sel_ssi1[1](0,1) */
4511 FN_SEL_SSI_0, FN_SEL_SSI_1,
4512 /* sel_speed_pulse_if[1](0,1) */
4513 FN_SEL_SPEED_PULSE_IF_0, FN_SEL_SPEED_PULSE_IF_1,
4514 /* sel_simcard[2](0,1,2,3) */
4515 FN_SEL_SIMCARD_0, FN_SEL_SIMCARD_1,
4516 FN_SEL_SIMCARD_2, FN_SEL_SIMCARD_3,
4517 /* sel_sdhi2[1](0,1) */
4518 FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,
4519 /* sel_scif4[2](0,1,2) */
4520 FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,
4521 FN_SEL_SCIF4_2, 0,
4522 /* sel_scif3[1](0,1) */
4523 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,
4524 /* sel_scif2[1](0,1) */
4525 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1,
4526 /* sel_scif1[1](0,1) */
4527 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1,
4528 /* sel_scif[1](0,1) */
4529 FN_SEL_SCIF_0, FN_SEL_SCIF_1,
4530 /* sel_remocon[1](0,1) */
4531 FN_SEL_REMOCON_0, FN_SEL_REMOCON_1,
4532 /* reserved[8..7] */
4533 0, 0,
4534 0, 0,
4535 /* sel_rcan0[1](0,1) */
4536 FN_SEL_RCAN_0, FN_SEL_RCAN_1,
4537 /* sel_pwm6[1](0,1) */
4538 FN_SEL_PWM6_0, FN_SEL_PWM6_1,
4539 /* sel_pwm5[1](0,1) */
4540 FN_SEL_PWM5_0, FN_SEL_PWM5_1,
4541 /* sel_pwm4[1](0,1) */
4542 FN_SEL_PWM4_0, FN_SEL_PWM4_1,
4543 /* sel_pwm3[1](0,1) */
4544 FN_SEL_PWM3_0, FN_SEL_PWM3_1,
4545 /* sel_pwm2[1](0,1) */
4546 FN_SEL_PWM2_0, FN_SEL_PWM2_1,
4547 /* sel_pwm1[1](0,1) */
4548 FN_SEL_PWM1_0, FN_SEL_PWM1_1,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4549 }
4550 },
4551 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060508, 32,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4552 1, 1, 1, 2, 1, 3, 1, 1, 1, 1, 1, 1, 1,
4553 1, 1, 1, 1, 1, 1, 1, 1,
4554 1, 1, 1, 1, 1, 1, 1, 1) {
4555 /* i2c_sel_5[1](0,1) */
4556 FN_I2C_SEL_5_0, FN_I2C_SEL_5_1,
4557 /* i2c_sel_3[1](0,1) */
4558 FN_I2C_SEL_3_0, FN_I2C_SEL_3_1,
4559 /* i2c_sel_0[1](0,1) */
4560 FN_I2C_SEL_0_0, FN_I2C_SEL_0_1,
4561 /* sel_fm[2](0,1,2,3) */
4562 FN_SEL_FM_0, FN_SEL_FM_1,
4563 FN_SEL_FM_2, FN_SEL_FM_3,
4564 /* sel_scif5[1](0,1) */
4565 FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
4566 /* sel_i2c6[3](0,1,2) */
4567 FN_SEL_I2C6_0, FN_SEL_I2C6_1,
4568 FN_SEL_I2C6_2, 0,
4569 /* sel_ndfc[1](0,1) */
4570 FN_SEL_NDFC_0, FN_SEL_NDFC_1,
4571 /* sel_ssi2[1](0,1) */
4572 FN_SEL_SSI2_0, FN_SEL_SSI2_1,
4573 /* sel_ssi9[1](0,1) */
4574 FN_SEL_SSI9_0, FN_SEL_SSI9_1,
4575 /* sel_timer_tmu2[1](0,1) */
4576 FN_SEL_TIMER_TMU2_0, FN_SEL_TIMER_TMU2_1,
4577 /* sel_adg_b[1](0,1) */
4578 FN_SEL_ADG_B_0, FN_SEL_ADG_B_1,
4579 /* sel_adg_c[1](0,1) */
4580 FN_SEL_ADG_C_0, FN_SEL_ADG_C_1,
4581 /* reserved[16..16] */
4582 0, 0,
4583 /* reserved[15..8] */
4584 0, 0,
4585 0, 0,
4586 0, 0,
4587 0, 0,
4588 0, 0,
4589 0, 0,
4590 0, 0,
4591 0, 0,
4592 /* reserved[7..1] */
4593 0, 0,
4594 0, 0,
4595 0, 0,
4596 0, 0,
4597 0, 0,
4598 0, 0,
4599 0, 0,
4600 /* sel_vin4[1](0,1) */
4601 FN_SEL_VIN4_0, FN_SEL_VIN4_1,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4602 }
4603 },
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4604 { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) {
4605 0, 0,
4606 0, 0,
4607 0, 0,
4608 0, 0,
4609 0, 0,
4610 0, 0,
4611 0, 0,
4612 0, 0,
4613
4614 0, 0,
4615 0, 0,
4616 0, 0,
4617 0, 0,
4618 0, 0,
4619 0, 0,
4620 0, 0,
4621 0, 0,
4622
4623 GP_0_15_IN, GP_0_15_OUT,
4624 GP_0_14_IN, GP_0_14_OUT,
4625 GP_0_13_IN, GP_0_13_OUT,
4626 GP_0_12_IN, GP_0_12_OUT,
4627 GP_0_11_IN, GP_0_11_OUT,
4628 GP_0_10_IN, GP_0_10_OUT,
4629 GP_0_9_IN, GP_0_9_OUT,
4630 GP_0_8_IN, GP_0_8_OUT,
4631 GP_0_7_IN, GP_0_7_OUT,
4632 GP_0_6_IN, GP_0_6_OUT,
4633 GP_0_5_IN, GP_0_5_OUT,
4634 GP_0_4_IN, GP_0_4_OUT,
4635 GP_0_3_IN, GP_0_3_OUT,
4636 GP_0_2_IN, GP_0_2_OUT,
4637 GP_0_1_IN, GP_0_1_OUT,
4638 GP_0_0_IN, GP_0_0_OUT,
4639 }
4640 },
4641 { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
4642 0, 0,
4643 0, 0,
4644 0, 0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4645 GP_1_28_IN, GP_1_28_OUT,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4646 GP_1_27_IN, GP_1_27_OUT,
4647 GP_1_26_IN, GP_1_26_OUT,
4648 GP_1_25_IN, GP_1_25_OUT,
4649 GP_1_24_IN, GP_1_24_OUT,
4650 GP_1_23_IN, GP_1_23_OUT,
4651 GP_1_22_IN, GP_1_22_OUT,
4652 GP_1_21_IN, GP_1_21_OUT,
4653 GP_1_20_IN, GP_1_20_OUT,
4654 GP_1_19_IN, GP_1_19_OUT,
4655 GP_1_18_IN, GP_1_18_OUT,
4656 GP_1_17_IN, GP_1_17_OUT,
4657 GP_1_16_IN, GP_1_16_OUT,
4658 GP_1_15_IN, GP_1_15_OUT,
4659 GP_1_14_IN, GP_1_14_OUT,
4660 GP_1_13_IN, GP_1_13_OUT,
4661 GP_1_12_IN, GP_1_12_OUT,
4662 GP_1_11_IN, GP_1_11_OUT,
4663 GP_1_10_IN, GP_1_10_OUT,
4664 GP_1_9_IN, GP_1_9_OUT,
4665 GP_1_8_IN, GP_1_8_OUT,
4666 GP_1_7_IN, GP_1_7_OUT,
4667 GP_1_6_IN, GP_1_6_OUT,
4668 GP_1_5_IN, GP_1_5_OUT,
4669 GP_1_4_IN, GP_1_4_OUT,
4670 GP_1_3_IN, GP_1_3_OUT,
4671 GP_1_2_IN, GP_1_2_OUT,
4672 GP_1_1_IN, GP_1_1_OUT,
4673 GP_1_0_IN, GP_1_0_OUT,
4674 }
4675 },
4676 { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
4677 0, 0,
4678 0, 0,
4679 0, 0,
4680 0, 0,
4681 0, 0,
4682 0, 0,
4683 0, 0,
4684 0, 0,
4685
4686 0, 0,
4687 0, 0,
4688 0, 0,
4689 0, 0,
4690 0, 0,
4691 0, 0,
4692 0, 0,
4693 0, 0,
4694
4695 0, 0,
4696 GP_2_14_IN, GP_2_14_OUT,
4697 GP_2_13_IN, GP_2_13_OUT,
4698 GP_2_12_IN, GP_2_12_OUT,
4699 GP_2_11_IN, GP_2_11_OUT,
4700 GP_2_10_IN, GP_2_10_OUT,
4701 GP_2_9_IN, GP_2_9_OUT,
4702 GP_2_8_IN, GP_2_8_OUT,
4703 GP_2_7_IN, GP_2_7_OUT,
4704 GP_2_6_IN, GP_2_6_OUT,
4705 GP_2_5_IN, GP_2_5_OUT,
4706 GP_2_4_IN, GP_2_4_OUT,
4707 GP_2_3_IN, GP_2_3_OUT,
4708 GP_2_2_IN, GP_2_2_OUT,
4709 GP_2_1_IN, GP_2_1_OUT,
4710 GP_2_0_IN, GP_2_0_OUT,
4711 }
4712 },
4713 { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) {
4714 0, 0,
4715 0, 0,
4716 0, 0,
4717 0, 0,
4718 0, 0,
4719 0, 0,
4720 0, 0,
4721 0, 0,
4722
4723 0, 0,
4724 0, 0,
4725 0, 0,
4726 0, 0,
4727 0, 0,
4728 0, 0,
4729 0, 0,
4730 0, 0,
4731
4732 GP_3_15_IN, GP_3_15_OUT,
4733 GP_3_14_IN, GP_3_14_OUT,
4734 GP_3_13_IN, GP_3_13_OUT,
4735 GP_3_12_IN, GP_3_12_OUT,
4736 GP_3_11_IN, GP_3_11_OUT,
4737 GP_3_10_IN, GP_3_10_OUT,
4738 GP_3_9_IN, GP_3_9_OUT,
4739 GP_3_8_IN, GP_3_8_OUT,
4740 GP_3_7_IN, GP_3_7_OUT,
4741 GP_3_6_IN, GP_3_6_OUT,
4742 GP_3_5_IN, GP_3_5_OUT,
4743 GP_3_4_IN, GP_3_4_OUT,
4744 GP_3_3_IN, GP_3_3_OUT,
4745 GP_3_2_IN, GP_3_2_OUT,
4746 GP_3_1_IN, GP_3_1_OUT,
4747 GP_3_0_IN, GP_3_0_OUT,
4748 }
4749 },
4750 { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) {
4751 0, 0,
4752 0, 0,
4753 0, 0,
4754 0, 0,
4755 0, 0,
4756 0, 0,
4757 0, 0,
4758 0, 0,
4759
4760 0, 0,
4761 0, 0,
4762 0, 0,
4763 0, 0,
4764 0, 0,
4765 0, 0,
4766 GP_4_17_IN, GP_4_17_OUT,
4767 GP_4_16_IN, GP_4_16_OUT,
4768
4769 GP_4_15_IN, GP_4_15_OUT,
4770 GP_4_14_IN, GP_4_14_OUT,
4771 GP_4_13_IN, GP_4_13_OUT,
4772 GP_4_12_IN, GP_4_12_OUT,
4773 GP_4_11_IN, GP_4_11_OUT,
4774 GP_4_10_IN, GP_4_10_OUT,
4775 GP_4_9_IN, GP_4_9_OUT,
4776 GP_4_8_IN, GP_4_8_OUT,
4777 GP_4_7_IN, GP_4_7_OUT,
4778 GP_4_6_IN, GP_4_6_OUT,
4779 GP_4_5_IN, GP_4_5_OUT,
4780 GP_4_4_IN, GP_4_4_OUT,
4781 GP_4_3_IN, GP_4_3_OUT,
4782 GP_4_2_IN, GP_4_2_OUT,
4783 GP_4_1_IN, GP_4_1_OUT,
4784 GP_4_0_IN, GP_4_0_OUT,
4785 }
4786 },
4787 { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) {
4788 0, 0,
4789 0, 0,
4790 0, 0,
4791 0, 0,
4792 0, 0,
4793 0, 0,
4794 GP_5_25_IN, GP_5_25_OUT,
4795 GP_5_24_IN, GP_5_24_OUT,
4796
4797 GP_5_23_IN, GP_5_23_OUT,
4798 GP_5_22_IN, GP_5_22_OUT,
4799 GP_5_21_IN, GP_5_21_OUT,
4800 GP_5_20_IN, GP_5_20_OUT,
4801 GP_5_19_IN, GP_5_19_OUT,
4802 GP_5_18_IN, GP_5_18_OUT,
4803 GP_5_17_IN, GP_5_17_OUT,
4804 GP_5_16_IN, GP_5_16_OUT,
4805
4806 GP_5_15_IN, GP_5_15_OUT,
4807 GP_5_14_IN, GP_5_14_OUT,
4808 GP_5_13_IN, GP_5_13_OUT,
4809 GP_5_12_IN, GP_5_12_OUT,
4810 GP_5_11_IN, GP_5_11_OUT,
4811 GP_5_10_IN, GP_5_10_OUT,
4812 GP_5_9_IN, GP_5_9_OUT,
4813 GP_5_8_IN, GP_5_8_OUT,
4814 GP_5_7_IN, GP_5_7_OUT,
4815 GP_5_6_IN, GP_5_6_OUT,
4816 GP_5_5_IN, GP_5_5_OUT,
4817 GP_5_4_IN, GP_5_4_OUT,
4818 GP_5_3_IN, GP_5_3_OUT,
4819 GP_5_2_IN, GP_5_2_OUT,
4820 GP_5_1_IN, GP_5_1_OUT,
4821 GP_5_0_IN, GP_5_0_OUT,
4822 }
4823 },
4824 { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) {
4825 GP_INOUTSEL(6)
4826 }
4827 },
4828 { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) {
4829 0, 0,
4830 0, 0,
4831 0, 0,
4832 0, 0,
4833 0, 0,
4834 0, 0,
4835 0, 0,
4836 0, 0,
4837
4838 0, 0,
4839 0, 0,
4840 0, 0,
4841 0, 0,
4842 0, 0,
4843 0, 0,
4844 0, 0,
4845 0, 0,
4846
4847 0, 0,
4848 0, 0,
4849 0, 0,
4850 0, 0,
4851 0, 0,
4852 0, 0,
4853 0, 0,
4854 0, 0,
4855
4856 0, 0,
4857 0, 0,
4858 0, 0,
4859 0, 0,
4860 GP_6_3_IN, GP_6_3_OUT,
4861 GP_6_2_IN, GP_6_2_OUT,
4862 GP_6_1_IN, GP_6_1_OUT,
4863 GP_6_0_IN, GP_6_0_OUT,
4864 }
4865 },
4866 { },
4867};
4868
4869static struct pinmux_data_reg pinmux_data_regs[] = {
4870 /* use OUTDT registers? */
4871 { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) {
4872 0, 0, 0, 0, 0, 0, 0, 0,
4873 0, 0, 0, 0, 0, 0, 0, 0,
4874 GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA,
4875 GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA,
4876 GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA,
4877 GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA }
4878 },
4879 { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4880 0, 0, 0, GP_1_28_DATA,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4881 GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
4882 GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
4883 GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
4884 GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
4885 GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
4886 GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
4887 GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
4888 },
4889 { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) {
4890 0, 0, 0, 0, 0, 0, 0, 0,
4891 0, 0, 0, 0, 0, 0, 0, 0,
4892 0, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
4893 GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
4894 GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
4895 GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
4896 },
4897 { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) {
4898 0, 0, 0, 0, 0, 0, 0, 0,
4899 0, 0, 0, 0, 0, 0, 0, 0,
4900 GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA,
4901 GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA,
4902 GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA,
4903 GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA }
4904 },
4905 { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) {
4906 0, 0, 0, 0, 0, 0, 0, 0,
4907 0, 0, 0, 0, 0, 0, GP_4_17_DATA, GP_4_16_DATA,
4908 GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA,
4909 GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA,
4910 GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA,
4911 GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA }
4912 },
4913 { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) {
4914 0, 0, 0, 0,
4915 0, 0, GP_5_25_DATA, GP_5_24_DATA,
4916 GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA,
4917 GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA,
4918 GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,
4919 GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
4920 GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
4921 GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
4922 },
4923 { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) {
4924 GP_INDT(6) }
4925 },
4926 { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) {
4927 0, 0, 0, 0, 0, 0, 0, 0,
4928 0, 0, 0, 0, 0, 0, 0, 0,
4929 0, 0, 0, 0, 0, 0, 0, 0,
4930 0, 0, 0, 0,
4931 GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }
4932 },
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4933 { },
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4934};
4935
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4936
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4937static struct pinmux_info r8a7795_pinmux_info = {
4938 .name = "r8a7795_pfc",
4939
4940 .unlock_reg = 0xe6060000, /* PMMR */
4941
4942 .reserved_id = PINMUX_RESERVED,
4943 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
4944 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
4945 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
4946 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
4947 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
4948
4949 .first_gpio = GPIO_GP_0_0,
Marek Vasuta34d0f62017-05-13 15:57:31 +0200[diff] [blame^]4950 .last_gpio = GPIO_FN_FMIN_D,
Nobuhiro Iwamatsu2a6078e2016-04-01 03:51:35 +0900[diff] [blame]4951
4952 .gpios = pinmux_gpios,
4953 .cfg_regs = pinmux_config_regs,
4954 .data_regs = pinmux_data_regs,
4955
4956 .gpio_data = pinmux_data,
4957 .gpio_data_size = ARRAY_SIZE(pinmux_data),
4958};
4959
4960void r8a7795_pinmux_init(void)
4961{
4962 register_pinmux(&r8a7795_pinmux_info);
4963}