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wdenkfa89d7c2004-09-28 16:44:41 +00001/*
2 * (C) Copyright 2004
3 * Vincent Dubey, Xa SA, vincent.dubey@xa-ch.com
4 *
5 * (C) Copyright 2002
6 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
7 *
8 * (C) Copyright 2002
9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Marius Groeger <mgroeger@sysgo.de>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <common.h>
32
33/* ------------------------------------------------------------------------- */
34
35
36/*
37 * Miscelaneous platform dependent initialisations
38 */
39
40int board_init (void)
41{
42 DECLARE_GLOBAL_DATA_PTR;
43
44 /* memory and cpu-speed are setup before relocation */
45 /* so we do _nothing_ here */
46
47 /* arch number of xaeniax */
48 gd->bd->bi_arch_number = 585;
49
50 /* adress of boot parameters */
51 gd->bd->bi_boot_params = 0xa0000100;
52
53 return 0;
54}
55
56int board_late_init(void)
57{
58 setenv("stdout", "serial");
59 setenv("stderr", "serial");
60 return 0;
61}
62
63
64int dram_init (void)
65{
66 DECLARE_GLOBAL_DATA_PTR;
67
68 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
69 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
70 /* gd->bd->bi_dram[1].start = PHYS_SDRAM_2;*/
71 /* gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;*/
72 /* gd->bd->bi_dram[2].start = PHYS_SDRAM_3; */
73 /* gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; */
74 /* gd->bd->bi_dram[3].start = PHYS_SDRAM_4; */
75 /* gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; */
76
77 return 0;
78}