Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
| 4 | * Copyright (C) 2012 Renesas Solutions Corp. |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __KZM9G_H |
| 8 | #define __KZM9G_H |
| 9 | |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 10 | #define CONFIG_SH73A0 |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 11 | |
| 12 | #include <asm/arch/rmobile.h> |
| 13 | |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 14 | /* MEMORY */ |
| 15 | #define KZM_SDRAM_BASE (0x40000000) |
| 16 | #define PHYS_SDRAM KZM_SDRAM_BASE |
| 17 | #define PHYS_SDRAM_SIZE (512 * 1024 * 1024) |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 18 | |
| 19 | /* NOR Flash */ |
| 20 | #define KZM_FLASH_BASE (0x00000000) |
| 21 | #define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE) |
| 22 | #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) |
| 23 | #define CONFIG_SYS_MAX_FLASH_BANKS (1) |
| 24 | #define CONFIG_SYS_MAX_FLASH_SECT (512) |
| 25 | |
| 26 | /* prompt */ |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 27 | #define CONFIG_SYS_PBSIZE 256 |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 28 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } |
| 29 | |
| 30 | /* SCIF */ |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 31 | #define CONFIG_CONS_SCIF4 |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 32 | |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 33 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE |
| 34 | |
| 35 | #define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */ |
| 36 | #define CONFIG_SYS_INIT_RAM_SIZE (0x10000) |
| 37 | #define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4) |
| 38 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 39 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 40 | GENERATED_GBL_DATA_SIZE) |
Tetsuyuki Kobayashi | 6a8c515 | 2012-07-05 01:43:44 +0000 | [diff] [blame] | 41 | #define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024) |
| 42 | #define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT) |
| 43 | #define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT) |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 44 | |
| 45 | #define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE) |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 46 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
| 47 | |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 48 | #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000 |
| 49 | |
| 50 | /* FLASH */ |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 51 | #undef CONFIG_SYS_FLASH_QUIET_TEST |
| 52 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
| 53 | #define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */ |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 54 | |
| 55 | /* Timeout for Flash erase operations (in ms) */ |
| 56 | #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) |
| 57 | /* Timeout for Flash write operations (in ms) */ |
| 58 | #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) |
| 59 | /* Timeout for Flash set sector lock bit operations (in ms) */ |
| 60 | #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) |
| 61 | /* Timeout for Flash clear lock bit operations (in ms) */ |
| 62 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) |
| 63 | |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 64 | #undef CONFIG_SYS_DIRECT_FLASH_TFTP |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 65 | |
| 66 | /* GPIO / PFC */ |
| 67 | #define CONFIG_SH_GPIO_PFC |
| 68 | |
| 69 | /* Clock */ |
Nobuhiro Iwamatsu | 8c00236 | 2012-08-03 13:56:52 +0900 | [diff] [blame] | 70 | #define CONFIG_GLOBAL_TIMER |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 71 | #define CONFIG_SYS_CLK_FREQ (48000000) |
| 72 | #define CONFIG_SYS_CPU_CLK (1196000000) |
Nobuhiro Iwamatsu | adbaef5 | 2013-09-30 10:30:40 +0900 | [diff] [blame] | 73 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 74 | #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 75 | |
Tetsuyuki Kobayashi | 3d74327 | 2012-07-25 18:24:18 +0000 | [diff] [blame] | 76 | #define CONFIG_NFS_TIMEOUT 10000UL |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 77 | |
Nobuhiro Iwamatsu | 06d4c6d | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 78 | #endif /* __KZM9G_H */ |