Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com |
| 3 | * |
| 4 | * Developed for DENX Software Engineering GmbH |
| 5 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 11 | #include <post.h> |
| 12 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 13 | #if CONFIG_POST & CONFIG_SYS_POST_DSP |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 14 | #include <asm/io.h> |
| 15 | |
| 16 | /* This test verifies DSP status bits in FPGA */ |
| 17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; |
| 19 | |
Sascha Laue | 249310a | 2010-08-19 09:38:56 +0200 | [diff] [blame] | 20 | #define DSP_STATUS_REG 0xC4000008 |
| 21 | #define FPGA_STATUS_REG 0xC400000C |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 22 | |
| 23 | int dsp_post_test(int flags) |
| 24 | { |
Sascha Laue | 249310a | 2010-08-19 09:38:56 +0200 | [diff] [blame] | 25 | uint old_value; |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 26 | uint read_value; |
| 27 | int ret; |
| 28 | |
Sascha Laue | 249310a | 2010-08-19 09:38:56 +0200 | [diff] [blame] | 29 | /* momorize fpga status */ |
| 30 | old_value = in_be32((void *)FPGA_STATUS_REG); |
| 31 | /* enable outputs */ |
| 32 | out_be32((void *)FPGA_STATUS_REG, 0x30); |
| 33 | |
| 34 | /* generate sync signal */ |
| 35 | out_be32((void *)DSP_STATUS_REG, 0x300); |
| 36 | udelay(5); |
| 37 | out_be32((void *)DSP_STATUS_REG, 0); |
| 38 | udelay(500); |
| 39 | |
| 40 | /* read status */ |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 41 | ret = 0; |
| 42 | read_value = in_be32((void *)DSP_STATUS_REG) & 0x3; |
Sascha Laue | 249310a | 2010-08-19 09:38:56 +0200 | [diff] [blame] | 43 | if (read_value != 0x03) { |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 44 | post_log("\nDSP status read %08X\n", read_value); |
| 45 | ret = 1; |
| 46 | } |
| 47 | |
Sascha Laue | 249310a | 2010-08-19 09:38:56 +0200 | [diff] [blame] | 48 | /* restore fpga status */ |
| 49 | out_be32((void *)FPGA_STATUS_REG, old_value); |
| 50 | |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 51 | return ret; |
| 52 | } |
| 53 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 54 | #endif /* CONFIG_POST & CONFIG_SYS_POST_DSP */ |