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wdenkc6097192002-11-03 00:24:07 +00001/*
Heiko Schocher479a4cf2013-01-29 08:53:15 +01002 * (C) Copyright 2009
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 * Changes for multibus/multiadapter I2C support.
5 *
wdenkc6097192002-11-03 00:24:07 +00006 * (C) Copyright 2001, 2002
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +000010 *
11 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
12 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
13 * Neil Russell.
Simon Glasscb052ff2016-11-23 06:34:44 -070014 *
15 * NOTE: This driver should be converted to driver model before June 2017.
16 * Please see doc/driver-model/i2c-howto.txt for instructions.
wdenkc6097192002-11-03 00:24:07 +000017 */
18
19#include <common.h>
Andreas Bießmann1f5e8b12011-02-10 00:30:04 +000020#if defined(CONFIG_AVR32)
21#include <asm/arch/portmux.h>
22#endif
Ryan Mallon78d66912011-01-27 08:54:15 +130023#if defined(CONFIG_AT91FAMILY)
wdenk20dd2fa2004-11-21 00:06:33 +000024#include <asm/io.h>
25#include <asm/arch/hardware.h>
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010026#include <asm/arch/at91_pio.h>
Andreas Bießmanna8649792013-10-30 15:18:18 +010027#ifdef CONFIG_ATMEL_LEGACY
Daniel Gorsulowski5a2d8842009-05-18 13:20:54 +020028#include <asm/arch/gpio.h>
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010029#endif
Daniel Gorsulowski5a2d8842009-05-18 13:20:54 +020030#endif
Heiko Schocher643e7c02009-03-12 07:37:34 +010031#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
Heiko Schocher7f3afd62008-10-17 13:52:51 +020032#include <asm/io.h>
33#endif
wdenkc6097192002-11-03 00:24:07 +000034#include <i2c.h>
35
Mike Frysingeree12d542010-07-21 13:38:02 -040036#if defined(CONFIG_SOFT_I2C_GPIO_SCL)
37# include <asm/gpio.h>
38
39# ifndef I2C_GPIO_SYNC
40# define I2C_GPIO_SYNC
41# endif
42
43# ifndef I2C_INIT
44# define I2C_INIT \
45 do { \
46 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
47 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
48 } while (0)
49# endif
50
51# ifndef I2C_ACTIVE
52# define I2C_ACTIVE do { } while (0)
53# endif
54
55# ifndef I2C_TRISTATE
56# define I2C_TRISTATE do { } while (0)
57# endif
58
59# ifndef I2C_READ
60# define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
61# endif
62
63# ifndef I2C_SDA
64# define I2C_SDA(bit) \
65 do { \
66 if (bit) \
67 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
68 else \
69 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
70 I2C_GPIO_SYNC; \
71 } while (0)
72# endif
73
74# ifndef I2C_SCL
75# define I2C_SCL(bit) \
76 do { \
77 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
78 I2C_GPIO_SYNC; \
79 } while (0)
80# endif
81
82# ifndef I2C_DELAY
83# define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
84# endif
85
86#endif
87
wdenkc6097192002-11-03 00:24:07 +000088/* #define DEBUG_I2C */
89
Wolfgang Denk6405a152006-03-31 18:32:53 +020090DECLARE_GLOBAL_DATA_PTR;
Heiko Schocher479a4cf2013-01-29 08:53:15 +010091
92#ifndef I2C_SOFT_DECLARATIONS
Heiko Schocher479a4cf2013-01-29 08:53:15 +010093# define I2C_SOFT_DECLARATIONS
Wolfgang Denk6405a152006-03-31 18:32:53 +020094#endif
95
Marek Vasuta3c41ba2013-08-01 12:32:20 +020096#if !defined(CONFIG_SYS_I2C_SOFT_SPEED)
97#define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED
Heiko Schocher479a4cf2013-01-29 08:53:15 +010098#endif
Marek Vasuta3c41ba2013-08-01 12:32:20 +020099#if !defined(CONFIG_SYS_I2C_SOFT_SLAVE)
100#define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100101#endif
102
wdenkc6097192002-11-03 00:24:07 +0000103/*-----------------------------------------------------------------------
104 * Definitions
105 */
wdenkc6097192002-11-03 00:24:07 +0000106#define RETRIES 0
107
wdenkc6097192002-11-03 00:24:07 +0000108#define I2C_ACK 0 /* PD_SDA level to ack a byte */
109#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
110
111
112#ifdef DEBUG_I2C
113#define PRINTD(fmt,args...) do { \
wdenkc6097192002-11-03 00:24:07 +0000114 printf (fmt ,##args); \
115 } while (0)
116#else
117#define PRINTD(fmt,args...)
118#endif
119
120/*-----------------------------------------------------------------------
121 * Local functions
122 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200123#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +0000124static void send_reset (void);
Heiko Schocher0e2f2c52008-10-15 09:38:38 +0200125#endif
wdenkc6097192002-11-03 00:24:07 +0000126static void send_start (void);
127static void send_stop (void);
128static void send_ack (int);
129static int write_byte (uchar byte);
130static uchar read_byte (int);
131
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200132#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +0000133/*-----------------------------------------------------------------------
134 * Send a reset sequence consisting of 9 clocks with the data signal high
135 * to clock any confused device back into an idle state. Also send a
136 * <stop> at the end of the sequence for belts & suspenders.
137 */
138static void send_reset(void)
139{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200140 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000141 int j;
142
wdenka6db71d2003-04-08 23:25:21 +0000143 I2C_SCL(1);
wdenkc6097192002-11-03 00:24:07 +0000144 I2C_SDA(1);
wdenka6db71d2003-04-08 23:25:21 +0000145#ifdef I2C_INIT
146 I2C_INIT;
147#endif
148 I2C_TRISTATE;
wdenkc6097192002-11-03 00:24:07 +0000149 for(j = 0; j < 9; j++) {
150 I2C_SCL(0);
151 I2C_DELAY;
152 I2C_DELAY;
153 I2C_SCL(1);
154 I2C_DELAY;
155 I2C_DELAY;
156 }
157 send_stop();
158 I2C_TRISTATE;
159}
Heiko Schocher0e2f2c52008-10-15 09:38:38 +0200160#endif
wdenkc6097192002-11-03 00:24:07 +0000161
162/*-----------------------------------------------------------------------
163 * START: High -> Low on SDA while SCL is High
164 */
165static void send_start(void)
166{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200167 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000168
169 I2C_DELAY;
170 I2C_SDA(1);
171 I2C_ACTIVE;
172 I2C_DELAY;
173 I2C_SCL(1);
174 I2C_DELAY;
175 I2C_SDA(0);
176 I2C_DELAY;
177}
178
179/*-----------------------------------------------------------------------
180 * STOP: Low -> High on SDA while SCL is High
181 */
182static void send_stop(void)
183{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200184 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000185
186 I2C_SCL(0);
187 I2C_DELAY;
188 I2C_SDA(0);
189 I2C_ACTIVE;
190 I2C_DELAY;
191 I2C_SCL(1);
192 I2C_DELAY;
193 I2C_SDA(1);
194 I2C_DELAY;
195 I2C_TRISTATE;
196}
197
wdenkc6097192002-11-03 00:24:07 +0000198/*-----------------------------------------------------------------------
199 * ack should be I2C_ACK or I2C_NOACK
200 */
201static void send_ack(int ack)
202{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200203 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000204
wdenkc6097192002-11-03 00:24:07 +0000205 I2C_SCL(0);
206 I2C_DELAY;
wdenkc6097192002-11-03 00:24:07 +0000207 I2C_ACTIVE;
Wolfgang Denkd4a61102006-03-13 00:50:48 +0100208 I2C_SDA(ack);
wdenkc6097192002-11-03 00:24:07 +0000209 I2C_DELAY;
210 I2C_SCL(1);
211 I2C_DELAY;
212 I2C_DELAY;
213 I2C_SCL(0);
214 I2C_DELAY;
215}
216
wdenkc6097192002-11-03 00:24:07 +0000217/*-----------------------------------------------------------------------
218 * Send 8 bits and look for an acknowledgement.
219 */
220static int write_byte(uchar data)
221{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200222 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000223 int j;
224 int nack;
225
226 I2C_ACTIVE;
227 for(j = 0; j < 8; j++) {
228 I2C_SCL(0);
229 I2C_DELAY;
230 I2C_SDA(data & 0x80);
231 I2C_DELAY;
232 I2C_SCL(1);
233 I2C_DELAY;
234 I2C_DELAY;
235
236 data <<= 1;
237 }
238
239 /*
240 * Look for an <ACK>(negative logic) and return it.
241 */
242 I2C_SCL(0);
243 I2C_DELAY;
244 I2C_SDA(1);
245 I2C_TRISTATE;
246 I2C_DELAY;
247 I2C_SCL(1);
248 I2C_DELAY;
249 I2C_DELAY;
250 nack = I2C_READ;
251 I2C_SCL(0);
252 I2C_DELAY;
253 I2C_ACTIVE;
254
255 return(nack); /* not a nack is an ack */
256}
257
wdenkc6097192002-11-03 00:24:07 +0000258/*-----------------------------------------------------------------------
259 * if ack == I2C_ACK, ACK the byte so can continue reading, else
260 * send I2C_NOACK to end the read.
261 */
262static uchar read_byte(int ack)
263{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200264 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000265 int data;
266 int j;
267
268 /*
269 * Read 8 bits, MSB first.
270 */
271 I2C_TRISTATE;
Haavard Skinnemoen15fb0a12008-05-16 11:08:11 +0200272 I2C_SDA(1);
wdenkc6097192002-11-03 00:24:07 +0000273 data = 0;
274 for(j = 0; j < 8; j++) {
275 I2C_SCL(0);
276 I2C_DELAY;
277 I2C_SCL(1);
278 I2C_DELAY;
279 data <<= 1;
280 data |= I2C_READ;
281 I2C_DELAY;
282 }
283 send_ack(ack);
284
285 return(data);
286}
287
wdenkc6097192002-11-03 00:24:07 +0000288/*-----------------------------------------------------------------------
289 * Initialization
290 */
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100291static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
wdenkc6097192002-11-03 00:24:07 +0000292{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200293#if defined(CONFIG_SYS_I2C_INIT_BOARD)
Heiko Schocher0e2f2c52008-10-15 09:38:38 +0200294 /* call board specific i2c bus reset routine before accessing the */
295 /* environment, which might be in a chip on that bus. For details */
296 /* about this problem see doc/I2C_Edge_Conditions. */
297 i2c_init_board();
298#else
wdenkc6097192002-11-03 00:24:07 +0000299 /*
wdenk57b2d802003-06-27 21:31:46 +0000300 * WARNING: Do NOT save speed in a static variable: if the
301 * I2C routines are called before RAM is initialized (to read
302 * the DIMM SPD, for instance), RAM won't be usable and your
303 * system will crash.
wdenkc6097192002-11-03 00:24:07 +0000304 */
305 send_reset ();
Heiko Schocher0e2f2c52008-10-15 09:38:38 +0200306#endif
wdenkc6097192002-11-03 00:24:07 +0000307}
308
309/*-----------------------------------------------------------------------
310 * Probe to see if a chip is present. Also good for checking for the
311 * completion of EEPROM writes since the chip stops responding until
312 * the write completes (typically 10mSec).
313 */
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100314static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
wdenkc6097192002-11-03 00:24:07 +0000315{
316 int rc;
317
Wolfgang Denk0a8599f2006-03-12 01:30:45 +0100318 /*
Wolfgang Denk2bad8682006-03-12 02:55:22 +0100319 * perform 1 byte write transaction with just address byte
Wolfgang Denk0a8599f2006-03-12 01:30:45 +0100320 * (fake write)
321 */
wdenkc6097192002-11-03 00:24:07 +0000322 send_start();
wdenk34b613e2002-12-17 01:51:00 +0000323 rc = write_byte ((addr << 1) | 0);
wdenkc6097192002-11-03 00:24:07 +0000324 send_stop();
325
326 return (rc ? 1 : 0);
327}
328
329/*-----------------------------------------------------------------------
330 * Read bytes
331 */
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100332static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
333 int alen, uchar *buffer, int len)
wdenkc6097192002-11-03 00:24:07 +0000334{
335 int shift;
336 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
337 chip, addr, alen, buffer, len);
338
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200339#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
wdenkc6097192002-11-03 00:24:07 +0000340 /*
341 * EEPROM chips that implement "address overflow" are ones
342 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
343 * address and the extra bits end up in the "chip address"
344 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
345 * four 256 byte chips.
346 *
347 * Note that we consider the length of the address field to
348 * still be one byte because the extra address bits are
349 * hidden in the chip address.
350 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200351 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
wdenkc6097192002-11-03 00:24:07 +0000352
353 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
354 chip, addr);
355#endif
356
357 /*
358 * Do the addressing portion of a write cycle to set the
359 * chip's address pointer. If the address length is zero,
360 * don't do the normal write cycle to set the address pointer,
361 * there is no address pointer in this chip.
362 */
363 send_start();
364 if(alen > 0) {
365 if(write_byte(chip << 1)) { /* write cycle */
366 send_stop();
367 PRINTD("i2c_read, no chip responded %02X\n", chip);
368 return(1);
369 }
370 shift = (alen-1) * 8;
371 while(alen-- > 0) {
372 if(write_byte(addr >> shift)) {
373 PRINTD("i2c_read, address not <ACK>ed\n");
374 return(1);
375 }
376 shift -= 8;
377 }
Andrew Dyer58c41f92008-12-29 17:36:01 -0600378
379 /* Some I2C chips need a stop/start sequence here,
380 * other chips don't work with a full stop and need
381 * only a start. Default behaviour is to send the
382 * stop/start sequence.
383 */
384#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
385 send_start();
386#else
387 send_stop();
wdenkc6097192002-11-03 00:24:07 +0000388 send_start();
Andrew Dyer58c41f92008-12-29 17:36:01 -0600389#endif
wdenkc6097192002-11-03 00:24:07 +0000390 }
391 /*
392 * Send the chip address again, this time for a read cycle.
393 * Then read the data. On the last byte, we do a NACK instead
394 * of an ACK(len == 0) to terminate the read.
395 */
396 write_byte((chip << 1) | 1); /* read cycle */
397 while(len-- > 0) {
398 *buffer++ = read_byte(len == 0);
399 }
400 send_stop();
401 return(0);
402}
403
404/*-----------------------------------------------------------------------
405 * Write bytes
406 */
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100407static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
408 int alen, uchar *buffer, int len)
wdenkc6097192002-11-03 00:24:07 +0000409{
410 int shift, failures = 0;
411
412 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
413 chip, addr, alen, buffer, len);
414
415 send_start();
416 if(write_byte(chip << 1)) { /* write cycle */
417 send_stop();
418 PRINTD("i2c_write, no chip responded %02X\n", chip);
419 return(1);
420 }
421 shift = (alen-1) * 8;
422 while(alen-- > 0) {
423 if(write_byte(addr >> shift)) {
424 PRINTD("i2c_write, address not <ACK>ed\n");
425 return(1);
426 }
427 shift -= 8;
428 }
429
430 while(len-- > 0) {
431 if(write_byte(*buffer++)) {
432 failures++;
433 }
434 }
435 send_stop();
436 return(failures);
437}
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100438
439/*
440 * Register soft i2c adapters
441 */
Dirk Eibache2493dd2015-10-28 11:46:39 +0100442U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe,
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100443 soft_i2c_read, soft_i2c_write, NULL,
444 CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
445 0)
446#if defined(I2C_SOFT_DECLARATIONS2)
Dirk Eibache2493dd2015-10-28 11:46:39 +0100447U_BOOT_I2C_ADAP_COMPLETE(soft01, soft_i2c_init, soft_i2c_probe,
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100448 soft_i2c_read, soft_i2c_write, NULL,
449 CONFIG_SYS_I2C_SOFT_SPEED_2,
450 CONFIG_SYS_I2C_SOFT_SLAVE_2,
451 1)
452#endif
453#if defined(I2C_SOFT_DECLARATIONS3)
Dirk Eibache2493dd2015-10-28 11:46:39 +0100454U_BOOT_I2C_ADAP_COMPLETE(soft02, soft_i2c_init, soft_i2c_probe,
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100455 soft_i2c_read, soft_i2c_write, NULL,
456 CONFIG_SYS_I2C_SOFT_SPEED_3,
457 CONFIG_SYS_I2C_SOFT_SLAVE_3,
458 2)
459#endif
460#if defined(I2C_SOFT_DECLARATIONS4)
Dirk Eibache2493dd2015-10-28 11:46:39 +0100461U_BOOT_I2C_ADAP_COMPLETE(soft03, soft_i2c_init, soft_i2c_probe,
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100462 soft_i2c_read, soft_i2c_write, NULL,
463 CONFIG_SYS_I2C_SOFT_SPEED_4,
464 CONFIG_SYS_I2C_SOFT_SLAVE_4,
465 3)
466#endif
Dirk Eibach981bacd2015-10-28 11:46:35 +0100467#if defined(I2C_SOFT_DECLARATIONS5)
Dirk Eibache2493dd2015-10-28 11:46:39 +0100468U_BOOT_I2C_ADAP_COMPLETE(soft04, soft_i2c_init, soft_i2c_probe,
Dirk Eibach981bacd2015-10-28 11:46:35 +0100469 soft_i2c_read, soft_i2c_write, NULL,
470 CONFIG_SYS_I2C_SOFT_SPEED_5,
471 CONFIG_SYS_I2C_SOFT_SLAVE_5,
472 4)
473#endif
474#if defined(I2C_SOFT_DECLARATIONS6)
Dirk Eibache2493dd2015-10-28 11:46:39 +0100475U_BOOT_I2C_ADAP_COMPLETE(soft05, soft_i2c_init, soft_i2c_probe,
Dirk Eibach981bacd2015-10-28 11:46:35 +0100476 soft_i2c_read, soft_i2c_write, NULL,
477 CONFIG_SYS_I2C_SOFT_SPEED_6,
478 CONFIG_SYS_I2C_SOFT_SLAVE_6,
479 5)
480#endif
481#if defined(I2C_SOFT_DECLARATIONS7)
Dirk Eibache2493dd2015-10-28 11:46:39 +0100482U_BOOT_I2C_ADAP_COMPLETE(soft06, soft_i2c_init, soft_i2c_probe,
Dirk Eibach981bacd2015-10-28 11:46:35 +0100483 soft_i2c_read, soft_i2c_write, NULL,
484 CONFIG_SYS_I2C_SOFT_SPEED_7,
485 CONFIG_SYS_I2C_SOFT_SLAVE_7,
486 6)
487#endif
488#if defined(I2C_SOFT_DECLARATIONS8)
Dirk Eibache2493dd2015-10-28 11:46:39 +0100489U_BOOT_I2C_ADAP_COMPLETE(soft07, soft_i2c_init, soft_i2c_probe,
Dirk Eibach981bacd2015-10-28 11:46:35 +0100490 soft_i2c_read, soft_i2c_write, NULL,
491 CONFIG_SYS_I2C_SOFT_SPEED_8,
492 CONFIG_SYS_I2C_SOFT_SLAVE_8,
493 7)
494#endif
Dirk Eibach94594332015-10-28 11:46:36 +0100495#if defined(I2C_SOFT_DECLARATIONS9)
Dirk Eibache2493dd2015-10-28 11:46:39 +0100496U_BOOT_I2C_ADAP_COMPLETE(soft08, soft_i2c_init, soft_i2c_probe,
Dirk Eibach94594332015-10-28 11:46:36 +0100497 soft_i2c_read, soft_i2c_write, NULL,
498 CONFIG_SYS_I2C_SOFT_SPEED_9,
499 CONFIG_SYS_I2C_SOFT_SLAVE_9,
500 8)
501#endif
502#if defined(I2C_SOFT_DECLARATIONS10)
Dirk Eibache2493dd2015-10-28 11:46:39 +0100503U_BOOT_I2C_ADAP_COMPLETE(soft09, soft_i2c_init, soft_i2c_probe,
Dirk Eibach94594332015-10-28 11:46:36 +0100504 soft_i2c_read, soft_i2c_write, NULL,
505 CONFIG_SYS_I2C_SOFT_SPEED_10,
506 CONFIG_SYS_I2C_SOFT_SLAVE_10,
507 9)
508#endif
509#if defined(I2C_SOFT_DECLARATIONS11)
510U_BOOT_I2C_ADAP_COMPLETE(soft10, soft_i2c_init, soft_i2c_probe,
511 soft_i2c_read, soft_i2c_write, NULL,
512 CONFIG_SYS_I2C_SOFT_SPEED_11,
513 CONFIG_SYS_I2C_SOFT_SLAVE_11,
514 10)
515#endif
516#if defined(I2C_SOFT_DECLARATIONS12)
517U_BOOT_I2C_ADAP_COMPLETE(soft11, soft_i2c_init, soft_i2c_probe,
518 soft_i2c_read, soft_i2c_write, NULL,
519 CONFIG_SYS_I2C_SOFT_SPEED_12,
520 CONFIG_SYS_I2C_SOFT_SLAVE_12,
521 11)
522#endif