| Stefan Roese | d8d2018 | 2016-10-25 11:47:51 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_MVEBU=y |
| 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 4 | CONFIG_TARGET_MVEBU_ARMADA_8K=y |
| 5 | CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db" |
| 6 | CONFIG_SMBIOS_PRODUCT_NAME="" |
| Tom Rini | 256aa74 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 7 | CONFIG_DEBUG_UART=y |
| Stefan Roese | d8d2018 | 2016-10-25 11:47:51 +0200 | [diff] [blame] | 8 | CONFIG_AHCI=y |
| 9 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| 10 | CONFIG_SYS_CONSOLE_INFO_QUIET=y |
| 11 | # CONFIG_DISPLAY_CPUINFO is not set |
| 12 | # CONFIG_DISPLAY_BOARDINFO is not set |
| Simon Glass | 62adede | 2017-01-23 13:31:19 -0700 | [diff] [blame] | 13 | CONFIG_ARCH_EARLY_INIT_R=y |
| Simon Glass | 7a99a87 | 2017-01-23 13:31:20 -0700 | [diff] [blame] | 14 | CONFIG_BOARD_EARLY_INIT_F=y |
| Masahiro Yamada | 74f09b8 | 2016-12-07 22:10:25 +0900 | [diff] [blame] | 15 | CONFIG_HUSH_PARSER=y |
| Stefan Roese | d8d2018 | 2016-10-25 11:47:51 +0200 | [diff] [blame] | 16 | # CONFIG_CMD_IMLS is not set |
| 17 | # CONFIG_CMD_FLASH is not set |
| Stefan Roese | 88aaef0 | 2016-12-09 15:43:26 +0100 | [diff] [blame] | 18 | CONFIG_CMD_MMC=y |
| Patrick Delaunay | 7328709 | 2017-01-27 11:00:42 +0100 | [diff] [blame] | 19 | CONFIG_CMD_PART=y |
| Stefan Roese | d8d2018 | 2016-10-25 11:47:51 +0200 | [diff] [blame] | 20 | CONFIG_CMD_SF=y |
| 21 | CONFIG_CMD_SPI=y |
| 22 | CONFIG_CMD_I2C=y |
| 23 | CONFIG_CMD_USB=y |
| 24 | # CONFIG_CMD_FPGA is not set |
| 25 | # CONFIG_CMD_SETEXPR is not set |
| 26 | CONFIG_CMD_TFTPPUT=y |
| 27 | CONFIG_CMD_DHCP=y |
| 28 | CONFIG_CMD_MII=y |
| 29 | CONFIG_CMD_PING=y |
| 30 | CONFIG_CMD_CACHE=y |
| 31 | CONFIG_CMD_TIME=y |
| Masahiro Yamada | 74f09b8 | 2016-12-07 22:10:25 +0900 | [diff] [blame] | 32 | CONFIG_CMD_MVEBU_BUBT=y |
| Stefan Roese | d8d2018 | 2016-10-25 11:47:51 +0200 | [diff] [blame] | 33 | CONFIG_CMD_EXT4=y |
| 34 | CONFIG_CMD_EXT4_WRITE=y |
| 35 | CONFIG_CMD_FAT=y |
| 36 | CONFIG_CMD_FS_GENERIC=y |
| Patrick Delaunay | c4bbbec | 2017-01-27 11:00:36 +0100 | [diff] [blame] | 37 | CONFIG_MAC_PARTITION=y |
| Patrick Delaunay | 21d3bce | 2017-01-27 11:00:38 +0100 | [diff] [blame] | 38 | CONFIG_ISO_PARTITION=y |
| Patrick Delaunay | 8a4f2bd | 2017-01-27 11:00:41 +0100 | [diff] [blame] | 39 | CONFIG_EFI_PARTITION=y |
| Stefan Roese | d8d2018 | 2016-10-25 11:47:51 +0200 | [diff] [blame] | 40 | CONFIG_BLOCK_CACHE=y |
| 41 | CONFIG_DM_I2C=y |
| 42 | CONFIG_SYS_I2C_MVTWSI=y |
| 43 | CONFIG_MISC=y |
| Stefan Roese | 88aaef0 | 2016-12-09 15:43:26 +0100 | [diff] [blame] | 44 | CONFIG_DM_MMC=y |
| 45 | CONFIG_MMC_SDHCI=y |
| 46 | CONFIG_MMC_SDHCI_XENON=y |
| Stefan Roese | d8d2018 | 2016-10-25 11:47:51 +0200 | [diff] [blame] | 47 | CONFIG_SPI_FLASH=y |
| 48 | CONFIG_SPI_FLASH_MACRONIX=y |
| 49 | CONFIG_SPI_FLASH_SPANSION=y |
| 50 | CONFIG_SPI_FLASH_STMICRO=y |
| Stefan Roese | 23d7dc2 | 2017-03-10 11:08:44 +0100 | [diff] [blame] | 51 | CONFIG_PHY_MARVELL=y |
| Stefan Roese | 97c3ba0 | 2017-02-20 12:25:26 +0100 | [diff] [blame] | 52 | CONFIG_MVPP2=y |
| Stefan Roese | c20e9d5 | 2016-10-27 13:36:45 +0200 | [diff] [blame] | 53 | CONFIG_PCI=y |
| 54 | CONFIG_DM_PCI=y |
| 55 | CONFIG_PCIE_DW_MVEBU=y |
| Stefan Roese | d8d2018 | 2016-10-25 11:47:51 +0200 | [diff] [blame] | 56 | CONFIG_MVEBU_COMPHY_SUPPORT=y |
| Masahiro Yamada | 74f09b8 | 2016-12-07 22:10:25 +0900 | [diff] [blame] | 57 | CONFIG_PINCTRL=y |
| Stefan Roese | afa4f62 | 2017-05-09 13:35:44 +0200 | [diff] [blame] | 58 | CONFIG_PINCTRL_ARMADA_8K=y |
| Stefan Roese | d8d2018 | 2016-10-25 11:47:51 +0200 | [diff] [blame] | 59 | # CONFIG_SPL_SERIAL_PRESENT is not set |
| Stefan Roese | d8d2018 | 2016-10-25 11:47:51 +0200 | [diff] [blame] | 60 | CONFIG_DEBUG_UART_BASE=0xf0512000 |
| 61 | CONFIG_DEBUG_UART_CLOCK=200000000 |
| 62 | CONFIG_DEBUG_UART_SHIFT=2 |
| 63 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 64 | CONFIG_SYS_NS16550=y |
| 65 | CONFIG_USB=y |
| 66 | CONFIG_DM_USB=y |
| 67 | CONFIG_USB_XHCI_HCD=y |
| 68 | CONFIG_USB_EHCI_HCD=y |
| 69 | CONFIG_USB_STORAGE=y |
| 70 | CONFIG_SMBIOS_MANUFACTURER="" |