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Sughosh Ganu1b9c52b2010-11-30 11:25:01 -05001/*
2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * Based on davinci_dvevm.h. Original Copyrights follow:
5 *
6 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#ifndef __CONFIG_H
24#define __CONFIG_H
25
26/*
27 * Board
28 */
29#define CONFIG_SYS_USE_NAND 1
30
31/*
32 * SoC Configuration
33 */
34#define CONFIG_MACH_DAVINCI_HAWK
35#define CONFIG_ARM926EJS /* arm926ejs CPU core */
36#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
Christian Rieschf49896d2011-11-28 23:46:19 +000037#define CONFIG_SOC_DA850 /* TI DA850 SoC */
Christian Riesch48c2d6d2012-02-02 00:44:39 +000038#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -050039#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
40#define CONFIG_SYS_OSCIN_FREQ 24000000
41#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
42#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
43#define CONFIG_SYS_HZ 1000
44#define CONFIG_SKIP_LOWLEVEL_INIT
45#define CONFIG_BOARD_EARLY_INIT_F
46
Sughosh Ganua2616972012-02-02 00:44:41 +000047#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \
48 DAVINCI_SYSCFG_SUSPSRC_EMAC | \
49 DAVINCI_SYSCFG_SUSPSRC_I2C | \
50 DAVINCI_SYSCFG_SUSPSRC_SPI1 | \
51 DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \
52 DAVINCI_SYSCFG_SUSPSRC_UART2)
53
54#if defined(CONFIG_UART_U_BOOT)
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -050055#define CONFIG_SYS_TEXT_BASE 0xc1080000
Sughosh Ganua2616972012-02-02 00:44:41 +000056#elif !defined(CONFIG_SPL_BUILD)
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -050057#define CONFIG_SYS_TEXT_BASE 0xc1180000
58#endif
59
Sughosh Ganua2616972012-02-02 00:44:41 +000060/* Spl */
61#define CONFIG_SPL
62#define CONFIG_SPL_NAND_SUPPORT
63#define CONFIG_SPL_NAND_SIMPLE
64#define CONFIG_SPL_NAND_LOAD
65#define CONFIG_SPL_SERIAL_SUPPORT
66#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds"
67#define CONFIG_SPL_TEXT_BASE 0xc1080000
68#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
69
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -050070/*
71 * Memory Info
72 */
73#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */
74#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE
75#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */
76#define CONFIG_SYS_SDRAM_BASE 0xc0000000
77#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20)
78#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\
79 GENERATED_GBL_DATA_SIZE)
80
81/* memtest start addr */
82#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1)
83
84/* memtest will be run on 16MB */
85#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024)
86
87#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
88#define CONFIG_STACKSIZE (256*1024) /* regular stack */
89
90/*
91 * Serial Driver info
92 */
93#define CONFIG_SYS_NS16550
94#define CONFIG_SYS_NS16550_SERIAL
95#define CONFIG_SYS_NS16550_REG_SIZE -4
96#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE
97#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
98#define CONFIG_CONS_INDEX 1
99#define CONFIG_BAUDRATE 115200
100#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
101
102/*
103 * Network & Ethernet Configuration
104 */
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -0500105#define CONFIG_DRIVER_TI_EMAC
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -0500106#define CONFIG_MII
107#define CONFIG_BOOTP_DEFAULT
108#define CONFIG_BOOTP_DNS
109#define CONFIG_BOOTP_DNS2
110#define CONFIG_BOOTP_SEND_HOSTNAME
111#define CONFIG_NET_RETRY_COUNT 10
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -0500112
113/*
114 * Nand Flash
115 */
116#ifdef CONFIG_SYS_USE_NAND
117#define CONFIG_SYS_NO_FLASH
118#define CONFIG_ENV_IS_IN_NAND
119#define CONFIG_ENV_SIZE (128 << 10)
120#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
121#define CONFIG_CLE_MASK 0x10
122#define CONFIG_ALE_MASK 0x8
123#define CONFIG_SYS_NAND_USE_FLASH_BBT
124#define CONFIG_NAND_DAVINCI
125#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
126#define CFG_DAVINCI_STD_NAND_LAYOUT
127#define CONFIG_SYS_NAND_CS 3
128#define CONFIG_SYS_NAND_PAGE_2K
129#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
130/* Max number of NAND devices */
131#define CONFIG_SYS_MAX_NAND_DEVICE 1
132#define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, }
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -0500133/* Block 0--not used by bootcode */
134#define CONFIG_ENV_OFFSET 0x0
135
136#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
137#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
138#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000
139#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000
140#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000
141#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
142#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
143 CONFIG_SYS_NAND_U_BOOT_SIZE - \
144 CONFIG_SYS_MALLOC_LEN - \
145 GENERATED_GBL_DATA_SIZE)
146#define CONFIG_SYS_NAND_ECCPOS { \
147 24, 25, 26, 27, 28, \
148 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
149 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
150 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
151 59, 60, 61, 62, 63 }
152#define CONFIG_SYS_NAND_PAGE_COUNT 64
153#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
154#define CONFIG_SYS_NAND_ECCSIZE 512
155#define CONFIG_SYS_NAND_ECCBYTES 10
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -0500156#define CONFIG_SYS_NAND_OOBSIZE 64
Stefano Babic533607c2011-12-15 10:55:37 +0100157
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -0500158#endif /* CONFIG_SYS_USE_NAND */
159
160/*
161 * U-Boot general configuration
162 */
163#define CONFIG_MISC_INIT_R
164#define CONFIG_BOOTFILE "uImage" /* Boot file name */
165#define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */
166#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
167#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
168#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
169#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
170#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
171#define CONFIG_VERSION_VARIABLE
172#define CONFIG_AUTO_COMPLETE
173#define CONFIG_SYS_HUSH_PARSER
174#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
175#define CONFIG_CMDLINE_EDITING
176#define CONFIG_SYS_LONGHELP
177#define CONFIG_CRC32_VERIFY
178#define CONFIG_MX_CYCLIC
179
180/*
181 * Linux Information
182 */
183#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
184#define CONFIG_CMDLINE_TAG
185#define CONFIG_SETUP_MEMORY_TAGS
186#define CONFIG_BOOTARGS \
187 "mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\
188 "4M ip=static"
189#define CONFIG_BOOTDELAY 3
190
191/*
192 * U-Boot commands
193 */
194#include <config_cmd_default.h>
195#define CONFIG_CMD_ENV
196#define CONFIG_CMD_ASKENV
197#define CONFIG_CMD_DHCP
198#define CONFIG_CMD_DIAG
199#define CONFIG_CMD_MII
200#define CONFIG_CMD_PING
201#define CONFIG_CMD_SAVES
202#define CONFIG_CMD_MEMORY
203
Hadli, Manjunath0dfccbe2012-02-06 00:30:44 +0000204#ifdef CONFIG_CMD_BDI
205#define CONFIG_CLOCKS
206#endif
207
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -0500208#ifdef CONFIG_SYS_USE_NAND
209#undef CONFIG_CMD_FLASH
210#undef CONFIG_CMD_IMLS
211#define CONFIG_CMD_NAND
212#endif
213
214#ifndef CONFIG_DRIVER_TI_EMAC
215#undef CONFIG_CMD_NET
216#undef CONFIG_CMD_DHCP
217#undef CONFIG_CMD_MII
218#undef CONFIG_CMD_PING
219#endif
220
221#endif /* __CONFIG_H */