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wdenkaffae2b2002-08-17 09:36:01 +00001/*
2 * (C) Copyright 2002
3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25#include <common.h>
26#include <asm/processor.h>
27#include <asm/mmu.h>
28
29int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower)
30{
31 switch (bat) {
Becky Bruce065b5772008-05-15 21:29:04 -050032 case DBAT0:
33 mtspr (DBAT0L, lower);
34 mtspr (DBAT0U, upper);
35 break;
wdenkaffae2b2002-08-17 09:36:01 +000036 case IBAT0:
37 mtspr (IBAT0L, lower);
38 mtspr (IBAT0U, upper);
39 break;
Becky Bruce065b5772008-05-15 21:29:04 -050040 case DBAT1:
41 mtspr (DBAT1L, lower);
42 mtspr (DBAT1U, upper);
43 break;
wdenkaffae2b2002-08-17 09:36:01 +000044 case IBAT1:
45 mtspr (IBAT1L, lower);
46 mtspr (IBAT1U, upper);
47 break;
Becky Bruce065b5772008-05-15 21:29:04 -050048 case DBAT2:
49 mtspr (DBAT2L, lower);
50 mtspr (DBAT2U, upper);
51 break;
wdenkaffae2b2002-08-17 09:36:01 +000052 case IBAT2:
53 mtspr (IBAT2L, lower);
54 mtspr (IBAT2U, upper);
55 break;
Becky Bruce065b5772008-05-15 21:29:04 -050056 case DBAT3:
57 mtspr (DBAT3L, lower);
58 mtspr (DBAT3U, upper);
59 break;
wdenkaffae2b2002-08-17 09:36:01 +000060 case IBAT3:
61 mtspr (IBAT3L, lower);
62 mtspr (IBAT3U, upper);
63 break;
Becky Bruce065b5772008-05-15 21:29:04 -050064#ifdef CONFIG_HIGH_BATS
65 case DBAT4:
66 mtspr (DBAT4L, lower);
67 mtspr (DBAT4U, upper);
wdenkaffae2b2002-08-17 09:36:01 +000068 break;
Becky Bruce065b5772008-05-15 21:29:04 -050069 case IBAT4:
70 mtspr (IBAT4L, lower);
71 mtspr (IBAT4U, upper);
wdenkaffae2b2002-08-17 09:36:01 +000072 break;
Becky Bruce065b5772008-05-15 21:29:04 -050073 case DBAT5:
74 mtspr (DBAT5L, lower);
75 mtspr (DBAT5U, upper);
wdenkaffae2b2002-08-17 09:36:01 +000076 break;
Becky Bruce065b5772008-05-15 21:29:04 -050077 case IBAT5:
78 mtspr (IBAT5L, lower);
79 mtspr (IBAT5U, upper);
wdenkaffae2b2002-08-17 09:36:01 +000080 break;
Becky Bruce065b5772008-05-15 21:29:04 -050081 case DBAT6:
82 mtspr (DBAT6L, lower);
83 mtspr (DBAT6U, upper);
84 break;
85 case IBAT6:
86 mtspr (IBAT6L, lower);
87 mtspr (IBAT6U, upper);
88 break;
89 case DBAT7:
90 mtspr (DBAT7L, lower);
91 mtspr (DBAT7U, upper);
92 break;
93 case IBAT7:
94 mtspr (IBAT7L, lower);
95 mtspr (IBAT7U, upper);
96 break;
97#endif
wdenkaffae2b2002-08-17 09:36:01 +000098 default:
99 return (-1);
100 }
101
102 return (0);
103}
104
105int read_bat (ppc_bat_t bat, unsigned long *upper, unsigned long *lower)
106{
107 unsigned long register u;
108 unsigned long register l;
109
110 switch (bat) {
Becky Bruce065b5772008-05-15 21:29:04 -0500111 case DBAT0:
112 l = mfspr (DBAT0L);
113 u = mfspr (DBAT0U);
114 break;
wdenkaffae2b2002-08-17 09:36:01 +0000115 case IBAT0:
116 l = mfspr (IBAT0L);
117 u = mfspr (IBAT0U);
118 break;
Becky Bruce065b5772008-05-15 21:29:04 -0500119 case DBAT1:
120 l = mfspr (DBAT1L);
121 u = mfspr (DBAT1U);
122 break;
wdenkaffae2b2002-08-17 09:36:01 +0000123 case IBAT1:
124 l = mfspr (IBAT1L);
125 u = mfspr (IBAT1U);
126 break;
Becky Bruce065b5772008-05-15 21:29:04 -0500127 case DBAT2:
128 l = mfspr (DBAT2L);
129 u = mfspr (DBAT2U);
130 break;
wdenkaffae2b2002-08-17 09:36:01 +0000131 case IBAT2:
132 l = mfspr (IBAT2L);
133 u = mfspr (IBAT2U);
134 break;
Becky Bruce065b5772008-05-15 21:29:04 -0500135 case DBAT3:
136 l = mfspr (DBAT3L);
137 u = mfspr (DBAT3U);
138 break;
wdenkaffae2b2002-08-17 09:36:01 +0000139 case IBAT3:
140 l = mfspr (IBAT3L);
141 u = mfspr (IBAT3U);
142 break;
Becky Bruce065b5772008-05-15 21:29:04 -0500143#ifdef CONFIG_HIGH_BATS
144 case DBAT4:
145 l = mfspr (DBAT4L);
146 u = mfspr (DBAT4U);
wdenkaffae2b2002-08-17 09:36:01 +0000147 break;
Becky Bruce065b5772008-05-15 21:29:04 -0500148 case IBAT4:
149 l = mfspr (IBAT4L);
150 u = mfspr (IBAT4U);
wdenkaffae2b2002-08-17 09:36:01 +0000151 break;
Becky Bruce065b5772008-05-15 21:29:04 -0500152 case DBAT5:
153 l = mfspr (DBAT5L);
154 u = mfspr (DBAT5U);
wdenkaffae2b2002-08-17 09:36:01 +0000155 break;
Becky Bruce065b5772008-05-15 21:29:04 -0500156 case IBAT5:
157 l = mfspr (IBAT5L);
158 u = mfspr (IBAT5U);
wdenkaffae2b2002-08-17 09:36:01 +0000159 break;
Becky Bruce065b5772008-05-15 21:29:04 -0500160 case DBAT6:
161 l = mfspr (DBAT6L);
162 u = mfspr (DBAT6U);
163 break;
164 case IBAT6:
165 l = mfspr (IBAT6L);
166 u = mfspr (IBAT6U);
167 break;
168 case DBAT7:
169 l = mfspr (DBAT7L);
170 u = mfspr (DBAT7U);
171 break;
172 case IBAT7:
173 l = mfspr (IBAT7L);
174 u = mfspr (IBAT7U);
175 break;
176#endif
wdenkaffae2b2002-08-17 09:36:01 +0000177 default:
178 return (-1);
179 }
180
181 *upper = u;
182 *lower = l;
183
184 return (0);
185}
Becky Brucee7efd5b2008-05-09 15:41:35 -0500186
187void print_bats(void)
188{
189 printf("BAT registers:\n");
190
191 printf ("\tIBAT0L = 0x%08X ", mfspr (IBAT0L));
192 printf ("\tIBAT0U = 0x%08X\n", mfspr (IBAT0U));
193 printf ("\tDBAT0L = 0x%08X ", mfspr (DBAT0L));
194 printf ("\tDBAT0U = 0x%08X\n", mfspr (DBAT0U));
195 printf ("\tIBAT1L = 0x%08X ", mfspr (IBAT1L));
196 printf ("\tIBAT1U = 0x%08X\n", mfspr (IBAT1U));
197 printf ("\tDBAT1L = 0x%08X ", mfspr (DBAT1L));
198 printf ("\tDBAT1U = 0x%08X\n", mfspr (DBAT1U));
199 printf ("\tIBAT2L = 0x%08X ", mfspr (IBAT2L));
200 printf ("\tIBAT2U = 0x%08X\n", mfspr (IBAT2U));
201 printf ("\tDBAT2L = 0x%08X ", mfspr (DBAT2L));
202 printf ("\tDBAT2U = 0x%08X\n", mfspr (DBAT2U));
203 printf ("\tIBAT3L = 0x%08X ", mfspr (IBAT3L));
204 printf ("\tIBAT3U = 0x%08X\n", mfspr (IBAT3U));
205 printf ("\tDBAT3L = 0x%08X ", mfspr (DBAT3L));
206 printf ("\tDBAT3U = 0x%08X\n", mfspr (DBAT3U));
207
208#ifdef CONFIG_HIGH_BATS
209 printf ("\tIBAT4L = 0x%08X ", mfspr (IBAT4L));
210 printf ("\tIBAT4U = 0x%08X\n", mfspr (IBAT4U));
211 printf ("\tDBAT4L = 0x%08X ", mfspr (DBAT4L));
212 printf ("\tDBAT4U = 0x%08X\n", mfspr (DBAT4U));
213 printf ("\tIBAT5L = 0x%08X ", mfspr (IBAT5L));
214 printf ("\tIBAT5U = 0x%08X\n", mfspr (IBAT5U));
215 printf ("\tDBAT5L = 0x%08X ", mfspr (DBAT5L));
216 printf ("\tDBAT5U = 0x%08X\n", mfspr (DBAT5U));
217 printf ("\tIBAT6L = 0x%08X ", mfspr (IBAT6L));
218 printf ("\tIBAT6U = 0x%08X\n", mfspr (IBAT6U));
219 printf ("\tDBAT6L = 0x%08X ", mfspr (DBAT6L));
220 printf ("\tDBAT6U = 0x%08X\n", mfspr (DBAT6U));
221 printf ("\tIBAT7L = 0x%08X ", mfspr (IBAT7L));
222 printf ("\tIBAT7U = 0x%08X\n", mfspr (IBAT7U));
223 printf ("\tDBAT7L = 0x%08X ", mfspr (DBAT7L));
224 printf ("\tDBAT7U = 0x%08X\n", mfspr (DBAT7U));
225#endif
226}