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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Dirk Behme7b84a7b2009-01-28 21:39:58 +01002/*
3 * (C) Copyright 2008
4 * Grazvydas Ignotas <notasas@gmail.com>
5 *
6 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
7 * Richard Woodruff <r-woodruff2@ti.com>
8 * Syed Mohammed Khasim <khasim@ti.com>
9 * Sunil Kumar <sunilsaini05@gmail.com>
10 * Shashi Ranjan <shashiranjanmca05@gmail.com>
11 *
12 * (C) Copyright 2004-2008
13 * Texas Instruments, <www.ti.com>
Dirk Behme7b84a7b2009-01-28 21:39:58 +010014 */
15#include <common.h>
Grazvydas Ignotasa5c5a552018-08-25 22:40:08 +030016#include <dm.h>
17#include <ns16550.h>
Tom Rix0f2a8042009-06-28 12:52:30 -050018#include <twl4030.h>
Dirk Behme7b84a7b2009-01-28 21:39:58 +010019#include <asm/io.h>
Grazvydas Ignotas43d95382012-03-22 13:49:22 +000020#include <asm/gpio.h>
Tom Rini83922512011-09-03 21:51:25 -040021#include <asm/arch/mmc_host_def.h>
Dirk Behme7b84a7b2009-01-28 21:39:58 +010022#include <asm/arch/mux.h>
Aneesh V1843eca2011-07-31 20:30:53 +000023#include <asm/arch/gpio.h>
Dirk Behme7b84a7b2009-01-28 21:39:58 +010024#include <asm/arch/sys_proto.h>
25#include <asm/mach-types.h>
26#include "pandora.h"
27
John Rigby0d21ed02010-12-20 18:27:51 -070028DECLARE_GLOBAL_DATA_PTR;
29
Grazvydas Ignotas09a22512010-06-08 17:19:22 -040030#define TWL4030_BB_CFG_BBCHEN (1 << 4)
31#define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2)
32#define TWL4030_BB_CFG_BBISEL_500UA 2
33
Grazvydas Ignotas43d95382012-03-22 13:49:22 +000034#define CONTROL_WKUP_CTRL 0x48002a5c
35#define GPIO_IO_PWRDNZ (1 << 6)
36#define PBIASLITEVMODE1 (1 << 8)
37
Grazvydas Ignotasa5c5a552018-08-25 22:40:08 +030038static const struct ns16550_platdata pandora_serial = {
39 .base = OMAP34XX_UART3,
40 .reg_shift = 2,
41 .clock = V_NS16550_CLK,
42 .fcr = UART_FCR_DEFVAL,
43};
44
45U_BOOT_DEVICE(pandora_uart) = {
46 "ns16550_serial",
47 &pandora_serial
48};
49
Tom Rix558bb832009-04-01 22:02:20 -050050/*
Dirk Behme7b84a7b2009-01-28 21:39:58 +010051 * Routine: board_init
52 * Description: Early hardware init.
Tom Rix558bb832009-04-01 22:02:20 -050053 */
Dirk Behme7b84a7b2009-01-28 21:39:58 +010054int board_init(void)
55{
Dirk Behme7b84a7b2009-01-28 21:39:58 +010056 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
57 /* board id for Linux */
58 gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA;
59 /* boot param addr */
60 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
61
62 return 0;
63}
64
Grazvydas Ignotas43d95382012-03-22 13:49:22 +000065static void set_output_gpio(unsigned int gpio, int value)
66{
67 int ret;
68
69 ret = gpio_request(gpio, "");
70 if (ret != 0) {
71 printf("could not request GPIO %u\n", gpio);
72 return;
73 }
74 ret = gpio_direction_output(gpio, value);
75 if (ret != 0)
76 printf("could not set GPIO %u to %d\n", gpio, value);
77}
78
Tom Rix558bb832009-04-01 22:02:20 -050079/*
Dirk Behme7b84a7b2009-01-28 21:39:58 +010080 * Routine: misc_init_r
81 * Description: Configure board specific parts
Tom Rix558bb832009-04-01 22:02:20 -050082 */
Dirk Behme7b84a7b2009-01-28 21:39:58 +010083int misc_init_r(void)
84{
Grazvydas Ignotas43d95382012-03-22 13:49:22 +000085 t2_t *t2_base = (t2_t *)T2_BASE;
86 u32 pbias_lite;
Dirk Behme7b84a7b2009-01-28 21:39:58 +010087
Grazvydas Ignotas17887bf2009-12-10 17:10:21 +020088 twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
Dirk Behme7b84a7b2009-01-28 21:39:58 +010089
Grazvydas Ignotas43d95382012-03-22 13:49:22 +000090 /* set up dual-voltage GPIOs to 1.8V */
91 pbias_lite = readl(&t2_base->pbias_lite);
92 pbias_lite &= ~PBIASLITEVMODE1;
93 pbias_lite |= PBIASLITEPWRDNZ1;
94 writel(pbias_lite, &t2_base->pbias_lite);
95 if (get_cpu_family() == CPU_OMAP36XX)
96 writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ,
97 CONTROL_WKUP_CTRL);
98
99 /* make sure audio and BT chips are in powerdown state */
100 set_output_gpio(14, 0);
101 set_output_gpio(15, 0);
102 set_output_gpio(118, 0);
103
104 /* enable USB supply */
105 set_output_gpio(164, 1);
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100106
Grazvydas Ignotas43d95382012-03-22 13:49:22 +0000107 /* wifi needs a short pulse to enter powersave state */
108 set_output_gpio(23, 1);
109 udelay(5000);
110 gpio_direction_output(23, 0);
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100111
Grazvydas Ignotas09a22512010-06-08 17:19:22 -0400112 /* Enable battery backup capacitor (3.2V, 0.5mA charge current) */
113 twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
Nishanth Menond26a1062013-03-26 05:20:49 +0000114 TWL4030_PM_RECEIVER_BB_CFG,
Grazvydas Ignotas09a22512010-06-08 17:19:22 -0400115 TWL4030_BB_CFG_BBCHEN | TWL4030_BB_CFG_BBSEL_3200MV |
Nishanth Menond26a1062013-03-26 05:20:49 +0000116 TWL4030_BB_CFG_BBISEL_500UA);
Grazvydas Ignotas09a22512010-06-08 17:19:22 -0400117
Paul Kocialkowski6bc318e2015-08-27 19:37:13 +0200118 omap_die_id_display();
Dirk Behme12dbcf62009-03-12 19:30:50 +0100119
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100120 return 0;
121}
122
Tom Rix558bb832009-04-01 22:02:20 -0500123/*
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100124 * Routine: set_muxconf_regs
125 * Description: Setting up the configuration Mux registers specific to the
126 * hardware. Many pins need to be moved from protect to primary
127 * mode.
Tom Rix558bb832009-04-01 22:02:20 -0500128 */
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100129void set_muxconf_regs(void)
130{
131 MUX_PANDORA();
Grazvydas Ignotasb5f9c3f2012-03-22 13:49:21 +0000132 if (get_cpu_family() == CPU_OMAP36XX) {
133 MUX_PANDORA_3730();
134 }
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100135}
Tom Rini83922512011-09-03 21:51:25 -0400136
Masahiro Yamada0a780172017-05-09 20:31:39 +0900137#ifdef CONFIG_MMC
Tom Rini83922512011-09-03 21:51:25 -0400138int board_mmc_init(bd_t *bis)
139{
Nikita Kiryanov4be9dbc2012-12-03 02:19:47 +0000140 return omap_mmc_init(0, 0, 0, -1, -1);
Tom Rini83922512011-09-03 21:51:25 -0400141}
Paul Kocialkowski69559892014-11-08 20:55:47 +0100142
143void board_mmc_power_init(void)
144{
145 twl4030_power_mmc_init(0);
146}
Tom Rini83922512011-09-03 21:51:25 -0400147#endif