Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_MX5=y | ||||
Tom Rini | 07edfae | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x77800000 |
Tom Rini | 2e262c4 | 2020-08-10 15:31:07 -0400 | [diff] [blame] | 4 | CONFIG_NR_DRAM_BANKS=2 |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 5 | CONFIG_ENV_SIZE=0x2000 |
6 | CONFIG_ENV_OFFSET=0x60000 | ||||
Tom Rini | 47dece3 | 2020-04-28 16:15:47 -0400 | [diff] [blame] | 7 | CONFIG_TARGET_MX53CX9020=y |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 8 | CONFIG_DM_GPIO=y |
Tom Rini | 8461027 | 2020-07-28 08:46:52 -0400 | [diff] [blame] | 9 | CONFIG_DEFAULT_DEVICE_TREE="imx53-cx9020" |
Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame^] | 10 | # CONFIG_CMD_BMODE is not set |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 11 | CONFIG_DISTRO_DEFAULTS=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 12 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/beckhoff/mx53cx9020/imximage.cfg" |
13 | CONFIG_BOOTDELAY=1 | ||||
Simon Glass | 4be229d | 2019-07-20 20:51:14 -0600 | [diff] [blame] | 14 | CONFIG_USE_PREBOOT=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 15 | CONFIG_CMD_MMC=y |
Steffen Dirkwinkel | cfe54da | 2019-10-23 07:40:41 +0200 | [diff] [blame] | 16 | CONFIG_CMD_USB=y |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 17 | # CONFIG_CMD_SETEXPR is not set |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 18 | CONFIG_OF_CONTROL=y |
Adam Ford | 710966e | 2020-07-03 06:48:56 -0500 | [diff] [blame] | 19 | CONFIG_ENV_OVERWRITE=y |
Tom Rini | 5b0b040 | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 20 | CONFIG_ENV_IS_IN_MMC=y |
Tom Rini | ca63e71 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 21 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 22 | CONFIG_FPGA_ALTERA=y |
23 | CONFIG_FPGA_CYCLON2=y | ||||
Yangbo Lu | 7334038 | 2019-06-21 11:42:28 +0800 | [diff] [blame] | 24 | CONFIG_FSL_ESDHC_IMX=y |
Miquel Raynal | 2e35dbb | 2019-10-03 19:50:05 +0200 | [diff] [blame] | 25 | CONFIG_MTD=y |
Steffen Dirkwinkel | 9cd396f | 2019-10-23 07:40:40 +0200 | [diff] [blame] | 26 | CONFIG_PHYLIB=y |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 27 | CONFIG_DM_ETH=y |
28 | CONFIG_FEC_MXC=y | ||||
Adam Ford | 5370547 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 29 | CONFIG_MII=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 30 | CONFIG_PINCTRL=y |
31 | CONFIG_PINCTRL_IMX5=y | ||||
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 32 | CONFIG_DM_REGULATOR=y |
Masahiro Yamada | 74f09b8 | 2016-12-07 22:10:25 +0900 | [diff] [blame] | 33 | CONFIG_MXC_UART=y |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 34 | CONFIG_USB=y |
35 | CONFIG_DM_USB=y | ||||
36 | CONFIG_USB_EHCI_MX5=y | ||||
Steffen Dirkwinkel | 3173618 | 2019-04-17 13:57:17 +0200 | [diff] [blame] | 37 | CONFIG_DM_VIDEO=y |
Anatolij Gustschin | dba3670 | 2020-02-04 22:43:06 +0100 | [diff] [blame] | 38 | # CONFIG_VIDEO_BPP8 is not set |
39 | # CONFIG_VIDEO_BPP32 is not set | ||||
Steffen Dirkwinkel | a2cab66 | 2019-10-23 07:40:42 +0200 | [diff] [blame] | 40 | CONFIG_SYS_WHITE_ON_BLACK=y |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 41 | CONFIG_VIDEO_IPUV3=y |