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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
25 * Neil Russell.
26 */
27
28#include <common.h>
29#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
30#include <ioports.h>
Heiko Schocher7f3afd62008-10-17 13:52:51 +020031#include <asm/io.h>
wdenkc6097192002-11-03 00:24:07 +000032#endif
Ryan Mallon78d66912011-01-27 08:54:15 +130033#if defined(CONFIG_AT91FAMILY)
wdenk20dd2fa2004-11-21 00:06:33 +000034#include <asm/io.h>
35#include <asm/arch/hardware.h>
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010036#include <asm/arch/at91_pio.h>
37#ifdef CONFIG_AT91_LEGACY
Daniel Gorsulowski5a2d8842009-05-18 13:20:54 +020038#include <asm/arch/gpio.h>
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010039#endif
Daniel Gorsulowski5a2d8842009-05-18 13:20:54 +020040#endif
Wolfgang Denk4646d2a2006-05-30 15:56:48 +020041#ifdef CONFIG_IXP425 /* only valid for IXP425 */
42#include <asm/arch/ixp425.h>
43#endif
Heiko Schocher643e7c02009-03-12 07:37:34 +010044#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
Heiko Schocher7f3afd62008-10-17 13:52:51 +020045#include <asm/io.h>
46#endif
wdenkc6097192002-11-03 00:24:07 +000047#include <i2c.h>
48
Mike Frysingeree12d542010-07-21 13:38:02 -040049#if defined(CONFIG_SOFT_I2C_GPIO_SCL)
50# include <asm/gpio.h>
51
52# ifndef I2C_GPIO_SYNC
53# define I2C_GPIO_SYNC
54# endif
55
56# ifndef I2C_INIT
57# define I2C_INIT \
58 do { \
59 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
60 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
61 } while (0)
62# endif
63
64# ifndef I2C_ACTIVE
65# define I2C_ACTIVE do { } while (0)
66# endif
67
68# ifndef I2C_TRISTATE
69# define I2C_TRISTATE do { } while (0)
70# endif
71
72# ifndef I2C_READ
73# define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
74# endif
75
76# ifndef I2C_SDA
77# define I2C_SDA(bit) \
78 do { \
79 if (bit) \
80 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
81 else \
82 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
83 I2C_GPIO_SYNC; \
84 } while (0)
85# endif
86
87# ifndef I2C_SCL
88# define I2C_SCL(bit) \
89 do { \
90 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
91 I2C_GPIO_SYNC; \
92 } while (0)
93# endif
94
95# ifndef I2C_DELAY
96# define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
97# endif
98
99#endif
100
wdenkc6097192002-11-03 00:24:07 +0000101/* #define DEBUG_I2C */
102
Wolfgang Denk6405a152006-03-31 18:32:53 +0200103#ifdef DEBUG_I2C
104DECLARE_GLOBAL_DATA_PTR;
105#endif
106
wdenkc6097192002-11-03 00:24:07 +0000107/*-----------------------------------------------------------------------
108 * Definitions
109 */
110
111#define RETRIES 0
112
wdenkc6097192002-11-03 00:24:07 +0000113#define I2C_ACK 0 /* PD_SDA level to ack a byte */
114#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
115
116
117#ifdef DEBUG_I2C
118#define PRINTD(fmt,args...) do { \
wdenkc6097192002-11-03 00:24:07 +0000119 printf (fmt ,##args); \
120 } while (0)
121#else
122#define PRINTD(fmt,args...)
123#endif
124
Heiko Schocher9031b212008-10-15 09:34:45 +0200125#if defined(CONFIG_I2C_MULTI_BUS)
Trent Piepho3e9dabd2008-11-12 17:29:48 -0800126static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
Heiko Schocher9031b212008-10-15 09:34:45 +0200127#endif /* CONFIG_I2C_MULTI_BUS */
128
wdenkc6097192002-11-03 00:24:07 +0000129/*-----------------------------------------------------------------------
130 * Local functions
131 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200132#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +0000133static void send_reset (void);
Heiko Schocher0e2f2c52008-10-15 09:38:38 +0200134#endif
wdenkc6097192002-11-03 00:24:07 +0000135static void send_start (void);
136static void send_stop (void);
137static void send_ack (int);
138static int write_byte (uchar byte);
139static uchar read_byte (int);
140
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200141#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +0000142/*-----------------------------------------------------------------------
143 * Send a reset sequence consisting of 9 clocks with the data signal high
144 * to clock any confused device back into an idle state. Also send a
145 * <stop> at the end of the sequence for belts & suspenders.
146 */
147static void send_reset(void)
148{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200149 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000150 int j;
151
wdenka6db71d2003-04-08 23:25:21 +0000152 I2C_SCL(1);
wdenkc6097192002-11-03 00:24:07 +0000153 I2C_SDA(1);
wdenka6db71d2003-04-08 23:25:21 +0000154#ifdef I2C_INIT
155 I2C_INIT;
156#endif
157 I2C_TRISTATE;
wdenkc6097192002-11-03 00:24:07 +0000158 for(j = 0; j < 9; j++) {
159 I2C_SCL(0);
160 I2C_DELAY;
161 I2C_DELAY;
162 I2C_SCL(1);
163 I2C_DELAY;
164 I2C_DELAY;
165 }
166 send_stop();
167 I2C_TRISTATE;
168}
Heiko Schocher0e2f2c52008-10-15 09:38:38 +0200169#endif
wdenkc6097192002-11-03 00:24:07 +0000170
171/*-----------------------------------------------------------------------
172 * START: High -> Low on SDA while SCL is High
173 */
174static void send_start(void)
175{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200176 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000177
178 I2C_DELAY;
179 I2C_SDA(1);
180 I2C_ACTIVE;
181 I2C_DELAY;
182 I2C_SCL(1);
183 I2C_DELAY;
184 I2C_SDA(0);
185 I2C_DELAY;
186}
187
188/*-----------------------------------------------------------------------
189 * STOP: Low -> High on SDA while SCL is High
190 */
191static void send_stop(void)
192{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200193 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000194
195 I2C_SCL(0);
196 I2C_DELAY;
197 I2C_SDA(0);
198 I2C_ACTIVE;
199 I2C_DELAY;
200 I2C_SCL(1);
201 I2C_DELAY;
202 I2C_SDA(1);
203 I2C_DELAY;
204 I2C_TRISTATE;
205}
206
wdenkc6097192002-11-03 00:24:07 +0000207/*-----------------------------------------------------------------------
208 * ack should be I2C_ACK or I2C_NOACK
209 */
210static void send_ack(int ack)
211{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200212 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000213
wdenkc6097192002-11-03 00:24:07 +0000214 I2C_SCL(0);
215 I2C_DELAY;
wdenkc6097192002-11-03 00:24:07 +0000216 I2C_ACTIVE;
Wolfgang Denkd4a61102006-03-13 00:50:48 +0100217 I2C_SDA(ack);
wdenkc6097192002-11-03 00:24:07 +0000218 I2C_DELAY;
219 I2C_SCL(1);
220 I2C_DELAY;
221 I2C_DELAY;
222 I2C_SCL(0);
223 I2C_DELAY;
224}
225
wdenkc6097192002-11-03 00:24:07 +0000226/*-----------------------------------------------------------------------
227 * Send 8 bits and look for an acknowledgement.
228 */
229static int write_byte(uchar data)
230{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200231 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000232 int j;
233 int nack;
234
235 I2C_ACTIVE;
236 for(j = 0; j < 8; j++) {
237 I2C_SCL(0);
238 I2C_DELAY;
239 I2C_SDA(data & 0x80);
240 I2C_DELAY;
241 I2C_SCL(1);
242 I2C_DELAY;
243 I2C_DELAY;
244
245 data <<= 1;
246 }
247
248 /*
249 * Look for an <ACK>(negative logic) and return it.
250 */
251 I2C_SCL(0);
252 I2C_DELAY;
253 I2C_SDA(1);
254 I2C_TRISTATE;
255 I2C_DELAY;
256 I2C_SCL(1);
257 I2C_DELAY;
258 I2C_DELAY;
259 nack = I2C_READ;
260 I2C_SCL(0);
261 I2C_DELAY;
262 I2C_ACTIVE;
263
264 return(nack); /* not a nack is an ack */
265}
266
Heiko Schocher9031b212008-10-15 09:34:45 +0200267#if defined(CONFIG_I2C_MULTI_BUS)
268/*
269 * Functions for multiple I2C bus handling
270 */
271unsigned int i2c_get_bus_num(void)
272{
273 return i2c_bus_num;
274}
275
276int i2c_set_bus_num(unsigned int bus)
277{
Heiko Schocher6ee861b2008-10-15 09:39:47 +0200278#if defined(CONFIG_I2C_MUX)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200279 if (bus < CONFIG_SYS_MAX_I2C_BUS) {
Heiko Schocher6ee861b2008-10-15 09:39:47 +0200280 i2c_bus_num = bus;
281 } else {
282 int ret;
283
284 ret = i2x_mux_select_mux(bus);
Heiko Schocherc6348962011-04-08 16:24:09 +0200285 i2c_init_board();
Heiko Schocher6ee861b2008-10-15 09:39:47 +0200286 if (ret == 0)
287 i2c_bus_num = bus;
288 else
289 return ret;
290 }
291#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200292 if (bus >= CONFIG_SYS_MAX_I2C_BUS)
Heiko Schocher9031b212008-10-15 09:34:45 +0200293 return -1;
294 i2c_bus_num = bus;
Heiko Schocher6ee861b2008-10-15 09:39:47 +0200295#endif
Heiko Schocher9031b212008-10-15 09:34:45 +0200296 return 0;
297}
Jens Scharsig7911a922009-03-31 08:18:29 +0200298#endif
Heiko Schocher9031b212008-10-15 09:34:45 +0200299
wdenkc6097192002-11-03 00:24:07 +0000300/*-----------------------------------------------------------------------
301 * if ack == I2C_ACK, ACK the byte so can continue reading, else
302 * send I2C_NOACK to end the read.
303 */
304static uchar read_byte(int ack)
305{
Heiko Schocherdc7d22a2008-10-15 09:35:26 +0200306 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000307 int data;
308 int j;
309
310 /*
311 * Read 8 bits, MSB first.
312 */
313 I2C_TRISTATE;
Haavard Skinnemoen15fb0a12008-05-16 11:08:11 +0200314 I2C_SDA(1);
wdenkc6097192002-11-03 00:24:07 +0000315 data = 0;
316 for(j = 0; j < 8; j++) {
317 I2C_SCL(0);
318 I2C_DELAY;
319 I2C_SCL(1);
320 I2C_DELAY;
321 data <<= 1;
322 data |= I2C_READ;
323 I2C_DELAY;
324 }
325 send_ack(ack);
326
327 return(data);
328}
329
330/*=====================================================================*/
331/* Public Functions */
332/*=====================================================================*/
333
334/*-----------------------------------------------------------------------
335 * Initialization
336 */
337void i2c_init (int speed, int slaveaddr)
338{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200339#if defined(CONFIG_SYS_I2C_INIT_BOARD)
Heiko Schocher0e2f2c52008-10-15 09:38:38 +0200340 /* call board specific i2c bus reset routine before accessing the */
341 /* environment, which might be in a chip on that bus. For details */
342 /* about this problem see doc/I2C_Edge_Conditions. */
343 i2c_init_board();
344#else
wdenkc6097192002-11-03 00:24:07 +0000345 /*
wdenk57b2d802003-06-27 21:31:46 +0000346 * WARNING: Do NOT save speed in a static variable: if the
347 * I2C routines are called before RAM is initialized (to read
348 * the DIMM SPD, for instance), RAM won't be usable and your
349 * system will crash.
wdenkc6097192002-11-03 00:24:07 +0000350 */
351 send_reset ();
Heiko Schocher0e2f2c52008-10-15 09:38:38 +0200352#endif
wdenkc6097192002-11-03 00:24:07 +0000353}
354
355/*-----------------------------------------------------------------------
356 * Probe to see if a chip is present. Also good for checking for the
357 * completion of EEPROM writes since the chip stops responding until
358 * the write completes (typically 10mSec).
359 */
360int i2c_probe(uchar addr)
361{
362 int rc;
363
Wolfgang Denk0a8599f2006-03-12 01:30:45 +0100364 /*
Wolfgang Denk2bad8682006-03-12 02:55:22 +0100365 * perform 1 byte write transaction with just address byte
Wolfgang Denk0a8599f2006-03-12 01:30:45 +0100366 * (fake write)
367 */
wdenkc6097192002-11-03 00:24:07 +0000368 send_start();
wdenk34b613e2002-12-17 01:51:00 +0000369 rc = write_byte ((addr << 1) | 0);
wdenkc6097192002-11-03 00:24:07 +0000370 send_stop();
371
372 return (rc ? 1 : 0);
373}
374
375/*-----------------------------------------------------------------------
376 * Read bytes
377 */
378int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
379{
380 int shift;
381 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
382 chip, addr, alen, buffer, len);
383
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200384#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
wdenkc6097192002-11-03 00:24:07 +0000385 /*
386 * EEPROM chips that implement "address overflow" are ones
387 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
388 * address and the extra bits end up in the "chip address"
389 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
390 * four 256 byte chips.
391 *
392 * Note that we consider the length of the address field to
393 * still be one byte because the extra address bits are
394 * hidden in the chip address.
395 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200396 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
wdenkc6097192002-11-03 00:24:07 +0000397
398 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
399 chip, addr);
400#endif
401
402 /*
403 * Do the addressing portion of a write cycle to set the
404 * chip's address pointer. If the address length is zero,
405 * don't do the normal write cycle to set the address pointer,
406 * there is no address pointer in this chip.
407 */
408 send_start();
409 if(alen > 0) {
410 if(write_byte(chip << 1)) { /* write cycle */
411 send_stop();
412 PRINTD("i2c_read, no chip responded %02X\n", chip);
413 return(1);
414 }
415 shift = (alen-1) * 8;
416 while(alen-- > 0) {
417 if(write_byte(addr >> shift)) {
418 PRINTD("i2c_read, address not <ACK>ed\n");
419 return(1);
420 }
421 shift -= 8;
422 }
Andrew Dyer58c41f92008-12-29 17:36:01 -0600423
424 /* Some I2C chips need a stop/start sequence here,
425 * other chips don't work with a full stop and need
426 * only a start. Default behaviour is to send the
427 * stop/start sequence.
428 */
429#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
430 send_start();
431#else
432 send_stop();
wdenkc6097192002-11-03 00:24:07 +0000433 send_start();
Andrew Dyer58c41f92008-12-29 17:36:01 -0600434#endif
wdenkc6097192002-11-03 00:24:07 +0000435 }
436 /*
437 * Send the chip address again, this time for a read cycle.
438 * Then read the data. On the last byte, we do a NACK instead
439 * of an ACK(len == 0) to terminate the read.
440 */
441 write_byte((chip << 1) | 1); /* read cycle */
442 while(len-- > 0) {
443 *buffer++ = read_byte(len == 0);
444 }
445 send_stop();
446 return(0);
447}
448
449/*-----------------------------------------------------------------------
450 * Write bytes
451 */
452int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
453{
454 int shift, failures = 0;
455
456 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
457 chip, addr, alen, buffer, len);
458
459 send_start();
460 if(write_byte(chip << 1)) { /* write cycle */
461 send_stop();
462 PRINTD("i2c_write, no chip responded %02X\n", chip);
463 return(1);
464 }
465 shift = (alen-1) * 8;
466 while(alen-- > 0) {
467 if(write_byte(addr >> shift)) {
468 PRINTD("i2c_write, address not <ACK>ed\n");
469 return(1);
470 }
471 shift -= 8;
472 }
473
474 while(len-- > 0) {
475 if(write_byte(*buffer++)) {
476 failures++;
477 }
478 }
479 send_stop();
480 return(failures);
481}