| Vipin KUMAR | fc9589f | 2010-01-15 19:15:44 +0530 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2009 |
| 3 | * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| Vipin KUMAR | 3f64acb | 2012-02-26 23:13:29 +0000 | [diff] [blame] | 24 | #ifndef __DW_I2C_H_ |
| 25 | #define __DW_I2C_H_ |
| Vipin KUMAR | fc9589f | 2010-01-15 19:15:44 +0530 | [diff] [blame] | 26 | |
| 27 | struct i2c_regs { |
| 28 | u32 ic_con; |
| 29 | u32 ic_tar; |
| 30 | u32 ic_sar; |
| 31 | u32 ic_hs_maddr; |
| 32 | u32 ic_cmd_data; |
| 33 | u32 ic_ss_scl_hcnt; |
| 34 | u32 ic_ss_scl_lcnt; |
| 35 | u32 ic_fs_scl_hcnt; |
| 36 | u32 ic_fs_scl_lcnt; |
| 37 | u32 ic_hs_scl_hcnt; |
| 38 | u32 ic_hs_scl_lcnt; |
| 39 | u32 ic_intr_stat; |
| 40 | u32 ic_intr_mask; |
| 41 | u32 ic_raw_intr_stat; |
| 42 | u32 ic_rx_tl; |
| 43 | u32 ic_tx_tl; |
| 44 | u32 ic_clr_intr; |
| 45 | u32 ic_clr_rx_under; |
| 46 | u32 ic_clr_rx_over; |
| 47 | u32 ic_clr_tx_over; |
| 48 | u32 ic_clr_rd_req; |
| 49 | u32 ic_clr_tx_abrt; |
| 50 | u32 ic_clr_rx_done; |
| 51 | u32 ic_clr_activity; |
| 52 | u32 ic_clr_stop_det; |
| 53 | u32 ic_clr_start_det; |
| 54 | u32 ic_clr_gen_call; |
| 55 | u32 ic_enable; |
| 56 | u32 ic_status; |
| 57 | u32 ic_txflr; |
| 58 | u32 ix_rxflr; |
| 59 | u32 reserved_1; |
| 60 | u32 ic_tx_abrt_source; |
| 61 | }; |
| 62 | |
| 63 | #define IC_CLK 166 |
| 64 | #define NANO_TO_MICRO 1000 |
| 65 | |
| 66 | /* High and low times in different speed modes (in ns) */ |
| 67 | #define MIN_SS_SCL_HIGHTIME 4000 |
| 68 | #define MIN_SS_SCL_LOWTIME 5000 |
| 69 | #define MIN_FS_SCL_HIGHTIME 800 |
| 70 | #define MIN_FS_SCL_LOWTIME 1700 |
| 71 | #define MIN_HS_SCL_HIGHTIME 60 |
| 72 | #define MIN_HS_SCL_LOWTIME 160 |
| 73 | |
| 74 | /* Worst case timeout for 1 byte is kept as 2ms */ |
| 75 | #define I2C_BYTE_TO (CONFIG_SYS_HZ/500) |
| 76 | #define I2C_STOPDET_TO (CONFIG_SYS_HZ/500) |
| 77 | #define I2C_BYTE_TO_BB (I2C_BYTE_TO * 16) |
| 78 | |
| 79 | /* i2c control register definitions */ |
| 80 | #define IC_CON_SD 0x0040 |
| 81 | #define IC_CON_RE 0x0020 |
| 82 | #define IC_CON_10BITADDRMASTER 0x0010 |
| 83 | #define IC_CON_10BITADDR_SLAVE 0x0008 |
| 84 | #define IC_CON_SPD_MSK 0x0006 |
| 85 | #define IC_CON_SPD_SS 0x0002 |
| 86 | #define IC_CON_SPD_FS 0x0004 |
| 87 | #define IC_CON_SPD_HS 0x0006 |
| 88 | #define IC_CON_MM 0x0001 |
| 89 | |
| 90 | /* i2c target address register definitions */ |
| 91 | #define TAR_ADDR 0x0050 |
| 92 | |
| 93 | /* i2c slave address register definitions */ |
| 94 | #define IC_SLAVE_ADDR 0x0002 |
| 95 | |
| 96 | /* i2c data buffer and command register definitions */ |
| 97 | #define IC_CMD 0x0100 |
| 98 | |
| 99 | /* i2c interrupt status register definitions */ |
| 100 | #define IC_GEN_CALL 0x0800 |
| 101 | #define IC_START_DET 0x0400 |
| 102 | #define IC_STOP_DET 0x0200 |
| 103 | #define IC_ACTIVITY 0x0100 |
| 104 | #define IC_RX_DONE 0x0080 |
| 105 | #define IC_TX_ABRT 0x0040 |
| 106 | #define IC_RD_REQ 0x0020 |
| 107 | #define IC_TX_EMPTY 0x0010 |
| 108 | #define IC_TX_OVER 0x0008 |
| 109 | #define IC_RX_FULL 0x0004 |
| 110 | #define IC_RX_OVER 0x0002 |
| 111 | #define IC_RX_UNDER 0x0001 |
| 112 | |
| 113 | /* fifo threshold register definitions */ |
| 114 | #define IC_TL0 0x00 |
| 115 | #define IC_TL1 0x01 |
| 116 | #define IC_TL2 0x02 |
| 117 | #define IC_TL3 0x03 |
| 118 | #define IC_TL4 0x04 |
| 119 | #define IC_TL5 0x05 |
| 120 | #define IC_TL6 0x06 |
| 121 | #define IC_TL7 0x07 |
| 122 | #define IC_RX_TL IC_TL0 |
| 123 | #define IC_TX_TL IC_TL0 |
| 124 | |
| 125 | /* i2c enable register definitions */ |
| 126 | #define IC_ENABLE_0B 0x0001 |
| 127 | |
| 128 | /* i2c status register definitions */ |
| 129 | #define IC_STATUS_SA 0x0040 |
| 130 | #define IC_STATUS_MA 0x0020 |
| 131 | #define IC_STATUS_RFF 0x0010 |
| 132 | #define IC_STATUS_RFNE 0x0008 |
| 133 | #define IC_STATUS_TFE 0x0004 |
| 134 | #define IC_STATUS_TFNF 0x0002 |
| 135 | #define IC_STATUS_ACT 0x0001 |
| 136 | |
| 137 | /* Speed Selection */ |
| 138 | #define IC_SPEED_MODE_STANDARD 1 |
| 139 | #define IC_SPEED_MODE_FAST 2 |
| 140 | #define IC_SPEED_MODE_MAX 3 |
| 141 | |
| 142 | #define I2C_MAX_SPEED 3400000 |
| 143 | #define I2C_FAST_SPEED 400000 |
| 144 | #define I2C_STANDARD_SPEED 100000 |
| 145 | |
| Vipin KUMAR | 3f64acb | 2012-02-26 23:13:29 +0000 | [diff] [blame] | 146 | #endif /* __DW_I2C_H_ */ |