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git01.mediatek.com / filogic / uboot / a1d9f671e03b9733667260c6970eb2adaae23d4e / . / configs / evb-rk3328_defconfig
blob: 78fb93bf97855a323eddd58ebfa0bcf03850eac6 [file] [log] [blame]
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]3CONFIG_ARCH_ROCKCHIP=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x00200000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]5CONFIG_NR_DRAM_BANKS=1
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]6CONFIG_ENV_OFFSET=0x3F8000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]7CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]8CONFIG_ROCKCHIP_RK3328=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]9CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]10CONFIG_TPL_LIBCOMMON_SUPPORT=y
11CONFIG_TPL_LIBGENERIC_SUPPORT=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]12CONFIG_SPL_DRIVERS_MISC=y
Kever Yang05599962019-12-31 16:02:59 +0800[diff] [blame]13CONFIG_SPL_STACK_R_ADDR=0x4000000
14CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]15CONFIG_DEBUG_UART_BASE=0xFF130000
16CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]17CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]18CONFIG_DEBUG_UART=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]19CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
Tom Rinib5bf5622017-08-25 17:50:27 -0400[diff] [blame]20# CONFIG_ANDROID_BOOT_IMAGE is not set
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]21CONFIG_FIT=y
Kever Yangca3e02b2019-08-02 10:40:02 +0300[diff] [blame]22CONFIG_FIT_VERBOSE=y
23CONFIG_SPL_LOAD_FIT=y
Klaus Goger2b6b4f22018-05-25 23:45:05 +0200[diff] [blame]24CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb"
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]25# CONFIG_DISPLAY_CPUINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]26CONFIG_DISPLAY_BOARDINFO_LATE=y
Kever Yang1b0675a2019-08-20 11:47:00 +0800[diff] [blame]27# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Kever Yangca3e02b2019-08-02 10:40:02 +0300[diff] [blame]28CONFIG_TPL_SYS_MALLOC_SIMPLE=y
29CONFIG_SPL_STACK_R=y
Kever Yang05599962019-12-31 16:02:59 +0800[diff] [blame]30CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
31CONFIG_SPL_ATF=y
32CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]33CONFIG_TPL_DRIVERS_MISC=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]34CONFIG_CMD_BOOTZ=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]35CONFIG_CMD_GPT=y
36CONFIG_CMD_MMC=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]37CONFIG_CMD_USB=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]38# CONFIG_CMD_SETEXPR is not set
39CONFIG_CMD_TIME=y
Kever Yang07be6692019-06-09 00:27:15 +0300[diff] [blame]40CONFIG_SPL_OF_CONTROL=y
Kever Yangca3e02b2019-08-02 10:40:02 +0300[diff] [blame]41CONFIG_TPL_OF_CONTROL=y
42CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]43CONFIG_TPL_OF_PLATDATA=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]44CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]45CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinieb1f9092020-07-24 17:14:47 -0400[diff] [blame]46CONFIG_SYS_MMC_ENV_DEV=1
David Wu67572b22018-01-13 14:03:23 +0800[diff] [blame]47CONFIG_NET_RANDOM_ETHADDR=y
Kever Yangca3e02b2019-08-02 10:40:02 +0300[diff] [blame]48CONFIG_TPL_DM=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]49CONFIG_REGMAP=y
Kever Yang07be6692019-06-09 00:27:15 +0300[diff] [blame]50CONFIG_SPL_REGMAP=y
Kever Yangca3e02b2019-08-02 10:40:02 +0300[diff] [blame]51CONFIG_TPL_REGMAP=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]52CONFIG_SYSCON=y
Kever Yang07be6692019-06-09 00:27:15 +0300[diff] [blame]53CONFIG_SPL_SYSCON=y
Kever Yangca3e02b2019-08-02 10:40:02 +0300[diff] [blame]54CONFIG_TPL_SYSCON=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]55CONFIG_CLK=y
Kever Yang07be6692019-06-09 00:27:15 +0300[diff] [blame]56CONFIG_SPL_CLK=y
Alex Kiernane80d2942018-05-29 15:30:55 +0000[diff] [blame]57CONFIG_FASTBOOT_BUF_ADDR=0x800800
Alex Kiernane80d2942018-05-29 15:30:55 +0000[diff] [blame]58CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]59CONFIG_ROCKCHIP_GPIO=y
Elaine Zhang4f53f5f2017-09-27 15:23:37 +0800[diff] [blame]60CONFIG_SYS_I2C_ROCKCHIP=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]61CONFIG_MMC_DW=y
62CONFIG_MMC_DW_ROCKCHIP=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]63CONFIG_SF_DEFAULT_SPEED=20000000
David Wu67572b22018-01-13 14:03:23 +0800[diff] [blame]64CONFIG_DM_ETH=y
65CONFIG_ETH_DESIGNWARE=y
66CONFIG_GMAC_ROCKCHIP=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]67CONFIG_PINCTRL=y
Kever Yangca3e02b2019-08-02 10:40:02 +0300[diff] [blame]68CONFIG_SPL_PINCTRL=y
Elaine Zhang4f53f5f2017-09-27 15:23:37 +0800[diff] [blame]69CONFIG_DM_PMIC=y
70CONFIG_PMIC_RK8XX=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]71CONFIG_REGULATOR_PWM=y
72CONFIG_DM_REGULATOR_FIXED=y
Elaine Zhang4f53f5f2017-09-27 15:23:37 +0800[diff] [blame]73CONFIG_REGULATOR_RK8XX=y
74CONFIG_PWM_ROCKCHIP=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]75CONFIG_RAM=y
Kever Yangca3e02b2019-08-02 10:40:02 +0300[diff] [blame]76CONFIG_SPL_RAM=y
77CONFIG_TPL_RAM=y
Philipp Tomsich29c8bc02017-03-17 20:34:53 +0100[diff] [blame]78CONFIG_BAUDRATE=1500000
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]79CONFIG_DEBUG_UART_SHIFT=2
Kever Yangca3e02b2019-08-02 10:40:02 +0300[diff] [blame]80CONFIG_DEBUG_UART_ANNOUNCE=y
81CONFIG_DEBUG_UART_SKIP_INIT=y
Kever Yang1f3bd482017-02-23 15:37:56 +0800[diff] [blame]82CONFIG_SYSRESET=y
YouMin Chenb9f7df32019-11-15 11:04:44 +0800[diff] [blame]83# CONFIG_TPL_SYSRESET is not set
Meng Dongyang00bc0642017-05-17 18:21:45 +0800[diff] [blame]84CONFIG_USB=y
Tom Rinice34f5d2017-07-24 21:10:06 -0400[diff] [blame]85CONFIG_USB_XHCI_HCD=y
86CONFIG_USB_XHCI_DWC3=y
Meng Dongyang00bc0642017-05-17 18:21:45 +0800[diff] [blame]87CONFIG_USB_EHCI_HCD=y
88CONFIG_USB_EHCI_GENERIC=y
89CONFIG_USB_OHCI_HCD=y
90CONFIG_USB_OHCI_GENERIC=y
Meng Dongyang75844782017-06-28 19:22:41 +0800[diff] [blame]91CONFIG_USB_DWC2=y
Tom Rini929ea652019-01-07 17:46:19 -0500[diff] [blame]92CONFIG_USB_DWC3=y
Jean-Jacques Hiblot731a2a32019-09-11 11:33:53 +0200[diff] [blame]93# CONFIG_USB_DWC3_GADGET is not set
Meng Dongyang75844782017-06-28 19:22:41 +0800[diff] [blame]94CONFIG_USB_GADGET=y
Tom Rini9e74f5d2017-10-16 21:35:43 -0400[diff] [blame]95CONFIG_USB_GADGET_DWC2_OTG=y
Kever Yangca3e02b2019-08-02 10:40:02 +0300[diff] [blame]96CONFIG_SPL_TINY_MEMSET=y
97CONFIG_TPL_TINY_MEMSET=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]98CONFIG_ERRNO_STR=y