blob: 44bedd8b6737634e65580cb2141ec40570417400 [file] [log] [blame]
Simon Goldschmidt15616b52018-11-02 11:54:52 +01001// SPDX-License-Identifier: (GPL-2.0+ OR X11)
2/*
3 * U-Boot additions
4 *
5 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
6 * Copyright (c) 2018 Simon Goldschmidt
7 */
8
Simon Goldschmidt64a12bf2019-03-01 20:12:29 +01009#include "socfpga-common-u-boot.dtsi"
10
Simon Goldschmidt15616b52018-11-02 11:54:52 +010011/{
12 aliases {
13 spi0 = "/soc/spi@ff705000";
14 udc0 = &usb0;
15 };
Simon Goldschmidt15616b52018-11-02 11:54:52 +010016};
17
18&watchdog0 {
19 status = "disabled";
20};
21
22&mmc {
Marek Vasuta1c1ec12019-06-27 00:19:32 +020023 status = "disabled";
Simon Goldschmidt15616b52018-11-02 11:54:52 +010024};
25
26&qspi {
27 u-boot,dm-pre-reloc;
28
29 n25q128@0 {
Neil Armstronga009fa72019-02-10 10:16:20 +000030 compatible = "n25q128", "jedec,spi-nor";
Simon Goldschmidt15616b52018-11-02 11:54:52 +010031 u-boot,dm-pre-reloc;
32 };
33 n25q00@1 {
Neil Armstronga009fa72019-02-10 10:16:20 +000034 compatible = "n25q00", "jedec,spi-nor";
Simon Goldschmidt15616b52018-11-02 11:54:52 +010035 u-boot,dm-pre-reloc;
36 };
37};
38
39&uart0 {
40 clock-frequency = <100000000>;
41 u-boot,dm-pre-reloc;
42};
43
44&uart1 {
45 clock-frequency = <100000000>;
46};
47
48&porta {
49 bank-name = "porta";
50};
51
52&portb {
53 bank-name = "portb";
54};
55
56&portc {
57 bank-name = "portc";
58};