| Lars Povlsen | 585078f | 2018-12-20 09:56:03 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2018 Microsemi Corporation |
| 4 | */ |
| 5 | |
| Lars Povlsen | 585078f | 2018-12-20 09:56:03 +0100 | [diff] [blame] | 6 | #include <asm/io.h> |
| Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 7 | #include <linux/bitops.h> |
| Lars Povlsen | 585078f | 2018-12-20 09:56:03 +0100 | [diff] [blame] | 8 | |
| 9 | void mscc_gpio_set_alternate(int gpio, int mode) |
| 10 | { |
| 11 | u32 mask = BIT(gpio); |
| 12 | u32 val0, val1; |
| 13 | |
| 14 | val0 = readl(BASE_DEVCPU_GCB + GPIO_ALT(0)); |
| 15 | val1 = readl(BASE_DEVCPU_GCB + GPIO_ALT(1)); |
| 16 | |
| 17 | if (mode == 1) { |
| 18 | val0 |= mask; |
| 19 | val1 &= ~mask; |
| 20 | } else if (mode == 2) { |
| 21 | val0 &= ~mask; |
| 22 | val1 |= mask; |
| 23 | } else if (mode == 3) { |
| 24 | val0 |= mask; |
| 25 | val1 |= mask; |
| 26 | } else { |
| 27 | val0 &= ~mask; |
| 28 | val1 &= ~mask; |
| 29 | } |
| 30 | |
| 31 | writel(val0, BASE_DEVCPU_GCB + GPIO_ALT(0)); |
| 32 | writel(val1, BASE_DEVCPU_GCB + GPIO_ALT(1)); |
| 33 | } |