blob: 590519b32af2a812ba05c7eaed95d2944421845c [file] [log] [blame]
Suniel Maheshf1cd07b2020-02-03 19:20:04 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4 */
5
6#include <common.h>
7#include <dm.h>
Jagan Teki59691962020-07-21 20:36:04 +05308#include <env.h>
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
Suniel Maheshfe65e712020-02-03 19:20:05 +053010#include <spl_gpio.h>
11#include <asm/io.h>
Jagan Teki59691962020-07-21 20:36:04 +053012
13#include <asm/arch-rockchip/cru.h>
Suniel Maheshfe65e712020-02-03 19:20:05 +053014#include <asm/arch-rockchip/gpio.h>
Jagan Teki59691962020-07-21 20:36:04 +053015#include <asm/arch-rockchip/grf_rk3399.h>
Suniel Maheshf1cd07b2020-02-03 19:20:04 +053016
Jonas Karlmand95e08b2024-03-12 23:36:13 +000017#ifdef CONFIG_SPL_BUILD
Suniel Maheshfe65e712020-02-03 19:20:05 +053018
Jagan Teki59691962020-07-21 20:36:04 +053019#define PMUGRF_BASE 0xff320000
Jagan Teki6df18262020-07-21 20:36:01 +053020#define GPIO0_BASE 0xff720000
Suniel Maheshfe65e712020-02-03 19:20:05 +053021
Jagan Teki59691962020-07-21 20:36:04 +053022/**
23 * LED setup for roc-rk3399-pc
24 *
25 * 1. Set the low power leds (only during POR, pwr_key env is 'y')
26 * glow yellow LED, termed as low power
27 * poll for on board power key press
28 * once powe key pressed, turn off yellow
29 * 2. Turn on red LED, indicating full power mode
30 */
Jagan Teki6df18262020-07-21 20:36:01 +053031void led_setup(void)
Suniel Maheshfe65e712020-02-03 19:20:05 +053032{
33 struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
Jagan Teki59691962020-07-21 20:36:04 +053034 struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
35 bool press_pwr_key = false;
36
37 if (IS_ENABLED(CONFIG_SPL_ENV_SUPPORT)) {
38 env_init();
39 env_load();
40 if (env_get_yesno("pwr_key") == 1)
41 press_pwr_key = true;
42 }
Suniel Maheshfe65e712020-02-03 19:20:05 +053043
Jagan Teki59691962020-07-21 20:36:04 +053044 if (press_pwr_key && !strcmp(get_reset_cause(), "POR")) {
45 spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
46
47 spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5),
48 GPIO_PULL_NORMAL);
49 while (readl(&gpio0->ext_port) & 0x20)
50 ;
51
52 spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
53 }
54
Suniel Maheshfe65e712020-02-03 19:20:05 +053055 spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
Suniel Maheshfe65e712020-02-03 19:20:05 +053056}
Jagan Teki59691962020-07-21 20:36:04 +053057
Suniel Maheshfe65e712020-02-03 19:20:05 +053058#endif