blob: 0676587c38a1058807c36328f3bea7ab1dc05629 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Vasut00671d92017-10-09 21:51:10 +02002/*
3 * DHCOM DH-iMX6 PDK board support
4 *
5 * Copyright (C) 2017 Marek Vasut <marex@denx.de>
Marek Vasut00671d92017-10-09 21:51:10 +02006 */
7
8#include <common.h>
Marek Vasut7937aba2019-05-17 16:58:51 +02009#include <dm.h>
Simon Glasseba6b8d2019-11-14 12:57:50 -070010#include <eeprom.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060011#include <image.h>
Simon Glassa7b51302019-11-14 12:57:46 -070012#include <init.h>
Simon Glass274e0b02020-05-10 11:39:56 -060013#include <net.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060014#include <asm/global_data.h>
Marek Vasut7937aba2019-05-17 16:58:51 +020015#include <dm/device-internal.h>
Marek Vasut00671d92017-10-09 21:51:10 +020016#include <asm/arch/clock.h>
17#include <asm/arch/crm_regs.h>
18#include <asm/arch/imx-regs.h>
19#include <asm/arch/iomux.h>
20#include <asm/arch/mx6-pins.h>
21#include <asm/arch/sys_proto.h>
22#include <asm/gpio.h>
23#include <asm/io.h>
24#include <asm/mach-imx/boot_mode.h>
25#include <asm/mach-imx/iomux-v3.h>
Marek Vasut00671d92017-10-09 21:51:10 +020026#include <asm/mach-imx/sata.h>
Marek Vasut6bd9bba2019-05-17 16:58:52 +020027#include <ahci.h>
28#include <dwc_ahsata.h>
Simon Glass5e6201b2019-08-01 09:46:51 -060029#include <env.h>
Marek Vasut00671d92017-10-09 21:51:10 +020030#include <errno.h>
Yangbo Lu73340382019-06-21 11:42:28 +080031#include <fsl_esdhc_imx.h>
Marek Vasut00671d92017-10-09 21:51:10 +020032#include <fuse.h>
Ludwig Zenz7217dae2019-07-08 15:04:58 +020033#include <i2c_eeprom.h>
Marek Vasut00671d92017-10-09 21:51:10 +020034#include <mmc.h>
Marek Vasut00671d92017-10-09 21:51:10 +020035#include <usb.h>
Simon Glassdbd79542020-05-10 11:40:11 -060036#include <linux/delay.h>
Marek Vasut00671d92017-10-09 21:51:10 +020037#include <usb/ehci-ci.h>
38
Philip Oberfichtnerff9ccce2022-07-26 15:04:51 +020039#include "../common/dh_common.h"
40#include "../common/dh_imx.h"
41
Marek Vasut00671d92017-10-09 21:51:10 +020042DECLARE_GLOBAL_DATA_PTR;
43
Marek Vasut00671d92017-10-09 21:51:10 +020044int dram_init(void)
45{
46 gd->ram_size = imx_ddr_size();
47 return 0;
48}
49
50/*
51 * Do not overwrite the console
52 * Use always serial for U-Boot console
53 */
54int overwrite_console(void)
55{
56 return 1;
57}
58
Marek Vasut00671d92017-10-09 21:51:10 +020059static int setup_fec_clock(void)
60{
61 struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
62
63 /* set gpr1[21] to select anatop clock */
64 clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, 0x1 << 21);
65
66 return enable_fec_anatop_clock(0, ENET_50MHZ);
67}
68
Marek Vasut00671d92017-10-09 21:51:10 +020069#ifdef CONFIG_USB_EHCI_MX6
70static void setup_usb(void)
71{
72 /*
73 * Set daisy chain for otg_pin_id on MX6Q.
74 * For MX6DL, this bit is reserved.
75 */
76 imx_iomux_set_gpr_register(1, 13, 1, 0);
77}
78
79int board_usb_phy_mode(int port)
80{
Marek Vasut00671d92017-10-09 21:51:10 +020081 if (port == 1)
Marek Vasut861b6892017-10-22 10:22:40 +020082 return USB_INIT_HOST;
Marek Vasut00671d92017-10-09 21:51:10 +020083 else
Marek Vasut861b6892017-10-22 10:22:40 +020084 return USB_INIT_DEVICE;
Marek Vasut00671d92017-10-09 21:51:10 +020085}
Marek Vasut00671d92017-10-09 21:51:10 +020086#endif
87
Philip Oberfichtnerff9ccce2022-07-26 15:04:51 +020088int dh_setup_mac_address(void)
Marek Vasut00671d92017-10-09 21:51:10 +020089{
90 unsigned char enetaddr[6];
Marek Vasut00671d92017-10-09 21:51:10 +020091
Philip Oberfichtnerff9ccce2022-07-26 15:04:51 +020092 if (dh_mac_is_in_env("ethaddr"))
Marek Vasut00671d92017-10-09 21:51:10 +020093 return 0;
Marek Vasut00671d92017-10-09 21:51:10 +020094
Marek Vasut29ab1a92024-03-12 22:15:58 +010095 if (dh_get_mac_is_enabled("ethernet0"))
96 return 0;
97
Philip Oberfichtnerff9ccce2022-07-26 15:04:51 +020098 if (!dh_imx_get_mac_from_fuse(enetaddr))
99 goto out;
Ludwig Zenz7217dae2019-07-08 15:04:58 +0200100
Philip Oberfichtnerff9ccce2022-07-26 15:04:51 +0200101 if (!dh_get_mac_from_eeprom(enetaddr, "eeprom0"))
102 goto out;
Marek Vasut00671d92017-10-09 21:51:10 +0200103
Philip Oberfichtnerff9ccce2022-07-26 15:04:51 +0200104 printf("%s: Unable to get MAC address!\n", __func__);
105 return -ENXIO;
Marek Vasut00671d92017-10-09 21:51:10 +0200106
Philip Oberfichtnerff9ccce2022-07-26 15:04:51 +0200107out:
108 return eth_env_set_enetaddr("ethaddr", enetaddr);
Marek Vasut00671d92017-10-09 21:51:10 +0200109}
110
111int board_early_init_f(void)
112{
113#ifdef CONFIG_USB_EHCI_MX6
114 setup_usb();
115#endif
116
117 return 0;
118}
119
Marek Vasut00671d92017-10-09 21:51:10 +0200120int board_init(void)
121{
122 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
123
124 /* address of boot parameters */
125 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
126
127 /* Enable eim_slow clocks */
128 setbits_le32(&mxc_ccm->CCGR6, 0x1 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET);
129
Harald Seiler08541042020-04-15 20:04:53 +0200130 setup_fec_clock();
131
Marek Vasut00671d92017-10-09 21:51:10 +0200132 return 0;
133}
134
135#ifdef CONFIG_CMD_BMODE
136static const struct boot_mode board_boot_modes[] = {
137 /* 4 bit bus width */
138 {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
139 {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
140 /* 8 bit bus width */
Claudius Heine868e1d52019-10-29 13:17:55 +0100141 {"emmc", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)},
Marek Vasut00671d92017-10-09 21:51:10 +0200142 {NULL, 0},
143};
144#endif
145
146#define HW_CODE_BIT_0 IMX_GPIO_NR(2, 19)
147#define HW_CODE_BIT_1 IMX_GPIO_NR(6, 6)
148#define HW_CODE_BIT_2 IMX_GPIO_NR(2, 16)
149
150static int board_get_hwcode(void)
151{
152 int hw_code;
153
Marek Vasut7bc33632019-05-17 16:58:50 +0200154 gpio_request(HW_CODE_BIT_0, "HW-code-bit-0");
155 gpio_request(HW_CODE_BIT_1, "HW-code-bit-1");
156 gpio_request(HW_CODE_BIT_2, "HW-code-bit-2");
157
Marek Vasut00671d92017-10-09 21:51:10 +0200158 gpio_direction_input(HW_CODE_BIT_0);
159 gpio_direction_input(HW_CODE_BIT_1);
160 gpio_direction_input(HW_CODE_BIT_2);
161
162 /* HW 100 + HW 200 = 00b; HW 300 = 01b */
163 hw_code = ((gpio_get_value(HW_CODE_BIT_2) << 2) |
164 (gpio_get_value(HW_CODE_BIT_1) << 1) |
165 gpio_get_value(HW_CODE_BIT_0)) + 2;
166
167 return hw_code;
168}
169
170int board_late_init(void)
171{
172 u32 hw_code;
173 char buf[16];
174
Philip Oberfichtnerff9ccce2022-07-26 15:04:51 +0200175 dh_setup_mac_address();
Marek Vasut56764b32020-05-14 18:49:10 +0200176
Marek Vasut00671d92017-10-09 21:51:10 +0200177 hw_code = board_get_hwcode();
178
179 switch (get_cpu_type()) {
180 case MXC_CPU_MX6SOLO:
181 snprintf(buf, sizeof(buf), "imx6s-dhcom%1d", hw_code);
182 break;
183 case MXC_CPU_MX6DL:
184 snprintf(buf, sizeof(buf), "imx6dl-dhcom%1d", hw_code);
185 break;
186 case MXC_CPU_MX6D:
187 snprintf(buf, sizeof(buf), "imx6d-dhcom%1d", hw_code);
188 break;
189 case MXC_CPU_MX6Q:
190 snprintf(buf, sizeof(buf), "imx6q-dhcom%1d", hw_code);
191 break;
192 default:
193 snprintf(buf, sizeof(buf), "UNKNOWN%1d", hw_code);
194 break;
195 }
196
197 env_set("dhcom", buf);
198
199#ifdef CONFIG_CMD_BMODE
200 add_board_boot_modes(board_boot_modes);
201#endif
202 return 0;
203}
204
205int checkboard(void)
206{
207 puts("Board: DHCOM i.MX6\n");
208 return 0;
209}
Ludwig Zenz9ea1ba92019-07-02 14:49:49 +0200210
211#ifdef CONFIG_MULTI_DTB_FIT
Philip Oberfichtner4b595a32022-05-20 10:46:26 +0200212static int strcmp_prefix(const char *s1, const char *s2)
213{
214 size_t n;
215
216 n = min(strlen(s1), strlen(s2));
217 return strncmp(s1, s2, n);
218}
219
Ludwig Zenz9ea1ba92019-07-02 14:49:49 +0200220int board_fit_config_name_match(const char *name)
221{
Philip Oberfichtner4b595a32022-05-20 10:46:26 +0200222 char *want;
223 char *have;
224
225 /* Test Board suffix, e.g. -dhcom-drc02 */
226 want = strchr(CONFIG_DEFAULT_DEVICE_TREE, '-');
227 have = strchr(name, '-');
228
229 if (!want || !have || strcmp(want, have))
230 return -EINVAL;
231
232 /* Test SoC prefix */
233 if (is_mx6dq() && !strcmp_prefix(name, "imx6q-"))
234 return 0;
235
236 if (is_mx6sdl()) {
237 if (!strcmp_prefix(name, "imx6s-") || !strcmp_prefix(name, "imx6dl-"))
Ludwig Zenz9ea1ba92019-07-02 14:49:49 +0200238 return 0;
239 }
240
Philip Oberfichtner4b595a32022-05-20 10:46:26 +0200241 return -EINVAL;
Ludwig Zenz9ea1ba92019-07-02 14:49:49 +0200242}
243#endif