Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Hans de Goede | c048203 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Hitachi tx18d42vm LVDS LCD panel driver |
| 4 | * |
| 5 | * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com> |
Hans de Goede | c048203 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 8 | #include <malloc.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 9 | #include <linux/delay.h> |
Hans de Goede | c048203 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 10 | |
| 11 | #include <asm/gpio.h> |
Andre Przywara | f944a61 | 2022-09-06 10:36:38 +0100 | [diff] [blame] | 12 | #include <sunxi_gpio.h> |
Hans de Goede | c048203 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 13 | #include <errno.h> |
| 14 | |
| 15 | /* |
| 16 | * Very simple write only SPI support, this does not use the generic SPI infra |
| 17 | * because that assumes R/W SPI, requiring a MISO pin. Also the necessary glue |
| 18 | * code alone would be larger then this minimal version. |
| 19 | */ |
| 20 | static void lcd_panel_spi_write(int cs, int clk, int mosi, |
| 21 | unsigned int data, int bits) |
| 22 | { |
| 23 | int i, offset; |
| 24 | |
| 25 | gpio_direction_output(cs, 0); |
| 26 | for (i = 0; i < bits; i++) { |
| 27 | gpio_direction_output(clk, 0); |
| 28 | offset = (bits - 1) - i; |
| 29 | gpio_direction_output(mosi, (data >> offset) & 1); |
| 30 | udelay(2); |
| 31 | gpio_direction_output(clk, 1); |
| 32 | udelay(2); |
| 33 | } |
| 34 | gpio_direction_output(cs, 1); |
| 35 | udelay(2); |
| 36 | } |
| 37 | |
| 38 | int hitachi_tx18d42vm_init(void) |
| 39 | { |
| 40 | const u16 init_data[] = { |
| 41 | 0x0029, /* reset */ |
| 42 | 0x0025, /* standby */ |
| 43 | 0x0840, /* enable normally black */ |
| 44 | 0x0430, /* enable FRC/dither */ |
| 45 | 0x385f, /* enter test mode(1) */ |
| 46 | 0x3ca4, /* enter test mode(2) */ |
| 47 | 0x3409, /* enable SDRRS, enlarge OE width */ |
| 48 | 0x4041, /* adopt 2 line / 1 dot */ |
| 49 | }; |
| 50 | int i, cs, clk, mosi, ret = 0; |
| 51 | |
Samuel Holland | c7ab95d | 2021-09-11 16:50:48 -0500 | [diff] [blame] | 52 | cs = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_SPI_CS); |
| 53 | clk = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_SPI_SCLK); |
| 54 | mosi = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_SPI_MOSI); |
Hans de Goede | c048203 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 55 | |
| 56 | if (cs == -1 || clk == -1 || mosi == 1) { |
| 57 | printf("Error tx18d42vm spi gpio config is invalid\n"); |
| 58 | return -EINVAL; |
| 59 | } |
| 60 | |
| 61 | if (gpio_request(cs, "tx18d42vm-spi-cs") != 0 || |
| 62 | gpio_request(clk, "tx18d42vm-spi-clk") != 0 || |
| 63 | gpio_request(mosi, "tx18d42vm-spi-mosi") != 0) { |
| 64 | printf("Error cannot request tx18d42vm spi gpios\n"); |
| 65 | ret = -EBUSY; |
| 66 | goto out; |
| 67 | } |
| 68 | |
| 69 | for (i = 0; i < ARRAY_SIZE(init_data); i++) |
| 70 | lcd_panel_spi_write(cs, clk, mosi, init_data[i], 16); |
| 71 | |
| 72 | mdelay(50); /* All the tx18d42vm drivers have a delay here ? */ |
| 73 | |
| 74 | lcd_panel_spi_write(cs, clk, mosi, 0x00ad, 16); /* display on */ |
| 75 | |
| 76 | out: |
| 77 | gpio_free(mosi); |
| 78 | gpio_free(clk); |
| 79 | gpio_free(cs); |
| 80 | |
| 81 | return ret; |
| 82 | } |