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Aubrey Li51185db2007-03-20 18:16:24 +08001/*
2 * U-boot - Configuration file for BF561 EZKIT board
3 */
4
Mike Frysinger62d2a232008-06-01 09:09:48 -04005#ifndef __CONFIG_BF561_EZKIT_H__
6#define __CONFIG_BF561_EZKIT_H__
Aubrey Li51185db2007-03-20 18:16:24 +08007
Mike Frysinger18a407c2009-04-24 17:22:40 -04008#include <asm/config-pre.h>
Mike Frysingerf0dd7922008-02-18 05:26:48 -05009
Aubrey Li51185db2007-03-20 18:16:24 +080010
Aubrey Li51185db2007-03-20 18:16:24 +080011/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040012 * Processor Settings
Aubrey Li51185db2007-03-20 18:16:24 +080013 */
Mike Frysinger62d2a232008-06-01 09:09:48 -040014#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
Aubrey Li51185db2007-03-20 18:16:24 +080015
Aubrey Li51185db2007-03-20 18:16:24 +080016
17/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040018 * Clock Settings
19 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
20 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
Aubrey Li51185db2007-03-20 18:16:24 +080021 */
Mike Frysinger62d2a232008-06-01 09:09:48 -040022/* CONFIG_CLKIN_HZ is any value in Hz */
23#define CONFIG_CLKIN_HZ 30000000
24/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
25/* 1 = CLKIN / 2 */
26#define CONFIG_CLKIN_HALF 0
27/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
28/* 1 = bypass PLL */
29#define CONFIG_PLL_BYPASS 0
30/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
31/* Values can range from 0-63 (where 0 means 64) */
32#define CONFIG_VCO_MULT 20
33/* CCLK_DIV controls the core clock divider */
34/* Values can be 1, 2, 4, or 8 ONLY */
35#define CONFIG_CCLK_DIV 1
36/* SCLK_DIV controls the system clock divider */
37/* Values can range from 1-15 */
38#define CONFIG_SCLK_DIV 6
Aubrey Li51185db2007-03-20 18:16:24 +080039
Aubrey Li51185db2007-03-20 18:16:24 +080040
41/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040042 * Memory Settings
Aubrey Li51185db2007-03-20 18:16:24 +080043 */
Mike Frysinger62d2a232008-06-01 09:09:48 -040044#define CONFIG_MEM_ADD_WDTH 9
45#define CONFIG_MEM_SIZE 64
Aubrey Li51185db2007-03-20 18:16:24 +080046
Mike Frysinger62d2a232008-06-01 09:09:48 -040047#define CONFIG_EBIU_SDRRC_VAL 0x306
48#define CONFIG_EBIU_SDGCTL_VAL 0x91114d
Aubrey Li51185db2007-03-20 18:16:24 +080049
Mike Frysinger62d2a232008-06-01 09:09:48 -040050#define CONFIG_EBIU_AMGCTL_VAL 0x3F
51#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
52#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
Aubrey Li51185db2007-03-20 18:16:24 +080053
Mike Frysinger62d2a232008-06-01 09:09:48 -040054#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
55#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
Aubrey Li51185db2007-03-20 18:16:24 +080056
Aubrey Li51185db2007-03-20 18:16:24 +080057
58/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040059 * Network Settings
Aubrey Li51185db2007-03-20 18:16:24 +080060 */
Mike Frysinger62d2a232008-06-01 09:09:48 -040061#define ADI_CMDS_NETWORK 1
Ben Warren0fd6aae2009-10-04 22:37:03 -070062#define CONFIG_NET_MULTI
63#define CONFIG_SMC91111 1
Mike Frysinger62d2a232008-06-01 09:09:48 -040064#define CONFIG_SMC91111_BASE 0x2C010300
65#define CONFIG_SMC_USE_32_BIT 1
66#define CONFIG_HOSTNAME bf561-ezkit
67/* Uncomment next line to use fixed MAC address */
68/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
Aubrey Li51185db2007-03-20 18:16:24 +080069
Jon Loeliger5c4ddae2007-07-10 10:12:10 -050070
Jon Loeliger5c4ddae2007-07-10 10:12:10 -050071/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040072 * Flash Settings
Jon Loeliger8262ada2007-07-04 22:31:49 -050073 */
Mike Frysinger62d2a232008-06-01 09:09:48 -040074#define CONFIG_SYS_FLASH_CFI
75#define CONFIG_FLASH_CFI_DRIVER
76#define CONFIG_SYS_FLASH_CFI_AMD_RESET
77#define CONFIG_SYS_FLASH_BASE 0x20000000
78#define CONFIG_SYS_MAX_FLASH_BANKS 1
79#define CONFIG_SYS_MAX_FLASH_SECT 135
80/* The BF561-EZKIT uses a top boot flash */
81#define CONFIG_ENV_IS_IN_FLASH 1
82#define CONFIG_ENV_ADDR 0x20004000
83#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
84#define CONFIG_ENV_SIZE 0x2000
85#define CONFIG_ENV_SECT_SIZE 0x10000
86#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
87#define ENV_IS_EMBEDDED
88#else
Mike Frysinger45b57bd2009-07-21 22:17:36 -040089#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
Jon Loeliger8262ada2007-07-04 22:31:49 -050090#endif
Mike Frysinger37f48702009-06-14 06:29:07 -040091#ifdef ENV_IS_EMBEDDED
92/* WARNING - the following is hand-optimized to fit within
93 * the sector before the environment sector. If it throws
94 * an error during compilation remove an object here to get
95 * it linked after the configuration sector.
96 */
97# define LDS_BOARD_TEXT \
Mike Frysingera0d60412010-11-19 19:28:56 -050098 arch/blackfin/lib/libblackfin.o (.text*); \
99 arch/blackfin/cpu/libblackfin.o (.text*); \
Mike Frysinger37f48702009-06-14 06:29:07 -0400100 . = DEFINED(env_offset) ? env_offset : .; \
Mike Frysingera0d60412010-11-19 19:28:56 -0500101 common/env_embedded.o (.text*);
Mike Frysinger37f48702009-06-14 06:29:07 -0400102#endif
Jon Loeliger8262ada2007-07-04 22:31:49 -0500103
Mike Frysinger62d2a232008-06-01 09:09:48 -0400104
Aubrey Li51185db2007-03-20 18:16:24 +0800105/*
Mike Frysinger62d2a232008-06-01 09:09:48 -0400106 * I2C Settings
Aubrey Li51185db2007-03-20 18:16:24 +0800107 */
Mike Frysinger62d2a232008-06-01 09:09:48 -0400108#define CONFIG_SOFT_I2C
Mike Frysingerd86e9a72010-06-08 16:22:44 -0400109#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
110#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
Aubrey Li51185db2007-03-20 18:16:24 +0800111
Aubrey Li51185db2007-03-20 18:16:24 +0800112
113/*
Mike Frysinger62d2a232008-06-01 09:09:48 -0400114 * Misc Settings
Aubrey Li51185db2007-03-20 18:16:24 +0800115 */
Mike Frysinger62d2a232008-06-01 09:09:48 -0400116#define CONFIG_UART_CONSOLE 0
117
Aubrey Li51185db2007-03-20 18:16:24 +0800118
119/*
Mike Frysinger62d2a232008-06-01 09:09:48 -0400120 * Pull in common ADI header for remaining command/environment setup
Aubrey Li51185db2007-03-20 18:16:24 +0800121 */
Mike Frysinger62d2a232008-06-01 09:09:48 -0400122#include <configs/bfin_adi_common.h>
Aubrey Li51185db2007-03-20 18:16:24 +0800123
Mike Frysinger18a407c2009-04-24 17:22:40 -0400124#endif